]> git.sur5r.net Git - u-boot/blob - drivers/net/phy/phy.c
Merge git://git.denx.de/u-boot-rockchip
[u-boot] / drivers / net / phy / phy.c
1 /*
2  * Generic PHY Management code
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  *
6  * Copyright 2011 Freescale Semiconductor, Inc.
7  * author Andy Fleming
8  *
9  * Based loosely off of Linux's PHY Lib
10  */
11
12 #include <config.h>
13 #include <common.h>
14 #include <console.h>
15 #include <dm.h>
16 #include <malloc.h>
17 #include <net.h>
18 #include <command.h>
19 #include <miiphy.h>
20 #include <phy.h>
21 #include <errno.h>
22 #include <linux/err.h>
23 #include <linux/compiler.h>
24
25 DECLARE_GLOBAL_DATA_PTR;
26
27 /* Generic PHY support and helper functions */
28
29 /**
30  * genphy_config_advert - sanitize and advertise auto-negotation parameters
31  * @phydev: target phy_device struct
32  *
33  * Description: Writes MII_ADVERTISE with the appropriate values,
34  *   after sanitizing the values to make sure we only advertise
35  *   what is supported.  Returns < 0 on error, 0 if the PHY's advertisement
36  *   hasn't changed, and > 0 if it has changed.
37  */
38 static int genphy_config_advert(struct phy_device *phydev)
39 {
40         u32 advertise;
41         int oldadv, adv, bmsr;
42         int err, changed = 0;
43
44         /* Only allow advertising what this PHY supports */
45         phydev->advertising &= phydev->supported;
46         advertise = phydev->advertising;
47
48         /* Setup standard advertisement */
49         adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
50         oldadv = adv;
51
52         if (adv < 0)
53                 return adv;
54
55         adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
56                  ADVERTISE_PAUSE_ASYM);
57         if (advertise & ADVERTISED_10baseT_Half)
58                 adv |= ADVERTISE_10HALF;
59         if (advertise & ADVERTISED_10baseT_Full)
60                 adv |= ADVERTISE_10FULL;
61         if (advertise & ADVERTISED_100baseT_Half)
62                 adv |= ADVERTISE_100HALF;
63         if (advertise & ADVERTISED_100baseT_Full)
64                 adv |= ADVERTISE_100FULL;
65         if (advertise & ADVERTISED_Pause)
66                 adv |= ADVERTISE_PAUSE_CAP;
67         if (advertise & ADVERTISED_Asym_Pause)
68                 adv |= ADVERTISE_PAUSE_ASYM;
69         if (advertise & ADVERTISED_1000baseX_Half)
70                 adv |= ADVERTISE_1000XHALF;
71         if (advertise & ADVERTISED_1000baseX_Full)
72                 adv |= ADVERTISE_1000XFULL;
73
74         if (adv != oldadv) {
75                 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
76
77                 if (err < 0)
78                         return err;
79                 changed = 1;
80         }
81
82         bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
83         if (bmsr < 0)
84                 return bmsr;
85
86         /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all
87          * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a
88          * logical 1.
89          */
90         if (!(bmsr & BMSR_ESTATEN))
91                 return changed;
92
93         /* Configure gigabit if it's supported */
94         adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
95         oldadv = adv;
96
97         if (adv < 0)
98                 return adv;
99
100         adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
101
102         if (phydev->supported & (SUPPORTED_1000baseT_Half |
103                                 SUPPORTED_1000baseT_Full)) {
104                 if (advertise & SUPPORTED_1000baseT_Half)
105                         adv |= ADVERTISE_1000HALF;
106                 if (advertise & SUPPORTED_1000baseT_Full)
107                         adv |= ADVERTISE_1000FULL;
108         }
109
110         if (adv != oldadv)
111                 changed = 1;
112
113         err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv);
114         if (err < 0)
115                 return err;
116
117         return changed;
118 }
119
120
121 /**
122  * genphy_setup_forced - configures/forces speed/duplex from @phydev
123  * @phydev: target phy_device struct
124  *
125  * Description: Configures MII_BMCR to force speed/duplex
126  *   to the values in phydev. Assumes that the values are valid.
127  */
128 static int genphy_setup_forced(struct phy_device *phydev)
129 {
130         int err;
131         int ctl = BMCR_ANRESTART;
132
133         phydev->pause = phydev->asym_pause = 0;
134
135         if (SPEED_1000 == phydev->speed)
136                 ctl |= BMCR_SPEED1000;
137         else if (SPEED_100 == phydev->speed)
138                 ctl |= BMCR_SPEED100;
139
140         if (DUPLEX_FULL == phydev->duplex)
141                 ctl |= BMCR_FULLDPLX;
142
143         err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
144
145         return err;
146 }
147
148
149 /**
150  * genphy_restart_aneg - Enable and Restart Autonegotiation
151  * @phydev: target phy_device struct
152  */
153 int genphy_restart_aneg(struct phy_device *phydev)
154 {
155         int ctl;
156
157         ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
158
159         if (ctl < 0)
160                 return ctl;
161
162         ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
163
164         /* Don't isolate the PHY if we're negotiating */
165         ctl &= ~(BMCR_ISOLATE);
166
167         ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
168
169         return ctl;
170 }
171
172
173 /**
174  * genphy_config_aneg - restart auto-negotiation or write BMCR
175  * @phydev: target phy_device struct
176  *
177  * Description: If auto-negotiation is enabled, we configure the
178  *   advertising, and then restart auto-negotiation.  If it is not
179  *   enabled, then we write the BMCR.
180  */
181 int genphy_config_aneg(struct phy_device *phydev)
182 {
183         int result;
184
185         if (AUTONEG_ENABLE != phydev->autoneg)
186                 return genphy_setup_forced(phydev);
187
188         result = genphy_config_advert(phydev);
189
190         if (result < 0) /* error */
191                 return result;
192
193         if (result == 0) {
194                 /* Advertisment hasn't changed, but maybe aneg was never on to
195                  * begin with?  Or maybe phy was isolated? */
196                 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
197
198                 if (ctl < 0)
199                         return ctl;
200
201                 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
202                         result = 1; /* do restart aneg */
203         }
204
205         /* Only restart aneg if we are advertising something different
206          * than we were before.  */
207         if (result > 0)
208                 result = genphy_restart_aneg(phydev);
209
210         return result;
211 }
212
213 /**
214  * genphy_update_link - update link status in @phydev
215  * @phydev: target phy_device struct
216  *
217  * Description: Update the value in phydev->link to reflect the
218  *   current link value.  In order to do this, we need to read
219  *   the status register twice, keeping the second value.
220  */
221 int genphy_update_link(struct phy_device *phydev)
222 {
223         unsigned int mii_reg;
224
225         /*
226          * Wait if the link is up, and autonegotiation is in progress
227          * (ie - we're capable and it's not done)
228          */
229         mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
230
231         /*
232          * If we already saw the link up, and it hasn't gone down, then
233          * we don't need to wait for autoneg again
234          */
235         if (phydev->link && mii_reg & BMSR_LSTATUS)
236                 return 0;
237
238         if ((phydev->autoneg == AUTONEG_ENABLE) &&
239             !(mii_reg & BMSR_ANEGCOMPLETE)) {
240                 int i = 0;
241
242                 printf("%s Waiting for PHY auto negotiation to complete",
243                         phydev->dev->name);
244                 while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
245                         /*
246                          * Timeout reached ?
247                          */
248                         if (i > PHY_ANEG_TIMEOUT) {
249                                 printf(" TIMEOUT !\n");
250                                 phydev->link = 0;
251                                 return -ETIMEDOUT;
252                         }
253
254                         if (ctrlc()) {
255                                 puts("user interrupt!\n");
256                                 phydev->link = 0;
257                                 return -EINTR;
258                         }
259
260                         if ((i++ % 500) == 0)
261                                 printf(".");
262
263                         udelay(1000);   /* 1 ms */
264                         mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
265                 }
266                 printf(" done\n");
267                 phydev->link = 1;
268         } else {
269                 /* Read the link a second time to clear the latched state */
270                 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
271
272                 if (mii_reg & BMSR_LSTATUS)
273                         phydev->link = 1;
274                 else
275                         phydev->link = 0;
276         }
277
278         return 0;
279 }
280
281 /*
282  * Generic function which updates the speed and duplex.  If
283  * autonegotiation is enabled, it uses the AND of the link
284  * partner's advertised capabilities and our advertised
285  * capabilities.  If autonegotiation is disabled, we use the
286  * appropriate bits in the control register.
287  *
288  * Stolen from Linux's mii.c and phy_device.c
289  */
290 int genphy_parse_link(struct phy_device *phydev)
291 {
292         int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
293
294         /* We're using autonegotiation */
295         if (phydev->autoneg == AUTONEG_ENABLE) {
296                 u32 lpa = 0;
297                 int gblpa = 0;
298                 u32 estatus = 0;
299
300                 /* Check for gigabit capability */
301                 if (phydev->supported & (SUPPORTED_1000baseT_Full |
302                                         SUPPORTED_1000baseT_Half)) {
303                         /* We want a list of states supported by
304                          * both PHYs in the link
305                          */
306                         gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
307                         if (gblpa < 0) {
308                                 debug("Could not read MII_STAT1000. Ignoring gigabit capability\n");
309                                 gblpa = 0;
310                         }
311                         gblpa &= phy_read(phydev,
312                                         MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
313                 }
314
315                 /* Set the baseline so we only have to set them
316                  * if they're different
317                  */
318                 phydev->speed = SPEED_10;
319                 phydev->duplex = DUPLEX_HALF;
320
321                 /* Check the gigabit fields */
322                 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
323                         phydev->speed = SPEED_1000;
324
325                         if (gblpa & PHY_1000BTSR_1000FD)
326                                 phydev->duplex = DUPLEX_FULL;
327
328                         /* We're done! */
329                         return 0;
330                 }
331
332                 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
333                 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
334
335                 if (lpa & (LPA_100FULL | LPA_100HALF)) {
336                         phydev->speed = SPEED_100;
337
338                         if (lpa & LPA_100FULL)
339                                 phydev->duplex = DUPLEX_FULL;
340
341                 } else if (lpa & LPA_10FULL)
342                         phydev->duplex = DUPLEX_FULL;
343
344                 /*
345                  * Extended status may indicate that the PHY supports
346                  * 1000BASE-T/X even though the 1000BASE-T registers
347                  * are missing. In this case we can't tell whether the
348                  * peer also supports it, so we only check extended
349                  * status if the 1000BASE-T registers are actually
350                  * missing.
351                  */
352                 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
353                         estatus = phy_read(phydev, MDIO_DEVAD_NONE,
354                                            MII_ESTATUS);
355
356                 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
357                                 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
358                         phydev->speed = SPEED_1000;
359                         if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
360                                 phydev->duplex = DUPLEX_FULL;
361                 }
362
363         } else {
364                 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
365
366                 phydev->speed = SPEED_10;
367                 phydev->duplex = DUPLEX_HALF;
368
369                 if (bmcr & BMCR_FULLDPLX)
370                         phydev->duplex = DUPLEX_FULL;
371
372                 if (bmcr & BMCR_SPEED1000)
373                         phydev->speed = SPEED_1000;
374                 else if (bmcr & BMCR_SPEED100)
375                         phydev->speed = SPEED_100;
376         }
377
378         return 0;
379 }
380
381 int genphy_config(struct phy_device *phydev)
382 {
383         int val;
384         u32 features;
385
386         features = (SUPPORTED_TP | SUPPORTED_MII
387                         | SUPPORTED_AUI | SUPPORTED_FIBRE |
388                         SUPPORTED_BNC);
389
390         /* Do we support autonegotiation? */
391         val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
392
393         if (val < 0)
394                 return val;
395
396         if (val & BMSR_ANEGCAPABLE)
397                 features |= SUPPORTED_Autoneg;
398
399         if (val & BMSR_100FULL)
400                 features |= SUPPORTED_100baseT_Full;
401         if (val & BMSR_100HALF)
402                 features |= SUPPORTED_100baseT_Half;
403         if (val & BMSR_10FULL)
404                 features |= SUPPORTED_10baseT_Full;
405         if (val & BMSR_10HALF)
406                 features |= SUPPORTED_10baseT_Half;
407
408         if (val & BMSR_ESTATEN) {
409                 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
410
411                 if (val < 0)
412                         return val;
413
414                 if (val & ESTATUS_1000_TFULL)
415                         features |= SUPPORTED_1000baseT_Full;
416                 if (val & ESTATUS_1000_THALF)
417                         features |= SUPPORTED_1000baseT_Half;
418                 if (val & ESTATUS_1000_XFULL)
419                         features |= SUPPORTED_1000baseX_Full;
420                 if (val & ESTATUS_1000_XHALF)
421                         features |= SUPPORTED_1000baseX_Half;
422         }
423
424         phydev->supported &= features;
425         phydev->advertising &= features;
426
427         genphy_config_aneg(phydev);
428
429         return 0;
430 }
431
432 int genphy_startup(struct phy_device *phydev)
433 {
434         int ret;
435
436         ret = genphy_update_link(phydev);
437         if (ret)
438                 return ret;
439
440         return genphy_parse_link(phydev);
441 }
442
443 int genphy_shutdown(struct phy_device *phydev)
444 {
445         return 0;
446 }
447
448 static struct phy_driver genphy_driver = {
449         .uid            = 0xffffffff,
450         .mask           = 0xffffffff,
451         .name           = "Generic PHY",
452         .features       = PHY_GBIT_FEATURES | SUPPORTED_MII |
453                           SUPPORTED_AUI | SUPPORTED_FIBRE |
454                           SUPPORTED_BNC,
455         .config         = genphy_config,
456         .startup        = genphy_startup,
457         .shutdown       = genphy_shutdown,
458 };
459
460 static LIST_HEAD(phy_drivers);
461
462 int phy_init(void)
463 {
464 #ifdef CONFIG_MV88E61XX_SWITCH
465         phy_mv88e61xx_init();
466 #endif
467 #ifdef CONFIG_PHY_AQUANTIA
468         phy_aquantia_init();
469 #endif
470 #ifdef CONFIG_PHY_ATHEROS
471         phy_atheros_init();
472 #endif
473 #ifdef CONFIG_PHY_BROADCOM
474         phy_broadcom_init();
475 #endif
476 #ifdef CONFIG_PHY_CORTINA
477         phy_cortina_init();
478 #endif
479 #ifdef CONFIG_PHY_DAVICOM
480         phy_davicom_init();
481 #endif
482 #ifdef CONFIG_PHY_ET1011C
483         phy_et1011c_init();
484 #endif
485 #ifdef CONFIG_PHY_LXT
486         phy_lxt_init();
487 #endif
488 #ifdef CONFIG_PHY_MARVELL
489         phy_marvell_init();
490 #endif
491 #ifdef CONFIG_PHY_MICREL
492         phy_micrel_init();
493 #endif
494 #ifdef CONFIG_PHY_NATSEMI
495         phy_natsemi_init();
496 #endif
497 #ifdef CONFIG_PHY_REALTEK
498         phy_realtek_init();
499 #endif
500 #ifdef CONFIG_PHY_SMSC
501         phy_smsc_init();
502 #endif
503 #ifdef CONFIG_PHY_TERANETICS
504         phy_teranetics_init();
505 #endif
506 #ifdef CONFIG_PHY_TI
507         phy_ti_init();
508 #endif
509 #ifdef CONFIG_PHY_VITESSE
510         phy_vitesse_init();
511 #endif
512 #ifdef CONFIG_PHY_XILINX
513         phy_xilinx_init();
514 #endif
515 #ifdef CONFIG_PHY_MSCC
516         phy_mscc_init();
517 #endif
518
519         return 0;
520 }
521
522 int phy_register(struct phy_driver *drv)
523 {
524         INIT_LIST_HEAD(&drv->list);
525         list_add_tail(&drv->list, &phy_drivers);
526
527 #ifdef CONFIG_NEEDS_MANUAL_RELOC
528         if (drv->probe)
529                 drv->probe += gd->reloc_off;
530         if (drv->config)
531                 drv->config += gd->reloc_off;
532         if (drv->startup)
533                 drv->startup += gd->reloc_off;
534         if (drv->shutdown)
535                 drv->shutdown += gd->reloc_off;
536         if (drv->readext)
537                 drv->readext += gd->reloc_off;
538         if (drv->writeext)
539                 drv->writeext += gd->reloc_off;
540 #endif
541         return 0;
542 }
543
544 int phy_set_supported(struct phy_device *phydev, u32 max_speed)
545 {
546         /* The default values for phydev->supported are provided by the PHY
547          * driver "features" member, we want to reset to sane defaults first
548          * before supporting higher speeds.
549          */
550         phydev->supported &= PHY_DEFAULT_FEATURES;
551
552         switch (max_speed) {
553         default:
554                 return -ENOTSUPP;
555         case SPEED_1000:
556                 phydev->supported |= PHY_1000BT_FEATURES;
557                 /* fall through */
558         case SPEED_100:
559                 phydev->supported |= PHY_100BT_FEATURES;
560                 /* fall through */
561         case SPEED_10:
562                 phydev->supported |= PHY_10BT_FEATURES;
563         }
564
565         return 0;
566 }
567
568 static int phy_probe(struct phy_device *phydev)
569 {
570         int err = 0;
571
572         phydev->advertising = phydev->supported = phydev->drv->features;
573         phydev->mmds = phydev->drv->mmds;
574
575         if (phydev->drv->probe)
576                 err = phydev->drv->probe(phydev);
577
578         return err;
579 }
580
581 static struct phy_driver *generic_for_interface(phy_interface_t interface)
582 {
583 #ifdef CONFIG_PHYLIB_10G
584         if (is_10g_interface(interface))
585                 return &gen10g_driver;
586 #endif
587
588         return &genphy_driver;
589 }
590
591 static struct phy_driver *get_phy_driver(struct phy_device *phydev,
592                                 phy_interface_t interface)
593 {
594         struct list_head *entry;
595         int phy_id = phydev->phy_id;
596         struct phy_driver *drv = NULL;
597
598         list_for_each(entry, &phy_drivers) {
599                 drv = list_entry(entry, struct phy_driver, list);
600                 if ((drv->uid & drv->mask) == (phy_id & drv->mask))
601                         return drv;
602         }
603
604         /* If we made it here, there's no driver for this PHY */
605         return generic_for_interface(interface);
606 }
607
608 static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
609                                             u32 phy_id,
610                                             phy_interface_t interface)
611 {
612         struct phy_device *dev;
613
614         /* We allocate the device, and initialize the
615          * default values */
616         dev = malloc(sizeof(*dev));
617         if (!dev) {
618                 printf("Failed to allocate PHY device for %s:%d\n",
619                         bus->name, addr);
620                 return NULL;
621         }
622
623         memset(dev, 0, sizeof(*dev));
624
625         dev->duplex = -1;
626         dev->link = 0;
627         dev->interface = interface;
628
629         dev->autoneg = AUTONEG_ENABLE;
630
631         dev->addr = addr;
632         dev->phy_id = phy_id;
633         dev->bus = bus;
634
635         dev->drv = get_phy_driver(dev, interface);
636
637         phy_probe(dev);
638
639         bus->phymap[addr] = dev;
640
641         return dev;
642 }
643
644 /**
645  * get_phy_id - reads the specified addr for its ID.
646  * @bus: the target MII bus
647  * @addr: PHY address on the MII bus
648  * @phy_id: where to store the ID retrieved.
649  *
650  * Description: Reads the ID registers of the PHY at @addr on the
651  *   @bus, stores it in @phy_id and returns zero on success.
652  */
653 int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
654 {
655         int phy_reg;
656
657         /* Grab the bits from PHYIR1, and put them
658          * in the upper half */
659         phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
660
661         if (phy_reg < 0)
662                 return -EIO;
663
664         *phy_id = (phy_reg & 0xffff) << 16;
665
666         /* Grab the bits from PHYIR2, and put them in the lower half */
667         phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
668
669         if (phy_reg < 0)
670                 return -EIO;
671
672         *phy_id |= (phy_reg & 0xffff);
673
674         return 0;
675 }
676
677 static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
678                 unsigned phy_mask, int devad, phy_interface_t interface)
679 {
680         u32 phy_id = 0xffffffff;
681         while (phy_mask) {
682                 int addr = ffs(phy_mask) - 1;
683                 int r = get_phy_id(bus, addr, devad, &phy_id);
684                 /* If the PHY ID is mostly f's, we didn't find anything */
685                 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff)
686                         return phy_device_create(bus, addr, phy_id, interface);
687                 phy_mask &= ~(1 << addr);
688         }
689         return NULL;
690 }
691
692 static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
693                 unsigned phy_mask, phy_interface_t interface)
694 {
695         /* If we have one, return the existing device, with new interface */
696         while (phy_mask) {
697                 int addr = ffs(phy_mask) - 1;
698                 if (bus->phymap[addr]) {
699                         bus->phymap[addr]->interface = interface;
700                         return bus->phymap[addr];
701                 }
702                 phy_mask &= ~(1 << addr);
703         }
704         return NULL;
705 }
706
707 static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
708                 unsigned phy_mask, phy_interface_t interface)
709 {
710         int i;
711         struct phy_device *phydev;
712
713         phydev = search_for_existing_phy(bus, phy_mask, interface);
714         if (phydev)
715                 return phydev;
716         /* Try Standard (ie Clause 22) access */
717         /* Otherwise we have to try Clause 45 */
718         for (i = 0; i < 5; i++) {
719                 phydev = create_phy_by_mask(bus, phy_mask,
720                                 i ? i : MDIO_DEVAD_NONE, interface);
721                 if (IS_ERR(phydev))
722                         return NULL;
723                 if (phydev)
724                         return phydev;
725         }
726
727         debug("\n%s PHY: ", bus->name);
728         while (phy_mask) {
729                 int addr = ffs(phy_mask) - 1;
730                 debug("%d ", addr);
731                 phy_mask &= ~(1 << addr);
732         }
733         debug("not found\n");
734
735         return NULL;
736 }
737
738 /**
739  * get_phy_device - reads the specified PHY device and returns its @phy_device struct
740  * @bus: the target MII bus
741  * @addr: PHY address on the MII bus
742  *
743  * Description: Reads the ID registers of the PHY at @addr on the
744  *   @bus, then allocates and returns the phy_device to represent it.
745  */
746 static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
747                                          phy_interface_t interface)
748 {
749         return get_phy_device_by_mask(bus, 1 << addr, interface);
750 }
751
752 int phy_reset(struct phy_device *phydev)
753 {
754         int reg;
755         int timeout = 500;
756         int devad = MDIO_DEVAD_NONE;
757
758         if (phydev->flags & PHY_FLAG_BROKEN_RESET)
759                 return 0;
760
761 #ifdef CONFIG_PHYLIB_10G
762         /* If it's 10G, we need to issue reset through one of the MMDs */
763         if (is_10g_interface(phydev->interface)) {
764                 if (!phydev->mmds)
765                         gen10g_discover_mmds(phydev);
766
767                 devad = ffs(phydev->mmds) - 1;
768         }
769 #endif
770
771         if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
772                 debug("PHY reset failed\n");
773                 return -1;
774         }
775
776 #ifdef CONFIG_PHY_RESET_DELAY
777         udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
778 #endif
779         /*
780          * Poll the control register for the reset bit to go to 0 (it is
781          * auto-clearing).  This should happen within 0.5 seconds per the
782          * IEEE spec.
783          */
784         reg = phy_read(phydev, devad, MII_BMCR);
785         while ((reg & BMCR_RESET) && timeout--) {
786                 reg = phy_read(phydev, devad, MII_BMCR);
787
788                 if (reg < 0) {
789                         debug("PHY status read failed\n");
790                         return -1;
791                 }
792                 udelay(1000);
793         }
794
795         if (reg & BMCR_RESET) {
796                 puts("PHY reset timed out\n");
797                 return -1;
798         }
799
800         return 0;
801 }
802
803 int miiphy_reset(const char *devname, unsigned char addr)
804 {
805         struct mii_dev *bus = miiphy_get_dev_by_name(devname);
806         struct phy_device *phydev;
807
808         /*
809          * miiphy_reset was only used on standard PHYs, so we'll fake it here.
810          * If later code tries to connect with the right interface, this will
811          * be corrected by get_phy_device in phy_connect()
812          */
813         phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
814
815         return phy_reset(phydev);
816 }
817
818 struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
819                 phy_interface_t interface)
820 {
821         /* Reset the bus */
822         if (bus->reset) {
823                 bus->reset(bus);
824
825                 /* Wait 15ms to make sure the PHY has come out of hard reset */
826                 udelay(15000);
827         }
828
829         return get_phy_device_by_mask(bus, phy_mask, interface);
830 }
831
832 #ifdef CONFIG_DM_ETH
833 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
834 #else
835 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
836 #endif
837 {
838         /* Soft Reset the PHY */
839         phy_reset(phydev);
840         if (phydev->dev && phydev->dev != dev) {
841                 printf("%s:%d is connected to %s.  Reconnecting to %s\n",
842                                 phydev->bus->name, phydev->addr,
843                                 phydev->dev->name, dev->name);
844         }
845         phydev->dev = dev;
846         debug("%s connected to %s\n", dev->name, phydev->drv->name);
847 }
848
849 #ifdef CONFIG_DM_ETH
850 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
851                 struct udevice *dev, phy_interface_t interface)
852 #else
853 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
854                 struct eth_device *dev, phy_interface_t interface)
855 #endif
856 {
857         struct phy_device *phydev;
858
859         phydev = phy_find_by_mask(bus, 1 << addr, interface);
860         if (phydev)
861                 phy_connect_dev(phydev, dev);
862         else
863                 printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
864         return phydev;
865 }
866
867 /*
868  * Start the PHY.  Returns 0 on success, or a negative error code.
869  */
870 int phy_startup(struct phy_device *phydev)
871 {
872         if (phydev->drv->startup)
873                 return phydev->drv->startup(phydev);
874
875         return 0;
876 }
877
878 __weak int board_phy_config(struct phy_device *phydev)
879 {
880         if (phydev->drv->config)
881                 return phydev->drv->config(phydev);
882         return 0;
883 }
884
885 int phy_config(struct phy_device *phydev)
886 {
887         /* Invoke an optional board-specific helper */
888         return board_phy_config(phydev);
889 }
890
891 int phy_shutdown(struct phy_device *phydev)
892 {
893         if (phydev->drv->shutdown)
894                 phydev->drv->shutdown(phydev);
895
896         return 0;
897 }
898
899 int phy_get_interface_by_name(const char *str)
900 {
901         int i;
902
903         for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
904                 if (!strcmp(str, phy_interface_strings[i]))
905                         return i;
906         }
907
908         return -1;
909 }