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drivers/net/vsc9953: Add command to show/clear port counters
[u-boot] / drivers / net / vsc9953.c
1 /*
2  *  Copyright 2014 Freescale Semiconductor, Inc.
3  *
4  *  SPDX-License-Identifier:      GPL-2.0+
5  *
6  *  Driver for the Vitesse VSC9953 L2 Switch
7  */
8
9 #include <asm/io.h>
10 #include <asm/fsl_serdes.h>
11 #include <fm_eth.h>
12 #include <fsl_memac.h>
13 #include <bitfield.h>
14 #include <errno.h>
15 #include <malloc.h>
16 #include <vsc9953.h>
17 #include <ethsw.h>
18
19 static struct vsc9953_info vsc9953_l2sw = {
20                 .port[0] = VSC9953_PORT_INFO_INITIALIZER(0),
21                 .port[1] = VSC9953_PORT_INFO_INITIALIZER(1),
22                 .port[2] = VSC9953_PORT_INFO_INITIALIZER(2),
23                 .port[3] = VSC9953_PORT_INFO_INITIALIZER(3),
24                 .port[4] = VSC9953_PORT_INFO_INITIALIZER(4),
25                 .port[5] = VSC9953_PORT_INFO_INITIALIZER(5),
26                 .port[6] = VSC9953_PORT_INFO_INITIALIZER(6),
27                 .port[7] = VSC9953_PORT_INFO_INITIALIZER(7),
28                 .port[8] = VSC9953_PORT_INFO_INITIALIZER(8),
29                 .port[9] = VSC9953_PORT_INFO_INITIALIZER(9),
30 };
31
32 void vsc9953_port_info_set_mdio(int port_no, struct mii_dev *bus)
33 {
34         if (!VSC9953_PORT_CHECK(port_no))
35                 return;
36
37         vsc9953_l2sw.port[port_no].bus = bus;
38 }
39
40 void vsc9953_port_info_set_phy_address(int port_no, int address)
41 {
42         if (!VSC9953_PORT_CHECK(port_no))
43                 return;
44
45         vsc9953_l2sw.port[port_no].phyaddr = address;
46 }
47
48 void vsc9953_port_info_set_phy_int(int port_no, phy_interface_t phy_int)
49 {
50         if (!VSC9953_PORT_CHECK(port_no))
51                 return;
52
53         vsc9953_l2sw.port[port_no].enet_if = phy_int;
54 }
55
56 void vsc9953_port_enable(int port_no)
57 {
58         if (!VSC9953_PORT_CHECK(port_no))
59                 return;
60
61         vsc9953_l2sw.port[port_no].enabled = 1;
62 }
63
64 void vsc9953_port_disable(int port_no)
65 {
66         if (!VSC9953_PORT_CHECK(port_no))
67                 return;
68
69         vsc9953_l2sw.port[port_no].enabled = 0;
70 }
71
72 static void vsc9953_mdio_write(struct vsc9953_mii_mng *phyregs, int port_addr,
73                 int regnum, int value)
74 {
75         int timeout = 50000;
76
77         out_le32(&phyregs->miimcmd, (0x1 << 31) | ((port_addr & 0x1f) << 25) |
78                         ((regnum & 0x1f) << 20) | ((value & 0xffff) << 4) |
79                         (0x1 << 1));
80         asm("sync");
81
82         while ((in_le32(&phyregs->miimstatus) & 0x8) && --timeout)
83                 udelay(1);
84
85         if (timeout == 0)
86                 debug("Timeout waiting for MDIO write\n");
87 }
88
89 static int vsc9953_mdio_read(struct vsc9953_mii_mng *phyregs, int port_addr,
90                 int regnum)
91 {
92         int value = 0xFFFF;
93         int timeout = 50000;
94
95         while ((in_le32(&phyregs->miimstatus) & MIIMIND_OPR_PEND) && --timeout)
96                 udelay(1);
97         if (timeout == 0) {
98                 debug("Timeout waiting for MDIO operation to finish\n");
99                 return value;
100         }
101
102         /* Put the address of the phy, and the register
103          * number into MIICMD
104          */
105         out_le32(&phyregs->miimcmd, (0x1 << 31) | ((port_addr & 0x1f) << 25) |
106                         ((regnum & 0x1f) << 20) | ((value & 0xffff) << 4) |
107                         (0x2 << 1));
108
109         timeout = 50000;
110         /* Wait for the the indication that the read is done */
111         while ((in_le32(&phyregs->miimstatus) & 0x8) && --timeout)
112                 udelay(1);
113         if (timeout == 0)
114                 debug("Timeout waiting for MDIO read\n");
115
116         /* Grab the value read from the PHY */
117         value = in_le32(&phyregs->miimdata);
118
119         if ((value & 0x00030000) == 0)
120                 return value & 0x0000ffff;
121
122         return value;
123 }
124
125 static int init_phy(struct eth_device *dev)
126 {
127         struct vsc9953_port_info *l2sw_port = dev->priv;
128         struct phy_device *phydev = NULL;
129
130 #ifdef CONFIG_PHYLIB
131         if (!l2sw_port->bus)
132                 return 0;
133         phydev = phy_connect(l2sw_port->bus, l2sw_port->phyaddr, dev,
134                         l2sw_port->enet_if);
135         if (!phydev) {
136                 printf("Failed to connect\n");
137                 return -1;
138         }
139
140         phydev->supported &= SUPPORTED_10baseT_Half |
141                         SUPPORTED_10baseT_Full |
142                         SUPPORTED_100baseT_Half |
143                         SUPPORTED_100baseT_Full |
144                         SUPPORTED_1000baseT_Full;
145         phydev->advertising = phydev->supported;
146
147         l2sw_port->phydev = phydev;
148
149         phy_config(phydev);
150 #endif
151
152         return 0;
153 }
154
155 static int vsc9953_port_init(int port_no)
156 {
157         struct eth_device *dev;
158
159         /* Internal ports never have a PHY */
160         if (VSC9953_INTERNAL_PORT_CHECK(port_no))
161                 return 0;
162
163         /* alloc eth device */
164         dev = (struct eth_device *)calloc(1, sizeof(struct eth_device));
165         if (!dev)
166                 return -ENOMEM;
167
168         sprintf(dev->name, "SW@PORT%d", port_no);
169         dev->priv = &vsc9953_l2sw.port[port_no];
170         dev->init = NULL;
171         dev->halt = NULL;
172         dev->send = NULL;
173         dev->recv = NULL;
174
175         if (init_phy(dev)) {
176                 free(dev);
177                 return -ENODEV;
178         }
179
180         return 0;
181 }
182
183 static int vsc9953_vlan_table_poll_idle(void)
184 {
185         struct vsc9953_analyzer *l2ana_reg;
186         int timeout;
187
188         l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
189                         VSC9953_ANA_OFFSET);
190
191         timeout = 50000;
192         while (((in_le32(&l2ana_reg->ana_tables.vlan_access) &
193                  VSC9953_VLAN_CMD_MASK) != VSC9953_VLAN_CMD_IDLE) && --timeout)
194                 udelay(1);
195
196         return timeout ? 0 : -EBUSY;
197 }
198
199 /* vlan table set/clear all membership of vid */
200 static void vsc9953_vlan_table_membership_all_set(int vid, int set_member)
201 {
202         uint val;
203         struct vsc9953_analyzer *l2ana_reg;
204
205         l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
206                         VSC9953_ANA_OFFSET);
207
208         if (vsc9953_vlan_table_poll_idle() < 0) {
209                 debug("VLAN table timeout\n");
210                 return;
211         }
212
213         /* read current vlan configuration */
214         val = in_le32(&l2ana_reg->ana_tables.vlan_tidx);
215         out_le32(&l2ana_reg->ana_tables.vlan_tidx,
216                  bitfield_replace_by_mask(val, VSC9953_ANA_TBL_VID_MASK, vid));
217
218         clrsetbits_le32(&l2ana_reg->ana_tables.vlan_access,
219                         VSC9953_VLAN_CMD_MASK, VSC9953_VLAN_CMD_READ);
220
221         if (vsc9953_vlan_table_poll_idle() < 0) {
222                 debug("VLAN table timeout\n");
223                 return;
224         }
225
226         val = in_le32(&l2ana_reg->ana_tables.vlan_tidx);
227         out_le32(&l2ana_reg->ana_tables.vlan_tidx,
228                  bitfield_replace_by_mask(val, VSC9953_ANA_TBL_VID_MASK, vid));
229
230         clrsetbits_le32(&l2ana_reg->ana_tables.vlan_access,
231                         VSC9953_VLAN_PORT_MASK | VSC9953_VLAN_CMD_MASK,
232                         VSC9953_VLAN_CMD_WRITE |
233                         (set_member ? VSC9953_VLAN_PORT_MASK : 0));
234 }
235
236 /* Set PVID for a VSC9953 port */
237 static void vsc9953_port_vlan_pvid_set(int port_no, int pvid)
238 {
239         uint val;
240         struct vsc9953_analyzer *l2ana_reg;
241         struct vsc9953_rew_reg *l2rew_reg;
242
243         /* Administrative down */
244         if (!vsc9953_l2sw.port[port_no].enabled) {
245                 printf("Port %d is administrative down\n", port_no);
246                 return;
247         }
248
249         l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
250                         VSC9953_ANA_OFFSET);
251         l2rew_reg = (struct vsc9953_rew_reg *)(VSC9953_OFFSET +
252                         VSC9953_REW_OFFSET);
253
254         /* Set PVID on ingress */
255         val = in_le32(&l2ana_reg->port[port_no].vlan_cfg);
256         val = bitfield_replace_by_mask(val, VSC9953_VLAN_CFG_VID_MASK, pvid);
257         out_le32(&l2ana_reg->port[port_no].vlan_cfg, val);
258
259         /* Set PVID on egress */
260         val = in_le32(&l2rew_reg->port[port_no].port_vlan_cfg);
261         val = bitfield_replace_by_mask(val, VSC9953_PORT_VLAN_CFG_VID_MASK,
262                                        pvid);
263         out_le32(&l2rew_reg->port[port_no].port_vlan_cfg, val);
264 }
265
266 static void vsc9953_port_all_vlan_pvid_set(int pvid)
267 {
268         int i;
269
270         for (i = 0; i < VSC9953_MAX_PORTS; i++)
271                 vsc9953_port_vlan_pvid_set(i, pvid);
272 }
273
274 /* Enable/disable vlan aware of a VSC9953 port */
275 static void vsc9953_port_vlan_aware_set(int port_no, int enabled)
276 {
277         struct vsc9953_analyzer *l2ana_reg;
278
279         /* Administrative down */
280         if (!vsc9953_l2sw.port[port_no].enabled) {
281                 printf("Port %d is administrative down\n", port_no);
282                 return;
283         }
284
285         l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
286                         VSC9953_ANA_OFFSET);
287
288         if (enabled)
289                 setbits_le32(&l2ana_reg->port[port_no].vlan_cfg,
290                              VSC9953_VLAN_CFG_AWARE_ENA);
291         else
292                 clrbits_le32(&l2ana_reg->port[port_no].vlan_cfg,
293                              VSC9953_VLAN_CFG_AWARE_ENA);
294 }
295
296 /* Set all VSC9953 ports' vlan aware  */
297 static void vsc9953_port_all_vlan_aware_set(int enabled)
298 {
299         int i;
300
301         for (i = 0; i < VSC9953_MAX_PORTS; i++)
302                 vsc9953_port_vlan_aware_set(i, enabled);
303 }
304
305 /* Enable/disable vlan pop count of a VSC9953 port */
306 static void vsc9953_port_vlan_popcnt_set(int port_no, int popcnt)
307 {
308         uint val;
309         struct vsc9953_analyzer *l2ana_reg;
310
311         /* Administrative down */
312         if (!vsc9953_l2sw.port[port_no].enabled) {
313                 printf("Port %d is administrative down\n", port_no);
314                 return;
315         }
316
317         if (popcnt > 3 || popcnt < 0) {
318                 printf("Invalid pop count value: %d\n", port_no);
319                 return;
320         }
321
322         l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
323                         VSC9953_ANA_OFFSET);
324
325         val = in_le32(&l2ana_reg->port[port_no].vlan_cfg);
326         val = bitfield_replace_by_mask(val, VSC9953_VLAN_CFG_POP_CNT_MASK,
327                                        popcnt);
328         out_le32(&l2ana_reg->port[port_no].vlan_cfg, val);
329 }
330
331 /* Set all VSC9953 ports' pop count  */
332 static void vsc9953_port_all_vlan_poncnt_set(int popcnt)
333 {
334         int i;
335
336         for (i = 0; i < VSC9953_MAX_PORTS; i++)
337                 vsc9953_port_vlan_popcnt_set(i, popcnt);
338 }
339
340 /* Enable/disable learning for frames dropped due to ingress filtering */
341 static void vsc9953_vlan_ingr_fltr_learn_drop(int enable)
342 {
343         struct vsc9953_analyzer *l2ana_reg;
344
345         l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
346                         VSC9953_ANA_OFFSET);
347
348         if (enable)
349                 setbits_le32(&l2ana_reg->ana.adv_learn, VSC9953_VLAN_CHK);
350         else
351                 clrbits_le32(&l2ana_reg->ana.adv_learn, VSC9953_VLAN_CHK);
352 }
353
354 /* Egress untag modes of a VSC9953 port */
355 enum egress_untag_mode {
356         EGRESS_UNTAG_ALL = 0,
357         EGRESS_UNTAG_PVID_AND_ZERO,
358         EGRESS_UNTAG_ZERO,
359         EGRESS_UNTAG_NONE,
360 };
361
362 static void vsc9953_port_vlan_egr_untag_set(int port_no,
363                                             enum egress_untag_mode mode)
364 {
365         struct vsc9953_rew_reg *l2rew_reg;
366
367         /* Administrative down */
368         if (!vsc9953_l2sw.port[port_no].enabled) {
369                 printf("Port %d is administrative down\n", port_no);
370                 return;
371         }
372
373         l2rew_reg = (struct vsc9953_rew_reg *)(VSC9953_OFFSET +
374                         VSC9953_REW_OFFSET);
375
376         switch (mode) {
377         case EGRESS_UNTAG_ALL:
378                 clrsetbits_le32(&l2rew_reg->port[port_no].port_tag_cfg,
379                                 VSC9953_TAG_CFG_MASK, VSC9953_TAG_CFG_NONE);
380                 break;
381         case EGRESS_UNTAG_PVID_AND_ZERO:
382                 clrsetbits_le32(&l2rew_reg->port[port_no].port_tag_cfg,
383                                 VSC9953_TAG_CFG_MASK,
384                                 VSC9953_TAG_CFG_ALL_BUT_PVID_ZERO);
385                 break;
386         case EGRESS_UNTAG_ZERO:
387                 clrsetbits_le32(&l2rew_reg->port[port_no].port_tag_cfg,
388                                 VSC9953_TAG_CFG_MASK,
389                                 VSC9953_TAG_CFG_ALL_BUT_ZERO);
390                 break;
391         case EGRESS_UNTAG_NONE:
392                 clrsetbits_le32(&l2rew_reg->port[port_no].port_tag_cfg,
393                                 VSC9953_TAG_CFG_MASK, VSC9953_TAG_CFG_ALL);
394                 break;
395         default:
396                 printf("Unknown untag mode for port %d\n", port_no);
397         }
398 }
399
400 static void vsc9953_port_all_vlan_egress_untagged_set(
401                 enum egress_untag_mode mode)
402 {
403         int i;
404
405         for (i = 0; i < VSC9953_MAX_PORTS; i++)
406                 vsc9953_port_vlan_egr_untag_set(i, mode);
407 }
408
409 #ifdef CONFIG_CMD_ETHSW
410
411 /* Enable/disable status of a VSC9953 port */
412 static void vsc9953_port_status_set(int port_no, u8 enabled)
413 {
414         struct vsc9953_qsys_reg *l2qsys_reg;
415
416         /* Administrative down */
417         if (!vsc9953_l2sw.port[port_no].enabled)
418                 return;
419
420         l2qsys_reg = (struct vsc9953_qsys_reg *)(VSC9953_OFFSET +
421                         VSC9953_QSYS_OFFSET);
422
423         if (enabled)
424                 setbits_le32(&l2qsys_reg->sys.switch_port_mode[port_no],
425                              VSC9953_PORT_ENA);
426         else
427                 clrbits_le32(&l2qsys_reg->sys.switch_port_mode[port_no],
428                              VSC9953_PORT_ENA);
429 }
430
431 /* Start autonegotiation for a VSC9953 PHY */
432 static void vsc9953_phy_autoneg(int port_no)
433 {
434         if (!vsc9953_l2sw.port[port_no].phydev)
435                 return;
436
437         if (vsc9953_l2sw.port[port_no].phydev->drv->startup(
438                         vsc9953_l2sw.port[port_no].phydev))
439                 printf("Failed to start PHY for port %d\n", port_no);
440 }
441
442 /* Print a VSC9953 port's configuration */
443 static void vsc9953_port_config_show(int port_no)
444 {
445         int speed;
446         int duplex;
447         int link;
448         u8 enabled;
449         u32 val;
450         struct vsc9953_qsys_reg *l2qsys_reg;
451
452         l2qsys_reg = (struct vsc9953_qsys_reg *)(VSC9953_OFFSET +
453                         VSC9953_QSYS_OFFSET);
454
455         val = in_le32(&l2qsys_reg->sys.switch_port_mode[port_no]);
456         enabled = vsc9953_l2sw.port[port_no].enabled &&
457                   (val & VSC9953_PORT_ENA);
458
459         /* internal ports (8 and 9) are fixed */
460         if (VSC9953_INTERNAL_PORT_CHECK(port_no)) {
461                 link = 1;
462                 speed = SPEED_2500;
463                 duplex = DUPLEX_FULL;
464         } else {
465                 if (vsc9953_l2sw.port[port_no].phydev) {
466                         link = vsc9953_l2sw.port[port_no].phydev->link;
467                         speed = vsc9953_l2sw.port[port_no].phydev->speed;
468                         duplex = vsc9953_l2sw.port[port_no].phydev->duplex;
469                 } else {
470                         link = -1;
471                         speed = -1;
472                         duplex = -1;
473                 }
474         }
475
476         printf("%8d ", port_no);
477         printf("%8s ", enabled == 1 ? "enabled" : "disabled");
478         printf("%8s ", link == 1 ? "up" : "down");
479
480         switch (speed) {
481         case SPEED_10:
482                 printf("%8d ", 10);
483                 break;
484         case SPEED_100:
485                 printf("%8d ", 100);
486                 break;
487         case SPEED_1000:
488                 printf("%8d ", 1000);
489                 break;
490         case SPEED_2500:
491                 printf("%8d ", 2500);
492                 break;
493         case SPEED_10000:
494                 printf("%8d ", 10000);
495                 break;
496         default:
497                 printf("%8s ", "-");
498         }
499
500         printf("%8s\n", duplex == DUPLEX_FULL ? "full" : "half");
501 }
502
503 /* Show VSC9953 ports' statistics */
504 static void vsc9953_port_statistics_show(int port_no)
505 {
506         u32 rx_val;
507         u32 tx_val;
508         struct vsc9953_system_reg *l2sys_reg;
509
510         /* Administrative down */
511         if (!vsc9953_l2sw.port[port_no].enabled) {
512                 printf("Port %d is administrative down\n", port_no);
513                 return;
514         }
515
516         l2sys_reg = (struct vsc9953_system_reg *)(VSC9953_OFFSET +
517                         VSC9953_SYS_OFFSET);
518
519         printf("Statistics for L2 Switch port %d:\n", port_no);
520
521         /* Set counter view for our port */
522         out_le32(&l2sys_reg->sys.stat_cfg, port_no);
523
524 #define VSC9953_STATS_PRINTF "%-15s %10u"
525
526         /* Get number of Rx and Tx frames */
527         rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_short) +
528                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_frag) +
529                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_jabber) +
530                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_long) +
531                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_64) +
532                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_65_127) +
533                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_128_255) +
534                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_256_511) +
535                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_512_1023) +
536                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_1024_1526) +
537                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_jumbo);
538         tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_64) +
539                  in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_65_127) +
540                  in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_128_255) +
541                  in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_256_511) +
542                  in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_512_1023) +
543                  in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_1024_1526) +
544                  in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_jumbo);
545         printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
546                "Rx frames:", rx_val, "Tx frames:", tx_val);
547
548         /* Get number of Rx and Tx bytes */
549         rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_oct);
550         tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_oct);
551         printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
552                "Rx bytes:", rx_val, "Tx bytes:", tx_val);
553
554         /* Get number of Rx frames received ok and Tx frames sent ok */
555         rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_0) +
556                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_1) +
557                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_2) +
558                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_3) +
559                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_4) +
560                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_5) +
561                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_6) +
562                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_7) +
563                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_0) +
564                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_1) +
565                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_2) +
566                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_3) +
567                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_4) +
568                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_5) +
569                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_6) +
570                  in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_7);
571         tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_64) +
572                  in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_65_127) +
573                  in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_128_255) +
574                  in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_256_511) +
575                  in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_512_1023) +
576                  in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_1024_1526) +
577                  in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_jumbo);
578         printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
579                "Rx frames ok:", rx_val, "Tx frames ok:", tx_val);
580
581         /* Get number of Rx and Tx unicast frames */
582         rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_uc);
583         tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_uc);
584         printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
585                "Rx unicast:", rx_val, "Tx unicast:", tx_val);
586
587         /* Get number of Rx and Tx broadcast frames */
588         rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_bc);
589         tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_bc);
590         printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
591                "Rx broadcast:", rx_val, "Tx broadcast:", tx_val);
592
593         /* Get number of Rx and Tx frames of 64B */
594         rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_64);
595         tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_64);
596         printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
597                "Rx 64B:", rx_val, "Tx 64B:", tx_val);
598
599         /* Get number of Rx and Tx frames with sizes between 65B and 127B */
600         rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_65_127);
601         tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_65_127);
602         printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
603                "Rx 65B-127B:", rx_val, "Tx 65B-127B:", tx_val);
604
605         /* Get number of Rx and Tx frames with sizes between 128B and 255B */
606         rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_128_255);
607         tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_128_255);
608         printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
609                "Rx 128B-255B:", rx_val, "Tx 128B-255B:", tx_val);
610
611         /* Get number of Rx and Tx frames with sizes between 256B and 511B */
612         rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_256_511);
613         tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_256_511);
614         printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
615                "Rx 256B-511B:", rx_val, "Tx 256B-511B:", tx_val);
616
617         /* Get number of Rx and Tx frames with sizes between 512B and 1023B */
618         rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_512_1023);
619         tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_512_1023);
620         printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
621                "Rx 512B-1023B:", rx_val, "Tx 512B-1023B:", tx_val);
622
623         /* Get number of Rx and Tx frames with sizes between 1024B and 1526B */
624         rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_1024_1526);
625         tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_1024_1526);
626         printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
627                "Rx 1024B-1526B:", rx_val, "Tx 1024B-1526B:", tx_val);
628
629         /* Get number of Rx and Tx jumbo frames */
630         rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_jumbo);
631         tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_jumbo);
632         printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
633                "Rx jumbo:", rx_val, "Tx jumbo:", tx_val);
634
635         /* Get number of Rx and Tx dropped frames */
636         rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_cat_drop) +
637                  in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_tail) +
638                  in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_0) +
639                  in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_1) +
640                  in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_2) +
641                  in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_3) +
642                  in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_4) +
643                  in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_5) +
644                  in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_6) +
645                  in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_7) +
646                  in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_0) +
647                  in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_1) +
648                  in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_2) +
649                  in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_3) +
650                  in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_4) +
651                  in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_5) +
652                  in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_6) +
653                  in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_7);
654         tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_drop) +
655                  in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_aged);
656         printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
657                "Rx drops:", rx_val, "Tx drops:", tx_val);
658
659         /*
660          * Get number of Rx frames with CRC or alignment errors
661          * and number of detected Tx collisions
662          */
663         rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_crc);
664         tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_col);
665         printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
666                "Rx CRC&align:", rx_val, "Tx coll:", tx_val);
667
668         /*
669          * Get number of Rx undersized frames and
670          * number of Tx aged frames
671          */
672         rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_short);
673         tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_aged);
674         printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
675                "Rx undersize:", rx_val, "Tx aged:", tx_val);
676
677         /* Get number of Rx oversized frames */
678         rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_long);
679         printf(VSC9953_STATS_PRINTF"\n", "Rx oversized:", rx_val);
680
681         /* Get number of Rx fragmented frames */
682         rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_frag);
683         printf(VSC9953_STATS_PRINTF"\n", "Rx fragments:", rx_val);
684
685         /* Get number of Rx jabber errors */
686         rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_jabber);
687         printf(VSC9953_STATS_PRINTF"\n", "Rx jabbers:", rx_val);
688
689         /*
690          * Get number of Rx frames filtered due to classification rules or
691          * no destination ports
692          */
693         rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_cat_drop) +
694                  in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_local);
695         printf(VSC9953_STATS_PRINTF"\n", "Rx filtered:", rx_val);
696
697         printf("\n");
698 }
699
700 /* Clear statistics for a VSC9953 port */
701 static void vsc9953_port_statistics_clear(int port_no)
702 {
703         struct vsc9953_system_reg *l2sys_reg;
704
705         /* Administrative down */
706         if (!vsc9953_l2sw.port[port_no].enabled) {
707                 printf("Port %d is administrative down\n", port_no);
708                 return;
709         }
710
711         l2sys_reg = (struct vsc9953_system_reg *)(VSC9953_OFFSET +
712                         VSC9953_SYS_OFFSET);
713
714         /* Clear all counter groups for our ports */
715         out_le32(&l2sys_reg->sys.stat_cfg, port_no |
716                  VSC9953_STAT_CLEAR_RX | VSC9953_STAT_CLEAR_TX |
717                  VSC9953_STAT_CLEAR_DR);
718 }
719
720 static int vsc9953_port_status_key_func(struct ethsw_command_def *parsed_cmd)
721 {
722         int i;
723         u8 enabled;
724
725         /* Last keyword should tell us if we should enable/disable the port */
726         if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] ==
727             ethsw_id_enable)
728                 enabled = 1;
729         else if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] ==
730                  ethsw_id_disable)
731                 enabled = 0;
732         else
733                 return CMD_RET_USAGE;
734
735         if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
736                 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
737                         printf("Invalid port number: %d\n", parsed_cmd->port);
738                         return CMD_RET_FAILURE;
739                 }
740                 vsc9953_port_status_set(parsed_cmd->port, enabled);
741         } else {
742                 for (i = 0; i < VSC9953_MAX_PORTS; i++)
743                         vsc9953_port_status_set(i, enabled);
744         }
745
746         return CMD_RET_SUCCESS;
747 }
748
749 static int vsc9953_port_config_key_func(struct ethsw_command_def *parsed_cmd)
750 {
751         int i;
752
753         if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
754                 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
755                         printf("Invalid port number: %d\n", parsed_cmd->port);
756                         return CMD_RET_FAILURE;
757                 }
758                 vsc9953_phy_autoneg(parsed_cmd->port);
759                 printf("%8s %8s %8s %8s %8s\n",
760                        "Port", "Status", "Link", "Speed",
761                        "Duplex");
762                 vsc9953_port_config_show(parsed_cmd->port);
763
764         } else {
765                 for (i = 0; i < VSC9953_MAX_PORTS; i++)
766                         vsc9953_phy_autoneg(i);
767                 printf("%8s %8s %8s %8s %8s\n",
768                        "Port", "Status", "Link", "Speed", "Duplex");
769                 for (i = 0; i < VSC9953_MAX_PORTS; i++)
770                         vsc9953_port_config_show(i);
771         }
772
773         return CMD_RET_SUCCESS;
774 }
775
776 static int vsc9953_port_stats_key_func(struct ethsw_command_def *parsed_cmd)
777 {
778         int i;
779
780         if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
781                 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
782                         printf("Invalid port number: %d\n", parsed_cmd->port);
783                         return CMD_RET_FAILURE;
784                 }
785                 vsc9953_port_statistics_show(parsed_cmd->port);
786         } else {
787                 for (i = 0; i < VSC9953_MAX_PORTS; i++)
788                         vsc9953_port_statistics_show(i);
789         }
790
791         return CMD_RET_SUCCESS;
792 }
793
794 static int vsc9953_port_stats_clear_key_func(struct ethsw_command_def
795                                              *parsed_cmd)
796 {
797         int i;
798
799         if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
800                 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
801                         printf("Invalid port number: %d\n", parsed_cmd->port);
802                         return CMD_RET_FAILURE;
803                 }
804                 vsc9953_port_statistics_clear(parsed_cmd->port);
805         } else {
806                 for (i = 0; i < VSC9953_MAX_PORTS; i++)
807                         vsc9953_port_statistics_clear(i);
808         }
809
810         return CMD_RET_SUCCESS;
811 }
812
813 static struct ethsw_command_func vsc9953_cmd_func = {
814                 .ethsw_name = "L2 Switch VSC9953",
815                 .port_enable = &vsc9953_port_status_key_func,
816                 .port_disable = &vsc9953_port_status_key_func,
817                 .port_show = &vsc9953_port_config_key_func,
818                 .port_stats = &vsc9953_port_stats_key_func,
819                 .port_stats_clear = &vsc9953_port_stats_clear_key_func,
820 };
821
822 #endif /* CONFIG_CMD_ETHSW */
823
824 /*****************************************************************************
825 At startup, the default configuration would be:
826         - HW learning enabled on all ports; (HW default)
827         - All ports are in VLAN 1;
828         - All ports are VLAN aware;
829         - All ports have POP_COUNT 1;
830         - All ports have PVID 1;
831         - All ports have TPID 0x8100; (HW default)
832         - All ports tag frames classified to all VLANs that are not PVID;
833 *****************************************************************************/
834 void vsc9953_default_configuration(void)
835 {
836         int i;
837
838         for (i = 0; i < VSC9953_MAX_VLAN; i++)
839                 vsc9953_vlan_table_membership_all_set(i, 0);
840         vsc9953_port_all_vlan_aware_set(1);
841         vsc9953_port_all_vlan_pvid_set(1);
842         vsc9953_port_all_vlan_poncnt_set(1);
843         vsc9953_vlan_table_membership_all_set(1, 1);
844         vsc9953_vlan_ingr_fltr_learn_drop(1);
845         vsc9953_port_all_vlan_egress_untagged_set(EGRESS_UNTAG_PVID_AND_ZERO);
846 }
847
848 void vsc9953_init(bd_t *bis)
849 {
850         u32 i;
851         u32 hdx_cfg = 0;
852         u32 phy_addr = 0;
853         int timeout;
854         struct vsc9953_system_reg *l2sys_reg;
855         struct vsc9953_qsys_reg *l2qsys_reg;
856         struct vsc9953_dev_gmii *l2dev_gmii_reg;
857         struct vsc9953_analyzer *l2ana_reg;
858         struct vsc9953_devcpu_gcb *l2dev_gcb;
859
860         l2dev_gmii_reg = (struct vsc9953_dev_gmii *)(VSC9953_OFFSET +
861                         VSC9953_DEV_GMII_OFFSET);
862
863         l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
864                         VSC9953_ANA_OFFSET);
865
866         l2sys_reg = (struct vsc9953_system_reg *)(VSC9953_OFFSET +
867                         VSC9953_SYS_OFFSET);
868
869         l2qsys_reg = (struct vsc9953_qsys_reg *)(VSC9953_OFFSET +
870                         VSC9953_QSYS_OFFSET);
871
872         l2dev_gcb = (struct vsc9953_devcpu_gcb *)(VSC9953_OFFSET +
873                         VSC9953_DEVCPU_GCB);
874
875         out_le32(&l2dev_gcb->chip_regs.soft_rst,
876                  VSC9953_SOFT_SWC_RST_ENA);
877         timeout = 50000;
878         while ((in_le32(&l2dev_gcb->chip_regs.soft_rst) &
879                         VSC9953_SOFT_SWC_RST_ENA) && --timeout)
880                 udelay(1); /* busy wait for vsc9953 soft reset */
881         if (timeout == 0)
882                 debug("Timeout waiting for VSC9953 to reset\n");
883
884         out_le32(&l2sys_reg->sys.reset_cfg, VSC9953_MEM_ENABLE |
885                  VSC9953_MEM_INIT);
886
887         timeout = 50000;
888         while ((in_le32(&l2sys_reg->sys.reset_cfg) &
889                 VSC9953_MEM_INIT) && --timeout)
890                 udelay(1); /* busy wait for vsc9953 memory init */
891         if (timeout == 0)
892                 debug("Timeout waiting for VSC9953 memory to initialize\n");
893
894         out_le32(&l2sys_reg->sys.reset_cfg, (in_le32(&l2sys_reg->sys.reset_cfg)
895                         | VSC9953_CORE_ENABLE));
896
897         /* VSC9953 Setting to be done once only */
898         out_le32(&l2qsys_reg->sys.ext_cpu_cfg, 0x00000b00);
899
900         for (i = 0; i < VSC9953_MAX_PORTS; i++) {
901                 if (vsc9953_port_init(i))
902                         printf("Failed to initialize l2switch port %d\n", i);
903
904                 /* Enable VSC9953 GMII Ports Port ID 0 - 7 */
905                 if (VSC9953_INTERNAL_PORT_CHECK(i)) {
906                         out_le32(&l2ana_reg->pfc[i].pfc_cfg,
907                                  VSC9953_PFC_FC_QSGMII);
908                         out_le32(&l2sys_reg->pause_cfg.mac_fc_cfg[i],
909                                  VSC9953_MAC_FC_CFG_QSGMII);
910                 } else {
911                         out_le32(&l2ana_reg->pfc[i].pfc_cfg,
912                                  VSC9953_PFC_FC);
913                         out_le32(&l2sys_reg->pause_cfg.mac_fc_cfg[i],
914                                  VSC9953_MAC_FC_CFG);
915                 }
916                 out_le32(&l2dev_gmii_reg->port_mode.clock_cfg,
917                          VSC9953_CLOCK_CFG);
918                 out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_ena_cfg,
919                          VSC9953_MAC_ENA_CFG);
920                 out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_mode_cfg,
921                          VSC9953_MAC_MODE_CFG);
922                 out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_ifg_cfg,
923                          VSC9953_MAC_IFG_CFG);
924                 /* mac_hdx_cfg varies with port id*/
925                 hdx_cfg = VSC9953_MAC_HDX_CFG | (i << 16);
926                 out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_hdx_cfg, hdx_cfg);
927                 out_le32(&l2sys_reg->sys.front_port_mode[i],
928                          VSC9953_FRONT_PORT_MODE);
929                 setbits_le32(&l2qsys_reg->sys.switch_port_mode[i],
930                              VSC9953_PORT_ENA);
931                 out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_maxlen_cfg,
932                          VSC9953_MAC_MAX_LEN);
933                 out_le32(&l2sys_reg->pause_cfg.pause_cfg[i],
934                          VSC9953_PAUSE_CFG);
935                 /* WAIT FOR 2 us*/
936                 udelay(2);
937
938                 l2dev_gmii_reg = (struct vsc9953_dev_gmii *)(
939                                 (char *)l2dev_gmii_reg
940                                 + T1040_SWITCH_GMII_DEV_OFFSET);
941
942                 /* Initialize Lynx PHY Wrappers */
943                 phy_addr = 0;
944                 if (vsc9953_l2sw.port[i].enet_if ==
945                                 PHY_INTERFACE_MODE_QSGMII)
946                         phy_addr = (i + 0x4) & 0x1F;
947                 else if (vsc9953_l2sw.port[i].enet_if ==
948                                 PHY_INTERFACE_MODE_SGMII)
949                         phy_addr = (i + 1) & 0x1F;
950
951                 if (phy_addr) {
952                         /* SGMII IF mode + AN enable */
953                         vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr,
954                                            0x14, PHY_SGMII_IF_MODE_AN |
955                                            PHY_SGMII_IF_MODE_SGMII);
956                         /* Dev ability according to SGMII specification */
957                         vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr,
958                                            0x4, PHY_SGMII_DEV_ABILITY_SGMII);
959                         /* Adjust link timer for SGMII
960                          * 1.6 ms in units of 8 ns = 2 * 10^5 = 0x30d40
961                          */
962                         vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr,
963                                            0x13, 0x0003);
964                         vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr,
965                                            0x12, 0x0d40);
966                         /* Restart AN */
967                         vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr,
968                                            0x0, PHY_SGMII_CR_DEF_VAL |
969                                            PHY_SGMII_CR_RESET_AN);
970
971                         timeout = 50000;
972                         while ((vsc9953_mdio_read(&l2dev_gcb->mii_mng[0],
973                                         phy_addr, 0x01) & 0x0020) && --timeout)
974                                 udelay(1); /* wait for AN to complete */
975                         if (timeout == 0)
976                                 debug("Timeout waiting for AN to complete\n");
977                 }
978         }
979
980         vsc9953_default_configuration();
981
982 #ifdef CONFIG_CMD_ETHSW
983         if (ethsw_define_functions(&vsc9953_cmd_func) < 0)
984                 debug("Unable to use \"ethsw\" commands\n");
985 #endif
986
987         printf("VSC9953 L2 switch initialized\n");
988         return;
989 }