2 # PINCTRL infrastructure and drivers
8 bool "Support pin controllers"
11 This enables the basic support for pinctrl framework. You may want
12 to enable some more options depending on what you want to do.
15 bool "Support full pin controllers"
16 depends on PINCTRL && OF_CONTROL
19 This provides Linux-compatible device tree interface for the pinctrl
20 subsystem. This feature depends on device tree configuration because
21 it parses a device tree to look for the pinctrl device which the
22 peripheral device is associated with.
24 If this option is disabled (it is the only possible choice for non-DT
25 boards), the pinctrl core provides no systematic mechanism for
26 identifying peripheral devices, applying needed pinctrl settings.
27 It is totally up to the implementation of each low-level driver.
28 You can save memory footprint in return for some limitations.
30 config PINCTRL_GENERIC
31 bool "Support generic pin controllers"
32 depends on PINCTRL_FULL
35 Say Y here if you want to use the pinctrl subsystem through the
36 generic DT interface. If enabled, some functions become available
37 to parse common properties such as "pins", "groups", "functions" and
38 some pin configuration parameters. It would be easier if you only
39 need the generic DT interface for pin muxing and pin configuration.
40 If you need to handle vendor-specific DT properties, you can disable
41 this option and implement your own set_state callback in the pinctrl
45 bool "Support pin multiplexing controllers"
46 depends on PINCTRL_GENERIC
49 This option enables pin multiplexing through the generic pinctrl
50 framework. Most SoCs have their own multiplexing arrangement where
51 a single pin can be used for several functions. An SoC pinctrl driver
52 allows the required function to be selected for each pin.
53 The driver is typically controlled by the device tree.
56 bool "Support pin configuration controllers"
57 depends on PINCTRL_GENERIC
59 This option enables pin configuration through the generic pinctrl
63 bool "Support pin controllers in SPL"
64 depends on SPL && SPL_DM
66 This option is an SPL-variant of the PINCTRL option.
67 See the help of PINCTRL for details.
69 config SPL_PINCTRL_FULL
70 bool "Support full pin controllers in SPL"
71 depends on SPL_PINCTRL && SPL_OF_CONTROL
72 default n if TARGET_STM32F746_DISCO
75 This option is an SPL-variant of the PINCTRL_FULL option.
76 See the help of PINCTRL_FULL for details.
78 config SPL_PINCTRL_GENERIC
79 bool "Support generic pin controllers in SPL"
80 depends on SPL_PINCTRL_FULL
83 This option is an SPL-variant of the PINCTRL_GENERIC option.
84 See the help of PINCTRL_GENERIC for details.
87 bool "Support pin multiplexing controllers in SPL"
88 depends on SPL_PINCTRL_GENERIC
91 This option is an SPL-variant of the PINMUX option.
92 See the help of PINMUX for details.
93 The pinctrl subsystem can add a substantial overhead to the SPL
94 image since it typically requires quite a few tables either in the
95 driver or in the device tree. If this is acceptable and you need
96 to adjust pin multiplexing in SPL in order to boot into U-Boot,
97 enable this option. You will need to enable device tree in SPL
101 bool "Support pin configuration controllers in SPL"
102 depends on SPL_PINCTRL_GENERIC
104 This option is an SPL-variant of the PINCONF option.
105 See the help of PINCONF for details.
107 if PINCTRL || SPL_PINCTRL
109 config PINCTRL_AR933X
110 bool "QCA/Athores ar933x pin control driver"
111 depends on DM && SOC_AR933X
113 Support pin multiplexing control on QCA/Athores ar933x SoCs.
114 The driver is controlled by a device tree node which contains
115 both the GPIO definitions and pin control functions for each
116 available multiplex function.
119 bool "AT91 pinctrl driver"
122 This option is to enable the AT91 pinctrl driver for AT91 PIO
125 AT91 PIO controller is a combined gpio-controller, pin-mux and
126 pin-config module. Each I/O pin may be dedicated as a general-purpose
127 I/O or be assigned to a function of an embedded peripheral. Each I/O
128 pin has a glitch filter providing rejection of glitches lower than
129 one-half of peripheral clock cycle and a debouncing filter providing
130 rejection of unwanted pulses from key or push button operations. You
131 can also control the multi-driver capability, pull-up and pull-down
132 feature on each I/O pin.
134 config PINCTRL_AT91PIO4
135 bool "AT91 PIO4 pinctrl driver"
138 This option is to enable the AT91 pinctrl driver for AT91 PIO4
139 controller which is available on SAMA5D2 SoC.
142 bool "Microchip PIC32 pin-control and pin-mux driver"
143 depends on DM && MACH_PIC32
146 Supports individual pin selection and configuration for each
147 remappable peripheral available on Microchip PIC32
148 SoCs. This driver is controlled by a device tree node which
149 contains both GPIO defintion and pin control functions.
151 config PINCTRL_QCA953X
152 bool "QCA/Athores qca953x pin control driver"
153 depends on DM && SOC_QCA953X
155 Support pin multiplexing control on QCA/Athores qca953x SoCs.
157 The driver is controlled by a device tree node which contains both
158 the GPIO definitions and pin control functions for each available
161 config PINCTRL_ROCKCHIP_RK3036
162 bool "Rockchip rk3036 pin control driver"
165 Support pin multiplexing control on Rockchip rk3036 SoCs.
167 The driver is controlled by a device tree node which contains both
168 the GPIO definitions and pin control functions for each available
171 config PINCTRL_ROCKCHIP_RK3128
172 bool "Rockchip rk3128 pin control driver"
175 Support pin multiplexing control on Rockchip rk3128 SoCs.
177 The driver is controlled by a device tree node which contains both
178 the GPIO definitions and pin control functions for each available
181 config PINCTRL_ROCKCHIP_RK3188
182 bool "Rockchip rk3188 pin control driver"
185 Support pin multiplexing control on Rockchip rk3188 SoCs.
187 The driver is controlled by a device tree node which contains both
188 the GPIO definitions and pin control functions for each available
191 config PINCTRL_ROCKCHIP_RK322X
192 bool "Rockchip rk322x pin control driver"
195 Support pin multiplexing control on Rockchip rk322x SoCs.
197 The driver is controlled by a device tree node which contains both
198 the GPIO definitions and pin control functions for each available
201 config PINCTRL_ROCKCHIP_RK3288
202 bool "Rockchip rk3288 pin control driver"
205 Support pin multiplexing control on Rockchip rk3288 SoCs.
207 The driver is controlled by a device tree node which contains both
208 the GPIO definitions and pin control functions for each available
211 config PINCTRL_ROCKCHIP_RK3328
212 bool "Rockchip rk3328 pin control driver"
215 Support pin multiplexing control on Rockchip rk3328 SoCs.
217 The driver is controlled by a device tree node which contains both
218 the GPIO definitions and pin control functions for each available
221 config PINCTRL_ROCKCHIP_RK3368
222 bool "Rockchip RK3368 pin control driver"
225 Support pin multiplexing control on Rockchip rk3368 SoCs.
227 The driver is controlled by a device tree node which contains both
228 the GPIO definitions and pin control functions for each available
231 config PINCTRL_ROCKCHIP_RK3399
232 bool "Rockchip rk3399 pin control driver"
235 Support pin multiplexing control on Rockchip rk3399 SoCs.
237 The driver is controlled by a device tree node which contains both
238 the GPIO definitions and pin control functions for each available
241 config PINCTRL_ROCKCHIP_RV1108
242 bool "Rockchip rv1108 pin control driver"
245 Support pin multiplexing control on Rockchip rv1108 SoC.
247 The driver is controlled by a device tree node which contains
248 both the GPIO definitions and pin control functions for each
249 available multiplex function.
251 config PINCTRL_SANDBOX
252 bool "Sandbox pinctrl driver"
255 This enables pinctrl driver for sandbox.
257 Currently, this driver actually does nothing but print debug
258 messages when pinctrl operations are invoked.
260 config PINCTRL_SINGLE
261 bool "Single register pin-control and pin-multiplex driver"
264 This enables pinctrl driver for systems using a single register for
265 pin configuration and multiplexing. TI's AM335X SoCs are examples of
268 Depending on the platform make sure to also enable OF_TRANSLATE and
269 eventually SPL_OF_TRANSLATE to get correct address translations.
272 bool "STMicroelectronics STi pin-control and pin-mux driver"
273 depends on DM && ARCH_STI
276 Support pin multiplexing control on STMicrolectronics STi SoCs.
278 The driver is controlled by a device tree node which contains both
279 the GPIO definitions and pin control functions for each available
283 bool "ST STM32 pin control driver"
286 Supports pin multiplexing control on stm32 SoCs.
288 The driver is controlled by a device tree node which contains both
289 the GPIO definitions and pin control functions for each available
292 config ASPEED_AST2500_PINCTRL
293 bool "Aspeed AST2500 pin control driver"
294 depends on DM && PINCTRL_GENERIC && ASPEED_AST2500
297 Support pin multiplexing control on Aspeed ast2500 SoC. The driver uses
298 Generic Pinctrl framework and is compatible with the Linux driver,
299 i.e. it uses the same device tree configuration.
303 source "drivers/pinctrl/meson/Kconfig"
304 source "drivers/pinctrl/nxp/Kconfig"
305 source "drivers/pinctrl/renesas/Kconfig"
306 source "drivers/pinctrl/uniphier/Kconfig"
307 source "drivers/pinctrl/exynos/Kconfig"
308 source "drivers/pinctrl/mvebu/Kconfig"
309 source "drivers/pinctrl/broadcom/Kconfig"