git.sur5r.net Git - u-boot/blob - drivers/pinctrl/exynos/pinctrl-exynos7420.c

   1 /*
   2  * Exynos7420 pinctrl driver.
   3  * Copyright (C) 2016 Samsung Electronics
   4  * Thomas Abraham <thomas.ab@samsung.com>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #include <common.h>
  10 #include <dm.h>
  11 #include <errno.h>
  12 #include <asm/io.h>
  13 #include <dm/pinctrl.h>
  14 #include <dm/root.h>
  15 #include <fdtdec.h>
  16 #include <asm/arch/pinmux.h>
  17 #include "pinctrl-exynos.h"
  18
  19 DECLARE_GLOBAL_DATA_PTR;
  20
  21 #define GPD1_OFFSET     0xc0
  22
  23 static struct exynos_pinctrl_config_data serial2_conf[] = {
  24         {
  25                 .offset = GPD1_OFFSET + PIN_CON,
  26                 .mask   = 0x00ff0000,
  27                 .value  = 0x00220000,
  28         }, {
  29                 .offset = GPD1_OFFSET + PIN_PUD,
  30                 .mask   = 0x00000f00,
  31                 .value  = 0x00000f00,
  32         },
  33 };
  34
  35 static int exynos7420_pinctrl_request(struct udevice *dev, int peripheral,
  36                                                 int flags)
  37 {
  38         struct exynos_pinctrl_priv *priv = dev_get_priv(dev);
  39         unsigned long base = priv->base;
  40
  41         switch (PERIPH_ID_UART2) {
  42         case PERIPH_ID_UART2:
  43                 exynos_pinctrl_setup_peri(serial2_conf,
  44                                           ARRAY_SIZE(serial2_conf), base);
  45                 break;
  46         default:
  47                 return -ENODEV;
  48         }
  49
  50         return 0;
  51 }
  52
  53 static struct pinctrl_ops exynos7420_pinctrl_ops = {
  54         .set_state      = exynos_pinctrl_set_state,
  55         .request        = exynos7420_pinctrl_request,
  56 };
  57
  58 /* pin banks of Exynos7420 pin-controller - BUS0 */
  59 static const struct samsung_pin_bank_data exynos7420_pin_banks0[] = {
  60         EXYNOS_PIN_BANK(5, 0x000, "gpb0"),
  61         EXYNOS_PIN_BANK(8, 0x020, "gpc0"),
  62         EXYNOS_PIN_BANK(2, 0x040, "gpc1"),
  63         EXYNOS_PIN_BANK(6, 0x060, "gpc2"),
  64         EXYNOS_PIN_BANK(8, 0x080, "gpc3"),
  65         EXYNOS_PIN_BANK(4, 0x0a0, "gpd0"),
  66         EXYNOS_PIN_BANK(6, 0x0c0, "gpd1"),
  67         EXYNOS_PIN_BANK(8, 0x0e0, "gpd2"),
  68         EXYNOS_PIN_BANK(5, 0x100, "gpd4"),
  69         EXYNOS_PIN_BANK(4, 0x120, "gpd5"),
  70         EXYNOS_PIN_BANK(6, 0x140, "gpd6"),
  71         EXYNOS_PIN_BANK(3, 0x160, "gpd7"),
  72         EXYNOS_PIN_BANK(2, 0x180, "gpd8"),
  73         EXYNOS_PIN_BANK(2, 0x1a0, "gpg0"),
  74         EXYNOS_PIN_BANK(4, 0x1c0, "gpg3"),
  75 };
  76
  77 /* pin banks of Exynos7420 pin-controller - FSYS0 */
  78 static const struct samsung_pin_bank_data exynos7420_pin_banks1[] = {
  79         EXYNOS_PIN_BANK(7, 0x000, "gpr4"),
  80 };
  81
  82 /* pin banks of Exynos7420 pin-controller - FSYS1 */
  83 static const struct samsung_pin_bank_data exynos7420_pin_banks2[] = {
  84         EXYNOS_PIN_BANK(4, 0x000, "gpr0"),
  85         EXYNOS_PIN_BANK(8, 0x020, "gpr1"),
  86         EXYNOS_PIN_BANK(5, 0x040, "gpr2"),
  87         EXYNOS_PIN_BANK(8, 0x060, "gpr3"),
  88 };
  89
  90 const struct samsung_pin_ctrl exynos7420_pin_ctrl[] = {
  91         {
  92                 /* pin-controller instance BUS0 data */
  93                 .pin_banks      = exynos7420_pin_banks0,
  94                 .nr_banks       = ARRAY_SIZE(exynos7420_pin_banks0),
  95         }, {
  96                 /* pin-controller instance FSYS0 data */
  97                 .pin_banks      = exynos7420_pin_banks1,
  98                 .nr_banks       = ARRAY_SIZE(exynos7420_pin_banks1),
  99         }, {
 100                 /* pin-controller instance FSYS1 data */
 101                 .pin_banks      = exynos7420_pin_banks2,
 102                 .nr_banks       = ARRAY_SIZE(exynos7420_pin_banks2),
 103         },
 104 };
 105
 106 static const struct udevice_id exynos7420_pinctrl_ids[] = {
 107         { .compatible = "samsung,exynos7420-pinctrl",
 108                 .data = (ulong)exynos7420_pin_ctrl },
 109         { }
 110 };
 111
 112 U_BOOT_DRIVER(pinctrl_exynos7420) = {
 113         .name           = "pinctrl_exynos7420",
 114         .id             = UCLASS_PINCTRL,
 115         .of_match       = exynos7420_pinctrl_ids,
 116         .priv_auto_alloc_size = sizeof(struct exynos_pinctrl_priv),
 117         .ops            = &exynos7420_pinctrl_ops,
 118         .probe          = exynos_pinctrl_probe,
 119         .flags          = DM_FLAG_PRE_RELOC
 120 };