1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2016 - Beniamino Galvani <b.galvani@gmail.com>
8 #include <dm/device-internal.h>
10 #include <dm/pinctrl.h>
11 #include <fdt_support.h>
12 #include <linux/err.h>
14 #include <linux/sizes.h>
17 #include "pinctrl-meson.h"
19 DECLARE_GLOBAL_DATA_PTR;
21 static const char *meson_pinctrl_dummy_name = "_dummy";
23 static int meson_pinctrl_get_groups_count(struct udevice *dev)
25 struct meson_pinctrl *priv = dev_get_priv(dev);
27 return priv->data->num_groups;
30 static const char *meson_pinctrl_get_group_name(struct udevice *dev,
33 struct meson_pinctrl *priv = dev_get_priv(dev);
35 if (!priv->data->groups[selector].name)
36 return meson_pinctrl_dummy_name;
38 return priv->data->groups[selector].name;
41 static int meson_pinmux_get_functions_count(struct udevice *dev)
43 struct meson_pinctrl *priv = dev_get_priv(dev);
45 return priv->data->num_funcs;
48 static const char *meson_pinmux_get_function_name(struct udevice *dev,
51 struct meson_pinctrl *priv = dev_get_priv(dev);
53 return priv->data->funcs[selector].name;
56 static void meson_pinmux_disable_other_groups(struct meson_pinctrl *priv,
57 unsigned int pin, int sel_group)
59 struct meson_pmx_group *group;
63 for (i = 0; i < priv->data->num_groups; i++) {
64 group = &priv->data->groups[i];
65 if (group->is_gpio || i == sel_group)
68 for (j = 0; j < group->num_pins; j++) {
69 if (group->pins[j] == pin) {
70 /* We have found a group using the pin */
71 debug("pinmux: disabling %s\n", group->name);
72 addr = priv->reg_mux + group->reg * 4;
73 writel(readl(addr) & ~BIT(group->bit), addr);
79 static int meson_pinmux_group_set(struct udevice *dev,
80 unsigned group_selector,
81 unsigned func_selector)
83 struct meson_pinctrl *priv = dev_get_priv(dev);
84 const struct meson_pmx_group *group;
85 const struct meson_pmx_func *func;
89 group = &priv->data->groups[group_selector];
90 func = &priv->data->funcs[func_selector];
92 debug("pinmux: set group %s func %s\n", group->name, func->name);
95 * Disable groups using the same pins.
96 * The selected group is not disabled to avoid glitches.
98 for (i = 0; i < group->num_pins; i++) {
99 meson_pinmux_disable_other_groups(priv,
104 /* Function 0 (GPIO) doesn't need any additional setting */
106 addr = priv->reg_mux + group->reg * 4;
107 writel(readl(addr) | BIT(group->bit), addr);
113 const struct pinctrl_ops meson_pinctrl_ops = {
114 .get_groups_count = meson_pinctrl_get_groups_count,
115 .get_group_name = meson_pinctrl_get_group_name,
116 .get_functions_count = meson_pinmux_get_functions_count,
117 .get_function_name = meson_pinmux_get_function_name,
118 .pinmux_group_set = meson_pinmux_group_set,
119 .set_state = pinctrl_generic_set_state,
122 static int meson_gpio_calc_reg_and_bit(struct udevice *dev, unsigned int offset,
123 enum meson_reg_type reg_type,
124 unsigned int *reg, unsigned int *bit)
126 struct meson_pinctrl *priv = dev_get_priv(dev->parent);
127 struct meson_bank *bank = NULL;
128 struct meson_reg_desc *desc;
132 pin = priv->data->pin_base + offset;
134 for (i = 0; i < priv->data->num_banks; i++) {
135 if (pin >= priv->data->banks[i].first &&
136 pin <= priv->data->banks[i].last) {
137 bank = &priv->data->banks[i];
145 desc = &bank->regs[reg_type];
146 *reg = desc->reg * 4;
147 *bit = desc->bit + pin - bank->first;
152 static int meson_gpio_get(struct udevice *dev, unsigned int offset)
154 struct meson_pinctrl *priv = dev_get_priv(dev->parent);
155 unsigned int reg, bit;
158 ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_IN, ®, &bit);
162 return !!(readl(priv->reg_gpio + reg) & BIT(bit));
165 static int meson_gpio_set(struct udevice *dev, unsigned int offset, int value)
167 struct meson_pinctrl *priv = dev_get_priv(dev->parent);
168 unsigned int reg, bit;
171 ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_OUT, ®, &bit);
175 clrsetbits_le32(priv->reg_gpio + reg, BIT(bit), value ? BIT(bit) : 0);
180 static int meson_gpio_get_direction(struct udevice *dev, unsigned int offset)
182 struct meson_pinctrl *priv = dev_get_priv(dev->parent);
183 unsigned int reg, bit, val;
186 ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_DIR, ®, &bit);
190 val = readl(priv->reg_gpio + reg);
192 return (val & BIT(bit)) ? GPIOF_INPUT : GPIOF_OUTPUT;
195 static int meson_gpio_direction_input(struct udevice *dev, unsigned int offset)
197 struct meson_pinctrl *priv = dev_get_priv(dev->parent);
198 unsigned int reg, bit;
201 ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_DIR, ®, &bit);
205 clrsetbits_le32(priv->reg_gpio + reg, BIT(bit), 1);
210 static int meson_gpio_direction_output(struct udevice *dev,
211 unsigned int offset, int value)
213 struct meson_pinctrl *priv = dev_get_priv(dev->parent);
214 unsigned int reg, bit;
217 ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_DIR, ®, &bit);
221 clrsetbits_le32(priv->reg_gpio + reg, BIT(bit), 0);
223 ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_OUT, ®, &bit);
227 clrsetbits_le32(priv->reg_gpio + reg, BIT(bit), value ? BIT(bit) : 0);
232 static int meson_gpio_probe(struct udevice *dev)
234 struct meson_pinctrl *priv = dev_get_priv(dev->parent);
235 struct gpio_dev_priv *uc_priv;
237 uc_priv = dev_get_uclass_priv(dev);
238 uc_priv->bank_name = priv->data->name;
239 uc_priv->gpio_count = priv->data->num_pins;
244 static const struct dm_gpio_ops meson_gpio_ops = {
245 .set_value = meson_gpio_set,
246 .get_value = meson_gpio_get,
247 .get_function = meson_gpio_get_direction,
248 .direction_input = meson_gpio_direction_input,
249 .direction_output = meson_gpio_direction_output,
252 static struct driver meson_gpio_driver = {
253 .name = "meson-gpio",
255 .probe = meson_gpio_probe,
256 .ops = &meson_gpio_ops,
259 static fdt_addr_t parse_address(int offset, const char *name, int na, int ns)
264 index = fdt_stringlist_search(gd->fdt_blob, offset, "reg-names", name);
266 return FDT_ADDR_T_NONE;
268 reg = fdt_getprop(gd->fdt_blob, offset, "reg", &len);
269 if (!reg || (len <= (index * sizeof(fdt32_t) * (na + ns))))
270 return FDT_ADDR_T_NONE;
272 reg += index * (na + ns);
274 return fdt_translate_address((void *)gd->fdt_blob, offset, reg);
277 int meson_pinctrl_probe(struct udevice *dev)
279 struct meson_pinctrl *priv = dev_get_priv(dev);
280 struct uclass_driver *drv;
281 struct udevice *gpio_dev;
283 int node, gpio = -1, len;
287 na = fdt_address_cells(gd->fdt_blob, dev_of_offset(dev->parent));
289 debug("bad #address-cells\n");
293 ns = fdt_size_cells(gd->fdt_blob, dev_of_offset(dev->parent));
295 debug("bad #size-cells\n");
299 fdt_for_each_subnode(node, gd->fdt_blob, dev_of_offset(dev)) {
300 if (fdt_getprop(gd->fdt_blob, node, "gpio-controller", &len)) {
307 debug("gpio node not found\n");
311 addr = parse_address(gpio, "mux", na, ns);
312 if (addr == FDT_ADDR_T_NONE) {
313 debug("mux address not found\n");
316 priv->reg_mux = (void __iomem *)addr;
318 addr = parse_address(gpio, "gpio", na, ns);
319 if (addr == FDT_ADDR_T_NONE) {
320 debug("gpio address not found\n");
323 priv->reg_gpio = (void __iomem *)addr;
324 priv->data = (struct meson_pinctrl_data *)dev_get_driver_data(dev);
326 /* Lookup GPIO driver */
327 drv = lists_uclass_lookup(UCLASS_GPIO);
329 puts("Cannot find GPIO driver\n");
333 name = calloc(1, 32);
334 sprintf(name, "meson-gpio");
336 /* Create child device UCLASS_GPIO and bind it */
337 device_bind(dev, &meson_gpio_driver, name, NULL, gpio, &gpio_dev);
338 dev_set_of_offset(gpio_dev, gpio);