2 * Copyright (C) 2016 Peng Fan <van.freenix@gmail.com>
4 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef __DRIVERS_PINCTRL_IMX_H
8 #define __DRIVERS_PINCTRL_IMX_H
11 * @base: the address to the controller in virtual memory
12 * @input_sel_base: the address of the select input in virtual memory.
13 * @flags: flags specific for each soc
14 * @mux_mask: Used when SHARE_MUX_CONF_REG flag is added
16 struct imx_pinctrl_soc_info {
18 void __iomem *input_sel_base;
20 unsigned int mux_mask;
24 * @dev: a pointer back to containing device
27 struct imx_pinctrl_priv {
29 struct imx_pinctrl_soc_info *info;
32 extern const struct pinctrl_ops imx_pinctrl_ops;
34 #define IMX_NO_PAD_CTL 0x80000000 /* no pin config need */
35 #define IMX_PAD_SION 0x40000000 /* set SION */
38 * Each pin represented in fsl,pins consists of 5 u32 PIN_FUNC_ID and
39 * 1 u32 CONFIG, so 24 types in total for each pin.
41 #define FSL_PIN_SIZE 24
42 #define SHARE_FSL_PIN_SIZE 20
44 #define SHARE_MUX_CONF_REG 0x1
45 #define ZERO_OFFSET_VALID 0x2
46 #define CONFIG_IBE_OBE 0x4
48 #define IOMUXC_CONFIG_SION (0x1 << 4)
50 int imx_pinctrl_probe(struct udevice *dev, struct imx_pinctrl_soc_info *info);
52 int imx_pinctrl_remove(struct udevice *dev);
53 #endif /* __DRIVERS_PINCTRL_IMX_H */