2 * (C) Copyright 2001-2008
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 * Keith Outwater, keith_outwater@mvis.com`
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
27 * DS1337 Real Time Clock (RTC).
35 #if defined(CONFIG_CMD_DATE)
38 * RTC register addresses
40 #define RTC_SEC_REG_ADDR 0x0
41 #define RTC_MIN_REG_ADDR 0x1
42 #define RTC_HR_REG_ADDR 0x2
43 #define RTC_DAY_REG_ADDR 0x3
44 #define RTC_DATE_REG_ADDR 0x4
45 #define RTC_MON_REG_ADDR 0x5
46 #define RTC_YR_REG_ADDR 0x6
47 #define RTC_CTL_REG_ADDR 0x0e
48 #define RTC_STAT_REG_ADDR 0x0f
49 #define RTC_TC_REG_ADDR 0x10
52 * RTC control register bits
54 #define RTC_CTL_BIT_A1IE 0x1 /* Alarm 1 interrupt enable */
55 #define RTC_CTL_BIT_A2IE 0x2 /* Alarm 2 interrupt enable */
56 #define RTC_CTL_BIT_INTCN 0x4 /* Interrupt control */
57 #define RTC_CTL_BIT_RS1 0x8 /* Rate select 1 */
58 #define RTC_CTL_BIT_RS2 0x10 /* Rate select 2 */
59 #define RTC_CTL_BIT_DOSC 0x80 /* Disable Oscillator */
62 * RTC status register bits
64 #define RTC_STAT_BIT_A1F 0x1 /* Alarm 1 flag */
65 #define RTC_STAT_BIT_A2F 0x2 /* Alarm 2 flag */
66 #define RTC_STAT_BIT_OSF 0x80 /* Oscillator stop flag */
69 static uchar rtc_read (uchar reg);
70 static void rtc_write (uchar reg, uchar val);
73 * Get the current time from the RTC
75 int rtc_get (struct rtc_time *tmp)
78 uchar sec, min, hour, mday, wday, mon_cent, year, control, status;
80 control = rtc_read (RTC_CTL_REG_ADDR);
81 status = rtc_read (RTC_STAT_REG_ADDR);
82 sec = rtc_read (RTC_SEC_REG_ADDR);
83 min = rtc_read (RTC_MIN_REG_ADDR);
84 hour = rtc_read (RTC_HR_REG_ADDR);
85 wday = rtc_read (RTC_DAY_REG_ADDR);
86 mday = rtc_read (RTC_DATE_REG_ADDR);
87 mon_cent = rtc_read (RTC_MON_REG_ADDR);
88 year = rtc_read (RTC_YR_REG_ADDR);
90 debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
91 "hr: %02x min: %02x sec: %02x control: %02x status: %02x\n",
92 year, mon_cent, mday, wday, hour, min, sec, control, status);
94 if (status & RTC_STAT_BIT_OSF) {
95 printf ("### Warning: RTC oscillator has stopped\n");
96 /* clear the OSF flag */
97 rtc_write (RTC_STAT_REG_ADDR,
98 rtc_read (RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF);
102 tmp->tm_sec = bcd2bin (sec & 0x7F);
103 tmp->tm_min = bcd2bin (min & 0x7F);
104 tmp->tm_hour = bcd2bin (hour & 0x3F);
105 tmp->tm_mday = bcd2bin (mday & 0x3F);
106 tmp->tm_mon = bcd2bin (mon_cent & 0x1F);
107 tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 2000 : 1900);
108 tmp->tm_wday = bcd2bin ((wday - 1) & 0x07);
112 debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
113 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
114 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
123 int rtc_set (struct rtc_time *tmp)
127 debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
128 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
129 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
131 rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
133 century = (tmp->tm_year >= 2000) ? 0x80 : 0;
134 rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon) | century);
136 rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1));
137 rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
138 rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
139 rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
140 rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
147 * Reset the RTC. We also enable the oscillator output on the
148 * SQW/INTB* pin and program it for 32,768 Hz output. Note that
149 * according to the datasheet, turning on the square wave output
150 * increases the current drain on the backup battery from about
151 * 600 nA to 2uA. Define CONFIG_SYS_RTC_DS1337_NOOSC if you wish to turn
152 * off the OSC output.
154 #ifdef CONFIG_SYS_RTC_DS1337_NOOSC
155 #define RTC_DS1337_RESET_VAL \
156 (RTC_CTL_BIT_INTCN | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
158 #define RTC_DS1337_RESET_VAL (RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
160 void rtc_reset (void)
162 rtc_write (RTC_CTL_REG_ADDR, RTC_DS1337_RESET_VAL);
163 #ifdef CONFIG_SYS_DS1339_TCR_VAL
164 rtc_write (RTC_TC_REG_ADDR, CONFIG_SYS_DS1339_TCR_VAL);
174 uchar rtc_read (uchar reg)
176 return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
180 static void rtc_write (uchar reg, uchar val)
182 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);