2 * (C) Copyright 2001, 2002, 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 * Keith Outwater, keith_outwater@mvis.com`
5 * Steven Scholz, steven.scholz@imc-berlin.de
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
28 * DS1374 Real Time Clock (RTC).
38 #if defined(CONFIG_CMD_DATE)
40 /*---------------------------------------------------------------------*/
45 #define DEBUGR(fmt,args...) printf(fmt ,##args)
47 #define DEBUGR(fmt,args...)
49 /*---------------------------------------------------------------------*/
51 #ifndef CONFIG_SYS_I2C_RTC_ADDR
52 # define CONFIG_SYS_I2C_RTC_ADDR 0x68
55 #if defined(CONFIG_RTC_DS1374) && (CONFIG_SYS_I2C_SPEED > 400000)
56 # error The DS1374 is specified up to 400kHz in fast mode!
60 * RTC register addresses
62 #define RTC_TOD_CNT_BYTE0_ADDR 0x00 /* TimeOfDay */
63 #define RTC_TOD_CNT_BYTE1_ADDR 0x01
64 #define RTC_TOD_CNT_BYTE2_ADDR 0x02
65 #define RTC_TOD_CNT_BYTE3_ADDR 0x03
67 #define RTC_WD_ALM_CNT_BYTE0_ADDR 0x04
68 #define RTC_WD_ALM_CNT_BYTE1_ADDR 0x05
69 #define RTC_WD_ALM_CNT_BYTE2_ADDR 0x06
71 #define RTC_CTL_ADDR 0x07 /* RTC-CoNTrol-register */
72 #define RTC_SR_ADDR 0x08 /* RTC-StatusRegister */
73 #define RTC_TCS_DS_ADDR 0x09 /* RTC-TrickleChargeSelect DiodeSelect-register */
75 #define RTC_CTL_BIT_AIE (1<<0) /* Bit 0 - Alarm Interrupt enable */
76 #define RTC_CTL_BIT_RS1 (1<<1) /* Bit 1/2 - Rate Select square wave output */
77 #define RTC_CTL_BIT_RS2 (1<<2) /* Bit 2/2 - Rate Select square wave output */
78 #define RTC_CTL_BIT_WDSTR (1<<3) /* Bit 3 - Watchdog Reset Steering */
79 #define RTC_CTL_BIT_BBSQW (1<<4) /* Bit 4 - Battery-Backed Square-Wave */
80 #define RTC_CTL_BIT_WD_ALM (1<<5) /* Bit 5 - Watchdoc/Alarm Counter Select */
81 #define RTC_CTL_BIT_WACE (1<<6) /* Bit 6 - Watchdog/Alarm Counter Enable WACE*/
82 #define RTC_CTL_BIT_EN_OSC (1<<7) /* Bit 7 - Enable Oscilator */
84 #define RTC_SR_BIT_AF 0x01 /* Bit 0 = Alarm Flag */
85 #define RTC_SR_BIT_OSF 0x80 /* Bit 7 - Osc Stop Flag */
87 const char RtcTodAddr[] = {
88 RTC_TOD_CNT_BYTE0_ADDR,
89 RTC_TOD_CNT_BYTE1_ADDR,
90 RTC_TOD_CNT_BYTE2_ADDR,
91 RTC_TOD_CNT_BYTE3_ADDR
94 static uchar rtc_read (uchar reg);
95 static void rtc_write(uchar reg, uchar val, bool set);
96 static void rtc_write_raw (uchar reg, uchar val);
99 * Get the current time from the RTC
101 int rtc_get (struct rtc_time *tm){
103 unsigned long time1, time2;
109 * Since the reads are being performed one byte at a time,
110 * there is a chance that a carry will occur during the read.
111 * To detect this, 2 reads are performed and compared.
118 tmp = rtc_read(RtcTodAddr[i]);
119 time1 = (time1 << 8) | (tmp & 0xff);
125 tmp = rtc_read(RtcTodAddr[i]);
126 time2 = (time2 << 8) | (tmp & 0xff);
128 } while ((time1 != time2) && limit--);
130 if (time1 != time2) {
131 printf("can't get consistent time from rtc chip\n");
135 DEBUGR ("Get RTC s since 1.1.1970: %ld\n", time1);
137 to_tm(time1, tm); /* To Gregorian Date */
139 if (rtc_read(RTC_SR_ADDR) & RTC_SR_BIT_OSF) {
140 printf ("### Warning: RTC oscillator has stopped\n");
144 DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
145 tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
146 tm->tm_hour, tm->tm_min, tm->tm_sec);
154 int rtc_set (struct rtc_time *tmp){
159 DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
160 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
161 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
163 if (tmp->tm_year < 1970 || tmp->tm_year > 2069)
164 printf("WARNING: year should be between 1970 and 2069!\n");
166 time = mktime(tmp->tm_year, tmp->tm_mon,
167 tmp->tm_mday, tmp->tm_hour,
168 tmp->tm_min, tmp->tm_sec);
170 DEBUGR ("Set RTC s since 1.1.1970: %ld (0x%02lx)\n", time, time);
172 /* write to RTC_TOD_CNT_BYTEn_ADDR */
173 for (i = 0; i <= 3; i++) {
174 rtc_write_raw(RtcTodAddr[i], (unsigned char)(time & 0xff));
179 rtc_write(RTC_CTL_ADDR, RTC_CTL_BIT_EN_OSC, false);
185 * Reset the RTC. We setting the date back to 1970-01-01.
186 * We also enable the oscillator output on the SQW/OUT pin and program
187 * it for 32,768 Hz output. Note that according to the datasheet, turning
188 * on the square wave output increases the current drain on the backup
189 * battery to something between 480nA and 800nA.
191 void rtc_reset (void){
195 /* clear status flags */
196 rtc_write(RTC_SR_ADDR, (RTC_SR_BIT_AF|RTC_SR_BIT_OSF), false); /* clearing OSF and AF */
198 /* Initialise DS1374 oriented to MPC8349E-ADS */
199 rtc_write (RTC_CTL_ADDR, (RTC_CTL_BIT_EN_OSC
201 |RTC_CTL_BIT_AIE), false);/* start osc, disable WACE, clear AIE
203 rtc_write (RTC_CTL_ADDR, (RTC_CTL_BIT_WD_ALM
207 |RTC_CTL_BIT_BBSQW), true);/* disable WD/ALM, WDSTR set to INT-pin,
208 set BBSQW and SQW to 32k
219 printf("RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n",
220 tmp.tm_year, tmp.tm_mon, tmp.tm_mday,
221 tmp.tm_hour, tmp.tm_min, tmp.tm_sec);
223 rtc_write(RTC_WD_ALM_CNT_BYTE2_ADDR, 0xAC, true);
224 rtc_write(RTC_WD_ALM_CNT_BYTE1_ADDR, 0xDE, true);
225 rtc_write(RTC_WD_ALM_CNT_BYTE2_ADDR, 0xAD, true);
231 static uchar rtc_read (uchar reg)
233 return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
236 static void rtc_write(uchar reg, uchar val, bool set)
239 val |= i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg);
240 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
242 val = i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg) & ~val;
243 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
247 static void rtc_write_raw (uchar reg, uchar val)
249 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);