2 * SuperH SCIF device driver.
3 * Copyright (c) 2007 Nobuhiro Iwamatsu
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #include <asm/processor.h>
23 #ifdef CFG_SCIF_CONSOLE
25 #if defined (CONFIG_CONS_SCIF0)
26 #define SCIF_BASE SCIF0_BASE
27 #elif defined (CONFIG_CONS_SCIF1)
28 #define SCIF_BASE SCIF1_BASE
30 #error "Default SCIF doesn't set....."
33 #if defined(CONFIG_SH3)
34 /* There are SH7720's register */
35 #define SCSMR (volatile unsigned short *)(SCIF_BASE + 0x0)
36 #define SCBRR (volatile unsigned char *)(SCIF_BASE + 0x4)
37 #define SCSCR (volatile unsigned short *)(SCIF_BASE + 0x8)
38 #define SCFSR (volatile unsigned short *)(SCIF_BASE + 0x14) /* SCSSR */
39 #define SCFCR (volatile unsigned short *)(SCIF_BASE + 0x18)
40 #define SCFDR (volatile unsigned short *)(SCIF_BASE + 0x1C)
41 #define SCFTDR (volatile unsigned char *)(SCIF_BASE + 0x20)
42 #define SCFRDR (volatile unsigned char *)(SCIF_BASE + 0x24)
44 #define SCSMR (vu_short *)(SCIF_BASE + 0x0)
45 #define SCBRR (vu_char *)(SCIF_BASE + 0x4)
46 #define SCSCR (vu_short *)(SCIF_BASE + 0x8)
47 #define SCFTDR (vu_char *)(SCIF_BASE + 0xC)
48 #define SCFSR (vu_short *)(SCIF_BASE + 0x10)
49 #define SCFRDR (vu_char *)(SCIF_BASE + 0x14)
50 #define SCFCR (vu_short *)(SCIF_BASE + 0x18)
51 #define SCFDR (vu_short *)(SCIF_BASE + 0x1C)
54 #if defined(CONFIG_SH4A)
55 #define SCRFDR (vu_short *)(SCIF_BASE + 0x20)
56 #define SCSPTR (vu_short *)(SCIF_BASE + 0x24)
57 #define SCLSR (vu_short *)(SCIF_BASE + 0x28)
58 #define SCRER (vu_short *)(SCIF_BASE + 0x2C)
60 #elif defined (CONFIG_SH4)
61 #define SCSPTR (vu_short *)(SCIF_BASE + 0x20)
62 #define SCLSR (vu_short *)(SCIF_BASE + 0x24)
64 #elif defined (CONFIG_SH3)
65 #define SCLSR SCFSR /* SCSSR */
66 #define LSR_ORER 0x0200
69 #define SCR_RE (1 << 4)
70 #define SCR_TE (1 << 5)
71 #define FCR_RFRST (1 << 1) /* RFCL */
72 #define FCR_TFRST (1 << 2) /* TFCL */
73 #define FSR_DR (1 << 0)
74 #define FSR_RDF (1 << 1)
75 #define FSR_FER (1 << 3)
76 #define FSR_BRK (1 << 4)
77 #define FSR_FER (1 << 3)
78 #define FSR_TEND (1 << 6)
79 #define FSR_ER (1 << 7)
81 /*----------------------------------------------------------------------*/
83 void serial_setbrg (void)
85 DECLARE_GLOBAL_DATA_PTR;
87 #if defined(CONFIG_CPU_SH7720)
88 int divisor = gd->baudrate * 16;
90 *SCBRR = (CONFIG_SYS_CLK_FREQ * 2 + (divisor / 2)) /
91 (gd->baudrate * 32) - 1;
93 int divisor = gd->baudrate * 32;
95 *SCBRR = (CONFIG_SYS_CLK_FREQ + (divisor / 2)) /
96 (gd->baudrate * 32) - 1;
100 int serial_init (void)
102 *SCSCR = (SCR_RE | SCR_TE);
105 *SCFCR = (FCR_RFRST | FCR_TFRST);
113 static int serial_tx_fifo_level (void)
115 return (*SCFDR >> 8) & 0x1F;
118 static int serial_rx_fifo_level (void)
120 return (*SCFDR >> 0) & 0x1F;
123 void serial_raw_putc (const char c)
125 unsigned int fsr_bits_to_clear;
128 if (*SCFSR & FSR_TEND) { /* Tx fifo is empty */
129 fsr_bits_to_clear = FSR_TEND;
135 if (fsr_bits_to_clear != 0)
136 *SCFSR &= ~fsr_bits_to_clear;
139 void serial_putc (const char c)
142 serial_raw_putc ('\r');
146 void serial_puts (const char *s)
149 while ((c = *s++) != 0)
153 int serial_tstc (void)
155 return serial_rx_fifo_level() ? 1 : 0;
158 #define FSR_ERR_CLEAR 0x0063
159 #define RDRF_CLEAR 0x00fc
160 void handle_error( void ){
163 *SCFSR = FSR_ERR_CLEAR ;
168 int serial_getc_check( void ){
169 unsigned short status;
173 if (status & (FSR_FER | FSR_FER | FSR_ER | FSR_BRK))
175 if( *SCLSR & LSR_ORER )
177 return (status & ( FSR_DR | FSR_RDF ));
180 int serial_getc (void)
182 unsigned short status ;
184 while(!serial_getc_check());
189 *SCFSR = RDRF_CLEAR ;
191 if (status & (FSR_FER | FSR_FER | FSR_ER | FSR_BRK))
194 if( *SCLSR & LSR_ORER )
200 #endif /* CFG_SCIF_CONSOLE */