1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
13 #include <asm/arch/stm32.h>
14 #include "serial_stm32.h"
16 static void _stm32_serial_setbrg(fdt_addr_t base,
17 struct stm32_uart_info *uart_info,
21 bool stm32f4 = uart_info->stm32f4;
22 u32 int_div, mantissa, fraction, oversampling;
24 int_div = DIV_ROUND_CLOSEST(clock_rate, baudrate);
28 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
31 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
34 mantissa = (int_div / oversampling) << USART_BRR_M_SHIFT;
35 fraction = int_div % oversampling;
37 writel(mantissa | fraction, base + BRR_OFFSET(stm32f4));
40 static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
42 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
44 _stm32_serial_setbrg(plat->base, plat->uart_info,
45 plat->clock_rate, baudrate);
50 static int stm32_serial_getc(struct udevice *dev)
52 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
53 bool stm32f4 = plat->uart_info->stm32f4;
54 fdt_addr_t base = plat->base;
55 u32 isr = readl(base + ISR_OFFSET(stm32f4));
57 if ((isr & USART_ISR_RXNE) == 0)
60 if (isr & (USART_ISR_ORE)) {
62 setbits_le32(base + ICR_OFFSET, USART_ICR_ORECF);
64 readl(base + RDR_OFFSET(stm32f4));
68 return readl(base + RDR_OFFSET(stm32f4));
71 static int _stm32_serial_putc(fdt_addr_t base,
72 struct stm32_uart_info *uart_info,
75 bool stm32f4 = uart_info->stm32f4;
77 if ((readl(base + ISR_OFFSET(stm32f4)) & USART_ISR_TXE) == 0)
80 writel(c, base + TDR_OFFSET(stm32f4));
85 static int stm32_serial_putc(struct udevice *dev, const char c)
87 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
89 return _stm32_serial_putc(plat->base, plat->uart_info, c);
92 static int stm32_serial_pending(struct udevice *dev, bool input)
94 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
95 bool stm32f4 = plat->uart_info->stm32f4;
96 fdt_addr_t base = plat->base;
99 return readl(base + ISR_OFFSET(stm32f4)) &
100 USART_ISR_RXNE ? 1 : 0;
102 return readl(base + ISR_OFFSET(stm32f4)) &
103 USART_ISR_TXE ? 0 : 1;
106 static void _stm32_serial_init(fdt_addr_t base,
107 struct stm32_uart_info *uart_info)
109 bool stm32f4 = uart_info->stm32f4;
110 u8 uart_enable_bit = uart_info->uart_enable_bit;
112 /* Disable uart-> enable fifo -> enable uart */
113 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
114 BIT(uart_enable_bit));
115 if (uart_info->has_fifo)
116 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN);
117 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
118 BIT(uart_enable_bit));
121 static int stm32_serial_probe(struct udevice *dev)
123 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
127 plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev);
129 ret = clk_get_by_index(dev, 0, &clk);
133 ret = clk_enable(&clk);
135 dev_err(dev, "failed to enable clock\n");
139 plat->clock_rate = clk_get_rate(&clk);
140 if (plat->clock_rate < 0) {
142 return plat->clock_rate;
145 _stm32_serial_init(plat->base, plat->uart_info);
150 static const struct udevice_id stm32_serial_id[] = {
151 { .compatible = "st,stm32-uart", .data = (ulong)&stm32f4_info},
152 { .compatible = "st,stm32f7-uart", .data = (ulong)&stm32f7_info},
153 { .compatible = "st,stm32h7-uart", .data = (ulong)&stm32h7_info},
157 static int stm32_serial_ofdata_to_platdata(struct udevice *dev)
159 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
161 plat->base = devfdt_get_addr(dev);
162 if (plat->base == FDT_ADDR_T_NONE)
168 static const struct dm_serial_ops stm32_serial_ops = {
169 .putc = stm32_serial_putc,
170 .pending = stm32_serial_pending,
171 .getc = stm32_serial_getc,
172 .setbrg = stm32_serial_setbrg,
175 U_BOOT_DRIVER(serial_stm32) = {
176 .name = "serial_stm32",
178 .of_match = of_match_ptr(stm32_serial_id),
179 .ofdata_to_platdata = of_match_ptr(stm32_serial_ofdata_to_platdata),
180 .platdata_auto_alloc_size = sizeof(struct stm32x7_serial_platdata),
181 .ops = &stm32_serial_ops,
182 .probe = stm32_serial_probe,
183 .flags = DM_FLAG_PRE_RELOC,
186 #ifdef CONFIG_DEBUG_UART_STM32
187 #include <debug_uart.h>
188 static inline struct stm32_uart_info *_debug_uart_info(void)
190 struct stm32_uart_info *uart_info;
192 #if defined(CONFIG_STM32F4)
193 uart_info = &stm32f4_info;
194 #elif defined(CONFIG_STM32F7)
195 uart_info = &stm32f7_info;
197 uart_info = &stm32h7_info;
202 static inline void _debug_uart_init(void)
204 fdt_addr_t base = CONFIG_DEBUG_UART_BASE;
205 struct stm32_uart_info *uart_info = _debug_uart_info();
207 _stm32_serial_init(base, uart_info);
208 _stm32_serial_setbrg(base, uart_info,
209 CONFIG_DEBUG_UART_CLOCK,
211 printf("DEBUG done\n");
214 static inline void _debug_uart_putc(int c)
216 fdt_addr_t base = CONFIG_DEBUG_UART_BASE;
217 struct stm32_uart_info *uart_info = _debug_uart_info();
219 while (_stm32_serial_putc(base, uart_info, c) == -EAGAIN)