2 * Copyright (C) 2012-2015 Panasonic Corporation
3 * Copyright (C) 2015 Socionext Inc.
4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
6 * SPDX-License-Identifier: GPL-2.0+
9 #include <linux/serial_reg.h>
11 #include <asm/errno.h>
12 #include <dm/device.h>
13 #include <dm/platform_data/serial-uniphier.h>
19 * Note: Register map is slightly different from that of 16550.
21 struct uniphier_serial {
22 u32 rx; /* In: Receive buffer */
23 #define tx rx /* Out: Transmit buffer */
24 u32 ier; /* Interrupt Enable Register */
25 u32 iir; /* In: Interrupt ID Register */
26 u32 char_fcr; /* Charactor / FIFO Control Register */
27 u32 lcr_mcr; /* Line/Modem Control Register */
29 #define LCR_MASK (0xff << (LCR_SHIFT))
30 u32 lsr; /* In: Line Status Register */
31 u32 msr; /* In: Modem Status Register */
34 u32 dlr; /* Divisor Latch Register */
37 struct uniphier_serial_private_data {
38 struct uniphier_serial __iomem *membase;
41 #define uniphier_serial_port(dev) \
42 ((struct uniphier_serial_private_data *)dev_get_priv(dev))->membase
44 static int uniphier_serial_setbrg(struct udevice *dev, int baudrate)
46 struct uniphier_serial_platform_data *plat = dev_get_platdata(dev);
47 struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
48 const unsigned int mode_x_div = 16;
51 divisor = DIV_ROUND_CLOSEST(plat->uartclk, mode_x_div * baudrate);
53 writel(divisor, &port->dlr);
58 static int uniphier_serial_getc(struct udevice *dev)
60 struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
62 if (!(readl(&port->lsr) & UART_LSR_DR))
65 return readl(&port->rx);
68 static int uniphier_serial_putc(struct udevice *dev, const char c)
70 struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
72 if (!(readl(&port->lsr) & UART_LSR_THRE))
80 static int uniphier_serial_pending(struct udevice *dev, bool input)
82 struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
85 return readl(&port->lsr) & UART_LSR_DR;
87 return !(readl(&port->lsr) & UART_LSR_THRE);
90 static int uniphier_serial_probe(struct udevice *dev)
93 struct uniphier_serial_private_data *priv = dev_get_priv(dev);
94 struct uniphier_serial_platform_data *plat = dev_get_platdata(dev);
95 struct uniphier_serial __iomem *port;
97 port = map_sysmem(plat->base, sizeof(struct uniphier_serial));
101 priv->membase = port;
103 tmp = readl(&port->lcr_mcr);
105 tmp |= UART_LCR_WLEN8 << LCR_SHIFT;
106 writel(tmp, &port->lcr_mcr);
111 static int uniphier_serial_remove(struct udevice *dev)
113 unmap_sysmem(uniphier_serial_port(dev));
118 #ifdef CONFIG_OF_CONTROL
119 static const struct udevice_id uniphier_uart_of_match[] = {
120 { .compatible = "socionext,uniphier-uart" },
124 static int uniphier_serial_ofdata_to_platdata(struct udevice *dev)
126 struct uniphier_serial_platform_data *plat = dev_get_platdata(dev);
127 DECLARE_GLOBAL_DATA_PTR;
129 plat->base = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
130 plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
131 "clock-frequency", 0);
137 static const struct dm_serial_ops uniphier_serial_ops = {
138 .setbrg = uniphier_serial_setbrg,
139 .getc = uniphier_serial_getc,
140 .putc = uniphier_serial_putc,
141 .pending = uniphier_serial_pending,
144 U_BOOT_DRIVER(uniphier_serial) = {
147 .of_match = of_match_ptr(uniphier_uart_of_match),
148 .ofdata_to_platdata = of_match_ptr(uniphier_serial_ofdata_to_platdata),
149 .probe = uniphier_serial_probe,
150 .remove = uniphier_serial_remove,
151 .priv_auto_alloc_size = sizeof(struct uniphier_serial_private_data),
152 .platdata_auto_alloc_size =
153 sizeof(struct uniphier_serial_platform_data),
154 .ops = &uniphier_serial_ops,
155 .flags = DM_FLAG_PRE_RELOC,