2 * Copyright (C) 2012-2015 Panasonic Corporation
3 * Copyright (C) 2015 Socionext Inc.
4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
6 * SPDX-License-Identifier: GPL-2.0+
9 #include <linux/serial_reg.h>
11 #include <asm/errno.h>
12 #include <dm/device.h>
13 #include <dm/platform_data/serial-uniphier.h>
18 * Note: Register map is slightly different from that of 16550.
20 struct uniphier_serial {
21 u32 rx; /* In: Receive buffer */
22 #define tx rx /* Out: Transmit buffer */
23 u32 ier; /* Interrupt Enable Register */
24 u32 iir; /* In: Interrupt ID Register */
25 u32 char_fcr; /* Charactor / FIFO Control Register */
26 u32 lcr_mcr; /* Line/Modem Control Register */
28 #define LCR_MASK (0xff << (LCR_SHIFT))
29 u32 lsr; /* In: Line Status Register */
30 u32 msr; /* In: Modem Status Register */
33 u32 dlr; /* Divisor Latch Register */
36 struct uniphier_serial_private_data {
37 struct uniphier_serial __iomem *membase;
40 #define uniphier_serial_port(dev) \
41 ((struct uniphier_serial_private_data *)dev_get_priv(dev))->membase
43 static int uniphier_serial_setbrg(struct udevice *dev, int baudrate)
45 struct uniphier_serial_platform_data *plat = dev_get_platdata(dev);
46 struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
47 const unsigned int mode_x_div = 16;
50 divisor = DIV_ROUND_CLOSEST(plat->uartclk, mode_x_div * baudrate);
52 writel(divisor, &port->dlr);
57 static int uniphier_serial_getc(struct udevice *dev)
59 struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
61 if (!(readl(&port->lsr) & UART_LSR_DR))
64 return readl(&port->rx);
67 static int uniphier_serial_putc(struct udevice *dev, const char c)
69 struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
71 if (!(readl(&port->lsr) & UART_LSR_THRE))
79 static int uniphier_serial_pending(struct udevice *dev, bool input)
81 struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
84 return readl(&port->lsr) & UART_LSR_DR;
86 return !(readl(&port->lsr) & UART_LSR_THRE);
89 static int uniphier_serial_probe(struct udevice *dev)
92 struct uniphier_serial_private_data *priv = dev_get_priv(dev);
93 struct uniphier_serial_platform_data *plat = dev_get_platdata(dev);
94 struct uniphier_serial __iomem *port;
96 port = map_sysmem(plat->base, sizeof(struct uniphier_serial));
100 priv->membase = port;
102 tmp = readl(&port->lcr_mcr);
104 tmp |= UART_LCR_WLEN8 << LCR_SHIFT;
105 writel(tmp, &port->lcr_mcr);
110 static int uniphier_serial_remove(struct udevice *dev)
112 unmap_sysmem(uniphier_serial_port(dev));
117 #ifdef CONFIG_OF_CONTROL
118 static const struct udevice_id uniphier_uart_of_match[] = {
119 { .compatible = "socionext,uniphier-uart" },
123 static int uniphier_serial_ofdata_to_platdata(struct udevice *dev)
125 struct uniphier_serial_platform_data *plat = dev_get_platdata(dev);
126 DECLARE_GLOBAL_DATA_PTR;
128 plat->base = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
129 plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
130 "clock-frequency", 0);
136 static const struct dm_serial_ops uniphier_serial_ops = {
137 .setbrg = uniphier_serial_setbrg,
138 .getc = uniphier_serial_getc,
139 .putc = uniphier_serial_putc,
140 .pending = uniphier_serial_pending,
143 U_BOOT_DRIVER(uniphier_serial) = {
146 .of_match = of_match_ptr(uniphier_uart_of_match),
147 .ofdata_to_platdata = of_match_ptr(uniphier_serial_ofdata_to_platdata),
148 .probe = uniphier_serial_probe,
149 .remove = uniphier_serial_remove,
150 .priv_auto_alloc_size = sizeof(struct uniphier_serial_private_data),
151 .platdata_auto_alloc_size =
152 sizeof(struct uniphier_serial_platform_data),
153 .ops = &uniphier_serial_ops,
154 .flags = DM_FLAG_PRE_RELOC,