2 * Copyright (C) 2012 Samsung Electronics
3 * R. Chadrasekar <rcsekar@samsung.com>
5 * SPDX-License-Identifier: GPL-2.0+
11 /* Sources for AIF1/2 SYSCLK - use with set_dai_sysclk() */
12 #define WM8994_SYSCLK_MCLK1 1
13 #define WM8994_SYSCLK_MCLK2 2
14 #define WM8994_SYSCLK_FLL1 3
15 #define WM8994_SYSCLK_FLL2 4
17 /* Avilable audi interface ports in wm8994 codec */
18 enum en_audio_interface {
24 /* OPCLK is also configured with set_dai_sysclk, specify division*10 as rate. */
25 #define WM8994_SYSCLK_OPCLK 5
30 #define WM8994_FLL_SRC_MCLK1 1
31 #define WM8994_FLL_SRC_MCLK2 2
32 #define WM8994_FLL_SRC_LRCLK 3
33 #define WM8994_FLL_SRC_BCLK 4
35 /* maximum available digital interfac in the dac to configure */
36 #define WM8994_MAX_AIF 2
38 #define WM8994_MAX_INPUT_CLK_FREQ 13500000
39 #define WM8994_ID 0x8994
41 enum wm8994_vmid_mode {
46 /* wm 8994 family devices */
54 * intialise wm8994 sound codec device for the given configuration
56 * @param blob FDT node for codec values
57 * @param aif_id enum value of codec interface port in which
58 * soc i2s is connected
59 * @param sampling_rate Sampling rate ranges between from 8khz to 96khz
60 * @param mclk_freq Master clock frequency.
61 * @param bits_per_sample bits per Sample can be 16 or 24
62 * @param channels Number of channnels, maximum 2
64 * @returns -1 for error and 0 Success.
66 int wm8994_init(const void *blob, enum en_audio_interface aif_id,
67 int sampling_rate, int mclk_freq,
68 int bits_per_sample, unsigned int channels);
69 #endif /*__WM8994_H__ */