7 bool "Enable Driver Model for SPI drivers"
10 Enable driver model for SPI. The SPI slave interface
11 (spi_setup_slave(), spi_xfer(), etc.) is then implemented by
12 the SPI uclass. Drivers provide methods to access the SPI
13 buses that they control. The uclass interface is defined in
14 include/spi.h. The existing spi_slave structure is attached
15 as 'parent data' to every slave on each bus. Slaves
16 typically use driver-private data instead of extending the
22 bool "Altera SPI driver"
24 Enable the Altera SPI driver. This driver can be used to
25 access the SPI NOR flash on platforms embedding this Altera
26 IP core. Please find details on the "Embedded Peripherals IP
27 User Guide" of Altera.
30 bool "Andestech ATCSPI200 SPI driver"
32 Enable the Andestech ATCSPI200 SPI driver. This driver can be
33 used to access the SPI flash on AE3XX and AE250 platforms embedding
34 this Andestech IP core.
37 bool "Atheros SPI driver"
40 Enable the Atheros ar7xxx/ar9xxx SoC SPI driver, it was used
41 to access SPI NOR flash and other SPI peripherals. This driver
42 uses driver model and requires a device tree binding to operate.
43 please refer to doc/device-tree-bindings/spi/spi-ath79.txt.
46 bool "Atmel SPI driver"
47 default y if ARCH_AT91
49 This enables driver for the Atmel SPI Controller, present on
50 many AT91 (ARM) chips. This driver can be used to access
51 the SPI Flash, such as AT25DF321.
54 bool "BCM63XX HSSPI driver"
57 Enable the BCM6328 HSSPI driver. This driver can be used to
58 access the SPI NOR flash on platforms embedding this Broadcom
62 bool "BCM6348 SPI driver"
65 Enable the BCM6348/BCM6358 SPI driver. This driver can be used to
66 access the SPI NOR flash on platforms embedding these Broadcom
70 bool "Cadence QSPI driver"
72 Enable the Cadence Quad-SPI (QSPI) driver. This driver can be
73 used to access the SPI NOR flash on platforms embedding this
77 bool "Designware SPI driver"
79 Enable the Designware SPI driver. This driver can be used to
80 access the SPI NOR flash on platforms embedding this Designware
84 bool "Samsung Exynos SPI driver"
86 Enable the Samsung Exynos SPI driver. This driver can be used to
87 access the SPI NOR flash on platforms embedding this Samsung
91 bool "Freescale DSPI driver"
93 Enable the Freescale DSPI driver. This driver can be used to
94 access the SPI NOR flash and SPI Data flash on platforms embedding
95 this Freescale DSPI IP core. LS102xA and Colibri VF50/VF61 platforms
99 bool "Intel ICH SPI driver"
101 Enable the Intel ICH SPI driver. This driver can be used to
102 access the SPI NOR flash on platforms embedding this Intel
105 config MVEBU_A3700_SPI
106 bool "Marvell Armada 3700 SPI driver"
108 Enable the Marvell Armada 3700 SPI driver. This driver can be
109 used to access the SPI NOR flash on platforms embedding this
113 bool "Microchip PIC32 SPI driver"
114 depends on MACH_PIC32
116 Enable the Microchip PIC32 SPI driver. This driver can be used
117 to access the SPI NOR flash, MMC-over-SPI on platforms based on
118 Microchip PIC32 family devices.
120 config RENESAS_RPC_SPI
121 bool "Renesas RPC SPI driver"
124 Enable the Renesas RPC SPI driver, used to access SPI NOR flash
125 on Renesas RCar Gen3 SoCs. This uses driver model and requires a
126 device tree binding to operate.
129 bool "Rockchip SPI driver"
131 Enable the Rockchip SPI driver, used to access SPI NOR flash and
132 other SPI peripherals (such as the Chrome OS EC) on Rockchip SoCs.
133 This uses driver model and requires a device tree binding to
137 bool "Sandbox SPI driver"
138 depends on SANDBOX && DM
140 Enable SPI support for sandbox. This is an emulation of a real SPI
141 bus. Devices can be attached to the bus using the device tree
142 which specifies the driver to use. As an example, see this device
143 tree fragment from sandbox.dts. It shows that the SPI bus has a
144 single flash device on chip select 0 which is emulated by the driver
145 for "sandbox,spi-flash", which is in drivers/mtd/spi/sandbox.c.
148 #address-cells = <1>;
151 compatible = "sandbox,spi";
152 cs-gpios = <0>, <&gpio_a 0>;
155 compatible = "spansion,m25p16", "sandbox,spi-flash";
156 spi-max-frequency = <40000000>;
157 sandbox,filename = "spi.bin";
162 bool "STM32F7 QSPI driver"
165 Enable the STM32F7 Quad-SPI (QSPI) driver. This driver can be
166 used to access the SPI NOR flash chips on platforms embedding
170 bool "nVidia Tegra114 SPI driver"
172 Enable the nVidia Tegra114 SPI driver. This driver can be used to
173 access the SPI NOR flash on platforms embedding this nVidia Tegra114
176 This controller is different than the older SoCs SPI controller and
177 also register interface get changed with this controller.
179 config TEGRA20_SFLASH
180 bool "nVidia Tegra20 Serial Flash controller driver"
182 Enable the nVidia Tegra20 Serial Flash controller driver. This driver
183 can be used to access the SPI NOR flash on platforms embedding this
184 nVidia Tegra20 IP core.
187 bool "nVidia Tegra20/Tegra30 SLINK driver"
189 Enable the nVidia Tegra20/Tegra30 SLINK driver. This driver can
190 be used to access the SPI NOR flash on platforms embedding this
191 nVidia Tegra20/Tegra30 IP cores.
194 bool "nVidia Tegra210 QSPI driver"
196 Enable the Tegra Quad-SPI (QSPI) driver for T210. This driver
197 be used to access SPI chips on platforms embedding this
198 NVIDIA Tegra210 IP core.
201 bool "Xilinx SPI driver"
203 Enable the Xilinx SPI driver from the Xilinx EDK. This SPI
204 controller support 8 bit SPI transfers only, with or w/o FIFO.
205 For more info on Xilinx SPI Register Definitions and Overview
206 see driver file - drivers/spi/xilinx_spi.c
209 bool "Zynq SPI driver"
210 depends on ARCH_ZYNQ || ARCH_ZYNQMP
212 Enable the Zynq SPI driver. This driver can be used to
213 access the SPI NOR flash on platforms embedding this Zynq
217 bool "Zynq QSPI driver"
220 Enable the Zynq Quad-SPI (QSPI) driver. This driver can be
221 used to access the SPI NOR flash on platforms embedding this
222 Zynq QSPI IP core. This IP is used to connect the flash in
223 4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel.
228 bool "Soft SPI driver"
230 Enable Soft SPI driver. This driver is to use GPIO simulate
234 bool "ColdFire SPI driver"
236 Enable the ColdFire SPI driver. This driver can be used on
240 bool "Freescale eSPI driver"
242 Enable the Freescale eSPI driver. This driver can be used to
243 access the SPI interface and SPI NOR flash on platforms embedding
244 this Freescale eSPI IP core.
247 bool "Freescale QSPI driver"
249 Enable the Freescale Quad-SPI (QSPI) driver. This driver can be
250 used to access the SPI NOR flash on platforms embedding this
254 bool "Davinci & Keystone SPI driver"
255 depends on ARCH_DAVINCI || ARCH_KEYSTONE
257 Enable the Davinci SPI driver
260 bool "SuperH SPI driver"
262 Enable the SuperH SPI controller driver. This driver can be used
263 on various SuperH SoCs, such as SH7757.
266 bool "Renesas Quad SPI driver"
268 Enable the Renesas Quad SPI controller driver. This driver can be
269 used on Renesas SoCs.
272 bool "TI QSPI driver"
274 Enable the TI Quad-SPI (QSPI) driver for DRA7xx and AM43xx evms.
275 This driver support spi flash single, quad and memory reads.
278 bool "Marvell Kirkwood SPI Driver"
280 Enable support for SPI on various Marvell SoCs, such as
281 Kirkwood and Armada 375.
284 bool "LPC32XX SPI Driver"
286 Enable support for SPI on LPC32xx
289 bool "MPC8XX SPI Driver"
292 Enable support for SPI on MPC8XX
295 bool "MPC8XXX SPI Driver"
297 Enable support for SPI on the MPC8XXX PowerPC SoCs.
300 bool "MXC SPI Driver"
302 Enable the MXC SPI controller driver. This driver can be used
303 on various i.MX SoCs such as i.MX31/35/51/6/7.
306 bool "MXS SPI Driver"
308 Enable the MXS SPI controller driver. This driver can be used
309 on the i.MX23 and i.MX28 SoCs.
312 bool "McSPI driver for OMAP"
314 SPI master controller for OMAP24XX and later Multichannel SPI
315 (McSPI). This driver be used to access SPI chips on platforms
316 embedding this OMAP3 McSPI IP core.
318 endif # menu "SPI Support"