4 bool "Enable Driver Model for SPI drivers"
7 Enable driver model for SPI. The SPI slave interface
8 (spi_setup_slave(), spi_xfer(), etc.) is then implemented by
9 the SPI uclass. Drivers provide methods to access the SPI
10 buses that they control. The uclass interface is defined in
11 include/spi.h. The existing spi_slave structure is attached
12 as 'parent data' to every slave on each bus. Slaves
13 typically use driver-private data instead of extending the
19 bool "Altera SPI driver"
21 Enable the Altera SPI driver. This driver can be used to
22 access the SPI NOR flash on platforms embedding this Altera
23 IP core. Please find details on the "Embedded Peripherals IP
24 User Guide" of Altera.
27 bool "Atheros SPI driver"
30 Enable the Atheros ar7xxx/ar9xxx SoC SPI driver, it was used
31 to access SPI NOR flash and other SPI peripherals. This driver
32 uses driver model and requires a device tree binding to operate.
33 please refer to doc/device-tree-bindings/spi/spi-ath79.txt.
36 bool "Atmel SPI driver"
39 This enables driver for the Atmel SPI Controller, present on
40 many AT32 (AVR32) and AT91 (ARM) chips. This driver can be
41 used to access the SPI Flash, such as AT25DF321.
44 bool "Cadence QSPI driver"
46 Enable the Cadence Quad-SPI (QSPI) driver. This driver can be
47 used to access the SPI NOR flash on platforms embedding this
51 bool "Designware SPI driver"
53 Enable the Designware SPI driver. This driver can be used to
54 access the SPI NOR flash on platforms embedding this Designware
58 bool "Samsung Exynos SPI driver"
60 Enable the Samsung Exynos SPI driver. This driver can be used to
61 access the SPI NOR flash on platforms embedding this Samsung
65 bool "Freescale DSPI driver"
67 Enable the Freescale DSPI driver. This driver can be used to
68 access the SPI NOR flash and SPI Data flash on platforms embedding
69 this Freescale DSPI IP core. LS102xA and Colibri VF50/VF61 platforms
73 bool "Intel ICH SPI driver"
75 Enable the Intel ICH SPI driver. This driver can be used to
76 access the SPI NOR flash on platforms embedding this Intel
79 config MVEBU_A3700_SPI
80 bool "Marvell Armada 3700 SPI driver"
82 Enable the Marvell Armada 3700 SPI driver. This driver can be
83 used to access the SPI NOR flash on platforms embedding this
87 bool "Microchip PIC32 SPI driver"
90 Enable the Microchip PIC32 SPI driver. This driver can be used
91 to access the SPI NOR flash, MMC-over-SPI on platforms based on
92 Microchip PIC32 family devices.
95 bool "Rockchip SPI driver"
97 Enable the Rockchip SPI driver, used to access SPI NOR flash and
98 other SPI peripherals (such as the Chrome OS EC) on Rockchip SoCs.
99 This uses driver model and requires a device tree binding to
103 bool "Sandbox SPI driver"
104 depends on SANDBOX && DM
106 Enable SPI support for sandbox. This is an emulation of a real SPI
107 bus. Devices can be attached to the bus using the device tree
108 which specifies the driver to use. As an example, see this device
109 tree fragment from sandbox.dts. It shows that the SPI bus has a
110 single flash device on chip select 0 which is emulated by the driver
111 for "sandbox,spi-flash", which is in drivers/mtd/spi/sandbox.c.
114 #address-cells = <1>;
117 compatible = "sandbox,spi";
118 cs-gpios = <0>, <&gpio_a 0>;
121 compatible = "spansion,m25p16", "sandbox,spi-flash";
122 spi-max-frequency = <40000000>;
123 sandbox,filename = "spi.bin";
128 bool "STM32F7 QSPI driver"
131 Enable the STM32F7 Quad-SPI (QSPI) driver. This driver can be
132 used to access the SPI NOR flash chips on platforms embedding
136 bool "nVidia Tegra114 SPI driver"
138 Enable the nVidia Tegra114 SPI driver. This driver can be used to
139 access the SPI NOR flash on platforms embedding this nVidia Tegra114
142 This controller is different than the older SoCs SPI controller and
143 also register interface get changed with this controller.
145 config TEGRA20_SFLASH
146 bool "nVidia Tegra20 Serial Flash controller driver"
148 Enable the nVidia Tegra20 Serial Flash controller driver. This driver
149 can be used to access the SPI NOR flash on platforms embedding this
150 nVidia Tegra20 IP core.
153 bool "nVidia Tegra20/Tegra30 SLINK driver"
155 Enable the nVidia Tegra20/Tegra30 SLINK driver. This driver can
156 be used to access the SPI NOR flash on platforms embedding this
157 nVidia Tegra20/Tegra30 IP cores.
160 bool "nVidia Tegra210 QSPI driver"
162 Enable the Tegra Quad-SPI (QSPI) driver for T210. This driver
163 be used to access SPI chips on platforms embedding this
164 NVIDIA Tegra210 IP core.
167 bool "Xilinx SPI driver"
169 Enable the Xilinx SPI driver from the Xilinx EDK. This SPI
170 controller support 8 bit SPI transfers only, with or w/o FIFO.
171 For more info on Xilinx SPI Register Definitions and Overview
172 see driver file - drivers/spi/xilinx_spi.c
175 bool "Zynq SPI driver"
176 depends on ARCH_ZYNQ || ARCH_ZYNQMP
178 Enable the Zynq SPI driver. This driver can be used to
179 access the SPI NOR flash on platforms embedding this Zynq
183 bool "Zynq QSPI driver"
186 Enable the Zynq Quad-SPI (QSPI) driver. This driver can be
187 used to access the SPI NOR flash on platforms embedding this
188 Zynq QSPI IP core. This IP is used to connect the flash in
189 4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel.
192 bool "McSPI driver for OMAP"
194 SPI master controller for OMAP24XX and later Multichannel SPI
195 (McSPI). This driver be used to access SPI chips on platforms
196 embedding this OMAP3 McSPI IP core.
201 bool "Freescale eSPI driver"
203 Enable the Freescale eSPI driver. This driver can be used to
204 access the SPI interface and SPI NOR flash on platforms embedding
205 this Freescale eSPI IP core.
208 bool "Freescale QSPI driver"
210 Enable the Freescale Quad-SPI (QSPI) driver. This driver can be
211 used to access the SPI NOR flash on platforms embedding this
215 bool "TI QSPI driver"
217 Enable the TI Quad-SPI (QSPI) driver for DRA7xx and AM43xx evms.
218 This driver support spi flash single, quad and memory reads.
220 endmenu # menu "SPI Support"