2 * SH QSPI (Quad SPI) driver
4 * Copyright (C) 2013 Renesas Electronics Corporation
5 * Copyright (C) 2013 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
7 * SPDX-License-Identifier: GPL-2.0
13 #include <asm/arch/rmobile.h>
16 /* SH QSPI register bit masks <REG>_<BIT> */
17 #define SPCR_MSTR 0x08
19 #define SPSR_SPRFF 0x80
20 #define SPSR_SPTEF 0x20
21 #define SPPCR_IO3FV 0x04
22 #define SPPCR_IO2FV 0x02
23 #define SPPCR_IO1FV 0x01
24 #define SPBDCR_RXBC0 (1 << 0)
25 #define SPCMD_SCKDEN (1 << 15)
26 #define SPCMD_SLNDEN (1 << 14)
27 #define SPCMD_SPNDEN (1 << 13)
28 #define SPCMD_SSLKP (1 << 7)
29 #define SPCMD_BRDV0 (1 << 2)
30 #define SPCMD_INIT1 SPCMD_SCKDEN | SPCMD_SLNDEN | \
31 SPCMD_SPNDEN | SPCMD_SSLKP | \
33 #define SPCMD_INIT2 SPCMD_SPNDEN | SPCMD_SSLKP | \
35 #define SPBFCR_TXRST (1 << 7)
36 #define SPBFCR_RXRST (1 << 6)
38 /* SH QSPI register set */
53 unsigned short spcmd0;
54 unsigned short spcmd1;
55 unsigned short spcmd2;
56 unsigned short spcmd3;
59 unsigned short spbdcr;
60 unsigned long spbmul0;
61 unsigned long spbmul1;
62 unsigned long spbmul2;
63 unsigned long spbmul3;
66 struct sh_qspi_slave {
67 struct spi_slave slave;
68 struct sh_qspi_regs *regs;
71 static inline struct sh_qspi_slave *to_sh_qspi(struct spi_slave *slave)
73 return container_of(slave, struct sh_qspi_slave, slave);
76 static void sh_qspi_init(struct sh_qspi_slave *ss)
79 /* Set master mode only */
80 writeb(SPCR_MSTR, &ss->regs->spcr);
82 /* Set SSL signal level */
83 writeb(0x00, &ss->regs->sslp);
85 /* Set MOSI signal value when transfer is in idle state */
86 writeb(SPPCR_IO3FV|SPPCR_IO2FV, &ss->regs->sppcr);
88 /* Set bit rate. See 58.3.8 Quad Serial Peripheral Interface */
89 writeb(0x01, &ss->regs->spbr);
91 /* Disable Dummy Data Transmission */
92 writeb(0x00, &ss->regs->spdcr);
94 /* Set clock delay value */
95 writeb(0x00, &ss->regs->spckd);
97 /* Set SSL negation delay value */
98 writeb(0x00, &ss->regs->sslnd);
100 /* Set next-access delay value */
101 writeb(0x00, &ss->regs->spnd);
103 /* Set equence command */
104 writew(SPCMD_INIT2, &ss->regs->spcmd0);
106 /* Reset transfer and receive Buffer */
107 setbits_8(&ss->regs->spbfcr, SPBFCR_TXRST|SPBFCR_RXRST);
109 /* Clear transfer and receive Buffer control bit */
110 clrbits_8(&ss->regs->spbfcr, SPBFCR_TXRST|SPBFCR_RXRST);
112 /* Set equence control method. Use equence0 only */
113 writeb(0x00, &ss->regs->spscr);
115 /* Enable SPI function */
116 setbits_8(&ss->regs->spcr, SPCR_SPE);
119 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
124 void spi_cs_activate(struct spi_slave *slave)
126 struct sh_qspi_slave *ss = to_sh_qspi(slave);
128 /* Set master mode only */
129 writeb(SPCR_MSTR, &ss->regs->spcr);
132 writew(SPCMD_INIT1, &ss->regs->spcmd0);
134 /* Reset transfer and receive Buffer */
135 setbits_8(&ss->regs->spbfcr, SPBFCR_TXRST|SPBFCR_RXRST);
137 /* Clear transfer and receive Buffer control bit */
138 clrbits_8(&ss->regs->spbfcr, SPBFCR_TXRST|SPBFCR_RXRST);
140 /* Set equence control method. Use equence0 only */
141 writeb(0x00, &ss->regs->spscr);
143 /* Enable SPI function */
144 setbits_8(&ss->regs->spcr, SPCR_SPE);
147 void spi_cs_deactivate(struct spi_slave *slave)
149 struct sh_qspi_slave *ss = to_sh_qspi(slave);
151 /* Disable SPI Function */
152 clrbits_8(&ss->regs->spcr, SPCR_SPE);
160 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
161 unsigned int max_hz, unsigned int mode)
163 struct sh_qspi_slave *ss;
165 if (!spi_cs_is_valid(bus, cs))
168 ss = spi_alloc_slave(struct sh_qspi_slave, bus, cs);
170 printf("SPI_error: Fail to allocate sh_qspi_slave\n");
174 ss->regs = (struct sh_qspi_regs *)SH_QSPI_BASE;
182 void spi_free_slave(struct spi_slave *slave)
184 struct sh_qspi_slave *spi = to_sh_qspi(slave);
189 int spi_claim_bus(struct spi_slave *slave)
194 void spi_release_bus(struct spi_slave *slave)
198 int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
199 void *din, unsigned long flags)
201 struct sh_qspi_slave *ss = to_sh_qspi(slave);
204 unsigned char dtdata = 0, drdata;
205 unsigned char *tdata = &dtdata, *rdata = &drdata;
206 unsigned long *spbmul0 = &ss->regs->spbmul0;
208 if (dout == NULL && din == NULL) {
209 if (flags & SPI_XFER_END)
210 spi_cs_deactivate(slave);
215 printf("%s: bitlen is not 8bit alined %d", __func__, bitlen);
221 if (flags & SPI_XFER_BEGIN) {
222 spi_cs_activate(slave);
224 /* Set 1048576 byte */
225 writel(0x100000, spbmul0);
228 if (flags & SPI_XFER_END)
229 writel(nbyte, spbmul0);
232 tdata = (unsigned char *)dout;
238 while (!(readb(&ss->regs->spsr) & SPSR_SPTEF)) {
246 writeb(*tdata, (unsigned char *)(&ss->regs->spdr));
248 while ((readw(&ss->regs->spbdcr) != SPBDCR_RXBC0)) {
256 while (!(readb(&ss->regs->spsr) & SPSR_SPRFF)) {
264 *rdata = readb((unsigned char *)(&ss->regs->spdr));
274 if (flags & SPI_XFER_END)
275 spi_cs_deactivate(slave);