]> git.sur5r.net Git - u-boot/blob - drivers/sysreset/sysreset_rk3188.c
Merge git://git.denx.de/u-boot-fsl-qoriq
[u-boot] / drivers / sysreset / sysreset_rk3188.c
1 /*
2  * (C) Copyright 2015 Google, Inc
3  *
4  * SPDX-License-Identifier:     GPL-2.0
5  */
6
7 #include <common.h>
8 #include <dm.h>
9 #include <errno.h>
10 #include <syscon.h>
11 #include <sysreset.h>
12 #include <asm/io.h>
13 #include <asm/arch/clock.h>
14 #include <asm/arch/cru_rk3188.h>
15 #include <asm/arch/grf_rk3188.h>
16 #include <asm/arch/hardware.h>
17 #include <linux/err.h>
18
19 int rk3188_sysreset_request(struct udevice *dev, enum sysreset_t type)
20 {
21         struct rk3188_cru *cru = rockchip_get_cru();
22         struct rk3188_grf *grf;
23
24         if (IS_ERR(cru))
25                 return PTR_ERR(cru);
26         switch (type) {
27         case SYSRESET_WARM:
28                 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
29                 if (IS_ERR(grf))
30                         return -EPROTONOSUPPORT;
31
32                 /*
33                  * warm-reset keeps the remap value,
34                  * so make sure it's disabled.
35                  */
36                 rk_clrsetreg(&grf->soc_con0,
37                         NOC_REMAP_MASK << NOC_REMAP_SHIFT,
38                         0 << NOC_REMAP_SHIFT);
39
40                 rk_clrreg(&cru->cru_mode_con, 0xffff);
41                 writel(0xeca8, &cru->cru_glb_srst_snd_value);
42                 break;
43         case SYSRESET_COLD:
44                 rk_clrreg(&cru->cru_mode_con, 0xffff);
45                 writel(0xfdb9, &cru->cru_glb_srst_fst_value);
46                 break;
47         default:
48                 return -EPROTONOSUPPORT;
49         }
50
51         return -EINPROGRESS;
52 }
53
54 static struct sysreset_ops rk3188_sysreset = {
55         .request        = rk3188_sysreset_request,
56 };
57
58 U_BOOT_DRIVER(sysreset_rk3188) = {
59         .name   = "rk3188_sysreset",
60         .id     = UCLASS_SYSRESET,
61         .ops    = &rk3188_sysreset,
62 };