2 * Copyright (c) 2017 Microchip Technology Inc. All rights reserved.
4 * SPDX-License-Identifier: GPL-2.0+
10 #include "usb_ether.h"
13 /* LAN75xx specific register/bit defines */
14 #define LAN75XX_HW_CFG_BIR BIT(7)
16 #define LAN75XX_BURST_CAP 0x034
18 #define LAN75XX_BULK_IN_DLY 0x03C
20 #define LAN75XX_RFE_CTL 0x060
22 #define LAN75XX_FCT_RX_CTL 0x090
24 #define LAN75XX_FCT_TX_CTL 0x094
26 #define LAN75XX_FCT_RX_FIFO_END 0x098
28 #define LAN75XX_FCT_TX_FIFO_END 0x09C
30 #define LAN75XX_FCT_FLOW 0x0A0
32 /* MAC ADDRESS PERFECT FILTER For LAN75xx */
33 #define LAN75XX_ADDR_FILTX 0x300
34 #define LAN75XX_ADDR_FILTX_FB_VALID BIT(31)
37 * Lan75xx infrastructure commands
39 static int lan75xx_phy_gig_workaround(struct usb_device *udev,
40 struct ueth_data *dev)
44 /* Only internal phy */
45 /* Set the phy in Gig loopback */
46 lan7x_mdio_write(udev, dev->phy_id, MII_BMCR,
47 (BMCR_LOOPBACK | BMCR_SPEED1000));
49 /* Wait for the link up */
50 ret = lan7x_mdio_wait_for_bit(udev, "BMSR_LSTATUS",
51 dev->phy_id, MII_BMSR, BMSR_LSTATUS,
52 true, PHY_CONNECT_TIMEOUT_MS, 1);
57 return lan7x_pmt_phy_reset(udev, dev);
60 static int lan75xx_update_flowcontrol(struct usb_device *udev,
61 struct ueth_data *dev)
63 uint32_t flow = 0, fct_flow = 0;
66 ret = lan7x_update_flowcontrol(udev, dev, &flow, &fct_flow);
70 ret = lan7x_write_reg(udev, LAN75XX_FCT_FLOW, fct_flow);
73 return lan7x_write_reg(udev, FLOW, flow);
76 static int lan75xx_set_receive_filter(struct usb_device *udev)
78 /* No multicast in u-boot */
79 return lan7x_write_reg(udev, LAN75XX_RFE_CTL,
80 RFE_CTL_BCAST_EN | RFE_CTL_DA_PERFECT);
83 /* starts the TX path */
84 static void lan75xx_start_tx_path(struct usb_device *udev)
86 /* Enable Tx at MAC */
87 lan7x_write_reg(udev, MAC_TX, MAC_TX_TXEN);
89 /* Enable Tx at SCSRs */
90 lan7x_write_reg(udev, LAN75XX_FCT_TX_CTL, FCT_TX_CTL_EN);
93 /* Starts the Receive path */
94 static void lan75xx_start_rx_path(struct usb_device *udev)
96 /* Enable Rx at MAC */
97 lan7x_write_reg(udev, MAC_RX,
98 LAN7X_MAC_RX_MAX_SIZE_DEFAULT |
99 MAC_RX_FCS_STRIP | MAC_RX_RXEN);
101 /* Enable Rx at SCSRs */
102 lan7x_write_reg(udev, LAN75XX_FCT_RX_CTL, FCT_RX_CTL_EN);
105 static int lan75xx_basic_reset(struct usb_device *udev,
106 struct ueth_data *dev,
107 struct lan7x_private *priv)
112 ret = lan7x_basic_reset(udev, dev);
116 /* Keep the chip ID */
117 ret = lan7x_read_reg(udev, ID_REV, &val);
120 debug("LAN75xx ID_REV = 0x%08x\n", val);
122 priv->chipid = (val & ID_REV_CHIP_ID_MASK) >> 16;
124 /* Respond to the IN token with a NAK */
125 ret = lan7x_read_reg(udev, HW_CFG, &val);
128 val |= LAN75XX_HW_CFG_BIR;
129 return lan7x_write_reg(udev, HW_CFG, val);
132 int lan75xx_write_hwaddr(struct udevice *dev)
134 struct usb_device *udev = dev_get_parent_priv(dev);
135 struct eth_pdata *pdata = dev_get_platdata(dev);
136 unsigned char *enetaddr = pdata->enetaddr;
137 u32 addr_lo = get_unaligned_le32(&enetaddr[0]);
138 u32 addr_hi = (u32)get_unaligned_le16(&enetaddr[4]);
141 /* set hardware address */
142 ret = lan7x_write_reg(udev, RX_ADDRL, addr_lo);
146 ret = lan7x_write_reg(udev, RX_ADDRH, addr_hi);
150 ret = lan7x_write_reg(udev, LAN75XX_ADDR_FILTX + 4, addr_lo);
154 addr_hi |= LAN75XX_ADDR_FILTX_FB_VALID;
155 ret = lan7x_write_reg(udev, LAN75XX_ADDR_FILTX, addr_hi);
159 debug("MAC addr %pM written\n", enetaddr);
164 static int lan75xx_eth_start(struct udevice *dev)
166 struct usb_device *udev = dev_get_parent_priv(dev);
167 struct lan7x_private *priv = dev_get_priv(dev);
168 struct ueth_data *ueth = &priv->ueth;
172 /* Reset and read Mac addr were done in probe() */
173 ret = lan75xx_write_hwaddr(dev);
177 ret = lan7x_write_reg(udev, INT_STS, 0xFFFFFFFF);
181 ret = lan7x_write_reg(udev, LAN75XX_BURST_CAP, 0);
185 ret = lan7x_write_reg(udev, LAN75XX_BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
190 write_buf = (MAX_RX_FIFO_SIZE - 512) / 512;
191 ret = lan7x_write_reg(udev, LAN75XX_FCT_RX_FIFO_END, write_buf);
195 write_buf = (MAX_TX_FIFO_SIZE - 512) / 512;
196 ret = lan7x_write_reg(udev, LAN75XX_FCT_TX_FIFO_END, write_buf);
201 ret = lan7x_write_reg(udev, FLOW, 0);
205 /* Init Rx. Set Vlan, keep default for VLAN on 75xx */
206 ret = lan75xx_set_receive_filter(udev);
210 /* phy workaround for gig link */
211 ret = lan75xx_phy_gig_workaround(udev, ueth);
215 /* Init PHY, autonego, and link */
216 ret = lan7x_eth_phylib_connect(dev, &priv->ueth);
219 ret = lan7x_eth_phylib_config_start(dev);
224 * MAC_CR has to be set after PHY init.
225 * MAC will auto detect the PHY speed.
227 ret = lan7x_read_reg(udev, MAC_CR, &write_buf);
230 write_buf |= MAC_CR_AUTO_DUPLEX | MAC_CR_AUTO_SPEED | MAC_CR_ADP;
231 ret = lan7x_write_reg(udev, MAC_CR, write_buf);
235 lan75xx_start_tx_path(udev);
236 lan75xx_start_rx_path(udev);
238 return lan75xx_update_flowcontrol(udev, ueth);
241 int lan75xx_read_rom_hwaddr(struct udevice *dev)
243 struct usb_device *udev = dev_get_parent_priv(dev);
244 struct eth_pdata *pdata = dev_get_platdata(dev);
248 * Refer to the doc/README.enetaddr and doc/README.usb for
249 * the U-Boot MAC address policy
251 ret = lan7x_read_eeprom_mac(pdata->enetaddr, udev);
253 memset(pdata->enetaddr, 0, 6);
258 static int lan75xx_eth_probe(struct udevice *dev)
260 struct usb_device *udev = dev_get_parent_priv(dev);
261 struct lan7x_private *priv = dev_get_priv(dev);
262 struct ueth_data *ueth = &priv->ueth;
263 struct eth_pdata *pdata = dev_get_platdata(dev);
266 /* Do a reset in order to get the MAC address from HW */
267 if (lan75xx_basic_reset(udev, ueth, priv))
270 /* Get the MAC address */
272 * We must set the eth->enetaddr from HW because the upper layer
273 * will force to use the environmental var (usbethaddr) or random if
274 * there is no valid MAC address in eth->enetaddr.
276 * Refer to the doc/README.enetaddr and doc/README.usb for
277 * the U-Boot MAC address policy
279 lan7x_read_eeprom_mac(pdata->enetaddr, udev);
280 /* Do not return 0 for not finding MAC addr in HW */
282 ret = usb_ether_register(dev, ueth, RX_URB_SIZE);
286 /* Register phylib */
287 return lan7x_phylib_register(dev);
290 static const struct eth_ops lan75xx_eth_ops = {
291 .start = lan75xx_eth_start,
292 .send = lan7x_eth_send,
293 .recv = lan7x_eth_recv,
294 .free_pkt = lan7x_free_pkt,
295 .stop = lan7x_eth_stop,
296 .write_hwaddr = lan75xx_write_hwaddr,
297 .read_rom_hwaddr = lan75xx_read_rom_hwaddr,
300 U_BOOT_DRIVER(lan75xx_eth) = {
301 .name = "lan75xx_eth",
303 .probe = lan75xx_eth_probe,
304 .remove = lan7x_eth_remove,
305 .ops = &lan75xx_eth_ops,
306 .priv_auto_alloc_size = sizeof(struct lan7x_private),
307 .platdata_auto_alloc_size = sizeof(struct eth_pdata),
310 static const struct usb_device_id lan75xx_eth_id_table[] = {
311 { USB_DEVICE(0x0424, 0x7500) }, /* LAN7500 USB Ethernet */
312 { } /* Terminating entry */
315 U_BOOT_USB_DEVICE(lan75xx_eth, lan75xx_eth_id_table);