2 * drivers/usb/gadget/s3c_udc_otg.c
3 * Samsung S3C on-chip full/high speed USB OTG 2.0 device controllers
5 * Copyright (C) 2008 for Samsung Electronics
7 * BSP Support for Samsung's UDC driver
9 * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git
11 * State machine bugfixes:
12 * Marek Szyprowski <m.szyprowski@samsung.com>
15 * Marek Szyprowski <m.szyprowski@samsung.com>
16 * Lukasz Majewski <l.majewski@samsumg.com>
18 * SPDX-License-Identifier: GPL-2.0+
22 #include <asm/errno.h>
23 #include <linux/list.h>
26 #include <linux/usb/ch9.h>
27 #include <linux/usb/gadget.h>
29 #include <asm/byteorder.h>
30 #include <asm/unaligned.h>
33 #include <asm/mach-types.h>
34 #include <asm/arch/gpio.h>
37 #include <usb/lin_gadget_compat.h>
39 /***********************************************************/
41 #define OTG_DMA_MODE 1
46 #define DEBUG_OUT_EP 0
49 #include <usb/s3c_udc.h>
54 static char *state_names[] = {
57 "DATA_STATE_NEED_ZLP",
58 "WAIT_FOR_OUT_STATUS",
61 "WAIT_FOR_OUT_COMPLETE",
62 "WAIT_FOR_IN_COMPLETE",
63 "WAIT_FOR_NULL_COMPLETE",
66 #define DRIVER_DESC "S3C HS USB OTG Device Driver, (c) Samsung Electronics"
67 #define DRIVER_VERSION "15 March 2009"
69 struct s3c_udc *the_controller;
71 static const char driver_name[] = "s3c-udc";
72 static const char driver_desc[] = DRIVER_DESC;
73 static const char ep0name[] = "ep0-control";
76 static unsigned int ep0_fifo_size = 64;
77 static unsigned int ep_fifo_size = 512;
78 static unsigned int ep_fifo_size2 = 1024;
79 static int reset_available = 1;
81 static struct usb_ctrlrequest *usb_ctrl;
82 static dma_addr_t usb_ctrl_dma_addr;
87 static int s3c_ep_enable(struct usb_ep *ep,
88 const struct usb_endpoint_descriptor *);
89 static int s3c_ep_disable(struct usb_ep *ep);
90 static struct usb_request *s3c_alloc_request(struct usb_ep *ep,
92 static void s3c_free_request(struct usb_ep *ep, struct usb_request *);
94 static int s3c_queue(struct usb_ep *ep, struct usb_request *, gfp_t gfp_flags);
95 static int s3c_dequeue(struct usb_ep *ep, struct usb_request *);
96 static int s3c_fifo_status(struct usb_ep *ep);
97 static void s3c_fifo_flush(struct usb_ep *ep);
98 static void s3c_ep0_read(struct s3c_udc *dev);
99 static void s3c_ep0_kick(struct s3c_udc *dev, struct s3c_ep *ep);
100 static void s3c_handle_ep0(struct s3c_udc *dev);
101 static int s3c_ep0_write(struct s3c_udc *dev);
102 static int write_fifo_ep0(struct s3c_ep *ep, struct s3c_request *req);
103 static void done(struct s3c_ep *ep, struct s3c_request *req, int status);
104 static void stop_activity(struct s3c_udc *dev,
105 struct usb_gadget_driver *driver);
106 static int udc_enable(struct s3c_udc *dev);
107 static void udc_set_address(struct s3c_udc *dev, unsigned char address);
108 static void reconfig_usbd(void);
109 static void set_max_pktsize(struct s3c_udc *dev, enum usb_device_speed speed);
110 static void nuke(struct s3c_ep *ep, int status);
111 static int s3c_udc_set_halt(struct usb_ep *_ep, int value);
112 static void s3c_udc_set_nak(struct s3c_ep *ep);
114 void set_udc_gadget_private_data(void *p)
116 debug_cond(DEBUG_SETUP != 0,
117 "%s: the_controller: 0x%p, p: 0x%p\n", __func__,
119 the_controller->gadget.dev.device_data = p;
122 void *get_udc_gadget_private_data(struct usb_gadget *gadget)
124 return gadget->dev.device_data;
127 static struct usb_ep_ops s3c_ep_ops = {
128 .enable = s3c_ep_enable,
129 .disable = s3c_ep_disable,
131 .alloc_request = s3c_alloc_request,
132 .free_request = s3c_free_request,
135 .dequeue = s3c_dequeue,
137 .set_halt = s3c_udc_set_halt,
138 .fifo_status = s3c_fifo_status,
139 .fifo_flush = s3c_fifo_flush,
142 #define create_proc_files() do {} while (0)
143 #define remove_proc_files() do {} while (0)
145 /***********************************************************/
147 void __iomem *regs_otg;
148 struct s3c_usbotg_reg *reg;
149 struct s3c_usbotg_phy *phy;
150 static unsigned int usb_phy_ctrl;
152 bool dfu_usb_get_reset(void)
154 return !!(readl(®->gintsts) & INT_RESET);
157 void otg_phy_init(struct s3c_udc *dev)
159 dev->pdata->phy_control(1);
162 printf("USB PHY0 Enable\n");
165 writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0, usb_phy_ctrl);
167 if (dev->pdata->usb_flags == PHY0_SLEEP) /* C210 Universal */
168 writel((readl(&phy->phypwr)
169 &~(PHY_0_SLEEP | OTG_DISABLE_0 | ANALOG_PWRDOWN)
170 &~FORCE_SUSPEND_0), &phy->phypwr);
172 writel((readl(&phy->phypwr) &~(OTG_DISABLE_0 | ANALOG_PWRDOWN)
173 &~FORCE_SUSPEND_0), &phy->phypwr);
175 if (s5p_cpu_id == 0x4412)
176 writel((readl(&phy->phyclk) & ~(EXYNOS4X12_ID_PULLUP0 |
177 EXYNOS4X12_COMMON_ON_N0)) | EXYNOS4X12_CLK_SEL_24MHZ,
178 &phy->phyclk); /* PLL 24Mhz */
180 writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)) |
181 CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */
183 writel((readl(&phy->rstcon) &~(LINK_SW_RST | PHYLNK_SW_RST))
184 | PHY_SW_RST0, &phy->rstcon);
186 writel(readl(&phy->rstcon)
187 &~(PHY_SW_RST0 | LINK_SW_RST | PHYLNK_SW_RST), &phy->rstcon);
191 void otg_phy_off(struct s3c_udc *dev)
193 /* reset controller just in case */
194 writel(PHY_SW_RST0, &phy->rstcon);
196 writel(readl(&phy->phypwr) &~PHY_SW_RST0, &phy->rstcon);
199 writel(readl(&phy->phypwr) | OTG_DISABLE_0 | ANALOG_PWRDOWN
200 | FORCE_SUSPEND_0, &phy->phypwr);
202 writel(readl(usb_phy_ctrl) &~USB_PHY_CTRL_EN0, usb_phy_ctrl);
204 writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)),
209 dev->pdata->phy_control(0);
212 /***********************************************************/
214 #include "s3c_udc_otg_xfer_dma.c"
217 * udc_disable - disable USB device controller
219 static void udc_disable(struct s3c_udc *dev)
221 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
223 udc_set_address(dev, 0);
225 dev->ep0state = WAIT_FOR_SETUP;
226 dev->gadget.speed = USB_SPEED_UNKNOWN;
227 dev->usb_address = 0;
233 * udc_reinit - initialize software state
235 static void udc_reinit(struct s3c_udc *dev)
239 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
241 /* device/ep0 records init */
242 INIT_LIST_HEAD(&dev->gadget.ep_list);
243 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
244 dev->ep0state = WAIT_FOR_SETUP;
246 /* basic endpoint records init */
247 for (i = 0; i < S3C_MAX_ENDPOINTS; i++) {
248 struct s3c_ep *ep = &dev->ep[i];
251 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
255 INIT_LIST_HEAD(&ep->queue);
259 /* the rest was statically initialized, and is read-only */
262 #define BYTES2MAXP(x) (x / 8)
263 #define MAXP2BYTES(x) (x * 8)
265 /* until it's enabled, this UDC should be completely invisible
268 static int udc_enable(struct s3c_udc *dev)
270 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
275 debug_cond(DEBUG_SETUP != 0,
276 "S3C USB 2.0 OTG Controller Core Initialized : 0x%x\n",
277 readl(®->gintmsk));
279 dev->gadget.speed = USB_SPEED_UNKNOWN;
285 Register entry point for the peripheral controller driver.
287 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
289 struct s3c_udc *dev = the_controller;
291 unsigned long flags = 0;
293 debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name");
296 || (driver->speed != USB_SPEED_FULL
297 && driver->speed != USB_SPEED_HIGH)
298 || !driver->bind || !driver->disconnect || !driver->setup)
305 spin_lock_irqsave(&dev->lock, flags);
306 /* first hook up the driver ... */
307 dev->driver = driver;
308 spin_unlock_irqrestore(&dev->lock, flags);
310 if (retval) { /* TODO */
311 printf("target device_add failed, error %d\n", retval);
315 retval = driver->bind(&dev->gadget);
317 debug_cond(DEBUG_SETUP != 0,
318 "%s: bind to driver --> error %d\n",
319 dev->gadget.name, retval);
326 debug_cond(DEBUG_SETUP != 0,
327 "Registered gadget driver %s\n", dev->gadget.name);
334 * Unregister entry point for the peripheral controller driver.
336 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
338 struct s3c_udc *dev = the_controller;
339 unsigned long flags = 0;
343 if (!driver || driver != dev->driver)
346 spin_lock_irqsave(&dev->lock, flags);
348 stop_activity(dev, driver);
349 spin_unlock_irqrestore(&dev->lock, flags);
351 driver->unbind(&dev->gadget);
353 disable_irq(IRQ_OTG);
360 * done - retire a request; caller blocked irqs
362 static void done(struct s3c_ep *ep, struct s3c_request *req, int status)
364 unsigned int stopped = ep->stopped;
366 debug("%s: %s %p, req = %p, stopped = %d\n",
367 __func__, ep->ep.name, ep, &req->req, stopped);
369 list_del_init(&req->queue);
371 if (likely(req->req.status == -EINPROGRESS))
372 req->req.status = status;
374 status = req->req.status;
376 if (status && status != -ESHUTDOWN) {
377 debug("complete %s req %p stat %d len %u/%u\n",
378 ep->ep.name, &req->req, status,
379 req->req.actual, req->req.length);
382 /* don't modify queue heads during completion callback */
386 printf("calling complete callback\n");
388 int i, len = req->req.length;
390 printf("pkt[%d] = ", req->req.length);
393 for (i = 0; i < len; i++) {
394 printf("%02x", ((u8 *)req->req.buf)[i]);
401 spin_unlock(&ep->dev->lock);
402 req->req.complete(&ep->ep, &req->req);
403 spin_lock(&ep->dev->lock);
405 debug("callback completed\n");
407 ep->stopped = stopped;
411 * nuke - dequeue ALL requests
413 static void nuke(struct s3c_ep *ep, int status)
415 struct s3c_request *req;
417 debug("%s: %s %p\n", __func__, ep->ep.name, ep);
419 /* called with irqs blocked */
420 while (!list_empty(&ep->queue)) {
421 req = list_entry(ep->queue.next, struct s3c_request, queue);
422 done(ep, req, status);
426 static void stop_activity(struct s3c_udc *dev,
427 struct usb_gadget_driver *driver)
431 /* don't disconnect drivers more than once */
432 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
434 dev->gadget.speed = USB_SPEED_UNKNOWN;
436 /* prevent new request submissions, kill any outstanding requests */
437 for (i = 0; i < S3C_MAX_ENDPOINTS; i++) {
438 struct s3c_ep *ep = &dev->ep[i];
440 nuke(ep, -ESHUTDOWN);
443 /* report disconnect; the driver is already quiesced */
445 spin_unlock(&dev->lock);
446 driver->disconnect(&dev->gadget);
447 spin_lock(&dev->lock);
450 /* re-init driver-visible data structures */
454 static void reconfig_usbd(void)
456 /* 2. Soft-reset OTG Core and then unreset again. */
458 unsigned int uTemp = writel(CORE_SOFT_RESET, ®->grstctl);
460 debug("Reseting OTG controller\n");
462 writel(0<<15 /* PHY Low Power Clock sel*/
463 |1<<14 /* Non-Periodic TxFIFO Rewind Enable*/
464 |0x5<<10 /* Turnaround time*/
465 |0<<9 | 0<<8 /* [0:HNP disable,1:HNP enable][ 0:SRP disable*/
466 /* 1:SRP enable] H1= 1,1*/
467 |0<<7 /* Ulpi DDR sel*/
468 |0<<6 /* 0: high speed utmi+, 1: full speed serial*/
469 |0<<4 /* 0: utmi+, 1:ulpi*/
470 |1<<3 /* phy i/f 0:8bit, 1:16bit*/
471 |0x7<<0, /* HS/FS Timeout**/
474 /* 3. Put the OTG device core in the disconnected state.*/
475 uTemp = readl(®->dctl);
476 uTemp |= SOFT_DISCONNECT;
477 writel(uTemp, ®->dctl);
481 /* 4. Make the OTG device core exit from the disconnected state.*/
482 uTemp = readl(®->dctl);
483 uTemp = uTemp & ~SOFT_DISCONNECT;
484 writel(uTemp, ®->dctl);
486 /* 5. Configure OTG Core to initial settings of device mode.*/
487 /* [][1: full speed(30Mhz) 0:high speed]*/
488 writel(EP_MISS_CNT(1) | DEV_SPEED_HIGH_SPEED_20, ®->dcfg);
492 /* 6. Unmask the core interrupts*/
493 writel(GINTMSK_INIT, ®->gintmsk);
495 /* 7. Set NAK bit of EP0, EP1, EP2*/
496 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[EP0_CON].doepctl);
497 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[EP0_CON].diepctl);
499 for (i = 1; i < S3C_MAX_ENDPOINTS; i++) {
500 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[i].doepctl);
501 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[i].diepctl);
504 /* 8. Unmask EPO interrupts*/
505 writel(((1 << EP0_CON) << DAINT_OUT_BIT)
506 | (1 << EP0_CON), ®->daintmsk);
508 /* 9. Unmask device OUT EP common interrupts*/
509 writel(DOEPMSK_INIT, ®->doepmsk);
511 /* 10. Unmask device IN EP common interrupts*/
512 writel(DIEPMSK_INIT, ®->diepmsk);
514 /* 11. Set Rx FIFO Size (in 32-bit words) */
515 writel(RX_FIFO_SIZE >> 2, ®->grxfsiz);
517 /* 12. Set Non Periodic Tx FIFO Size */
518 writel((NPTX_FIFO_SIZE >> 2) << 16 | ((RX_FIFO_SIZE >> 2)) << 0,
521 for (i = 1; i < S3C_MAX_HW_ENDPOINTS; i++)
522 writel((PTX_FIFO_SIZE >> 2) << 16 |
523 ((RX_FIFO_SIZE + NPTX_FIFO_SIZE +
524 PTX_FIFO_SIZE*(i-1)) >> 2) << 0,
527 /* Flush the RX FIFO */
528 writel(RX_FIFO_FLUSH, ®->grstctl);
529 while (readl(®->grstctl) & RX_FIFO_FLUSH)
530 debug("%s: waiting for S3C_UDC_OTG_GRSTCTL\n", __func__);
532 /* Flush all the Tx FIFO's */
533 writel(TX_FIFO_FLUSH_ALL, ®->grstctl);
534 writel(TX_FIFO_FLUSH_ALL | TX_FIFO_FLUSH, ®->grstctl);
535 while (readl(®->grstctl) & TX_FIFO_FLUSH)
536 debug("%s: waiting for S3C_UDC_OTG_GRSTCTL\n", __func__);
538 /* 13. Clear NAK bit of EP0, EP1, EP2*/
540 /* EP0: Control OUT */
541 writel(DEPCTL_EPDIS | DEPCTL_CNAK,
542 ®->out_endp[EP0_CON].doepctl);
544 /* 14. Initialize OTG Link Core.*/
545 writel(GAHBCFG_INIT, ®->gahbcfg);
548 static void set_max_pktsize(struct s3c_udc *dev, enum usb_device_speed speed)
550 unsigned int ep_ctrl;
553 if (speed == USB_SPEED_HIGH) {
556 ep_fifo_size2 = 1024;
557 dev->gadget.speed = USB_SPEED_HIGH;
562 dev->gadget.speed = USB_SPEED_FULL;
565 dev->ep[0].ep.maxpacket = ep0_fifo_size;
566 for (i = 1; i < S3C_MAX_ENDPOINTS; i++)
567 dev->ep[i].ep.maxpacket = ep_fifo_size;
569 /* EP0 - Control IN (64 bytes)*/
570 ep_ctrl = readl(®->in_endp[EP0_CON].diepctl);
571 writel(ep_ctrl|(0<<0), ®->in_endp[EP0_CON].diepctl);
573 /* EP0 - Control OUT (64 bytes)*/
574 ep_ctrl = readl(®->out_endp[EP0_CON].doepctl);
575 writel(ep_ctrl|(0<<0), ®->out_endp[EP0_CON].doepctl);
578 static int s3c_ep_enable(struct usb_ep *_ep,
579 const struct usb_endpoint_descriptor *desc)
583 unsigned long flags = 0;
585 debug("%s: %p\n", __func__, _ep);
587 ep = container_of(_ep, struct s3c_ep, ep);
588 if (!_ep || !desc || ep->desc || _ep->name == ep0name
589 || desc->bDescriptorType != USB_DT_ENDPOINT
590 || ep->bEndpointAddress != desc->bEndpointAddress
591 || ep_maxpacket(ep) <
592 le16_to_cpu(get_unaligned(&desc->wMaxPacketSize))) {
594 debug("%s: bad ep or descriptor\n", __func__);
598 /* xfer types must match, except that interrupt ~= bulk */
599 if (ep->bmAttributes != desc->bmAttributes
600 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
601 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
603 debug("%s: %s type mismatch\n", __func__, _ep->name);
607 /* hardware _could_ do smaller, but driver doesn't */
608 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
609 && le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) !=
610 ep_maxpacket(ep)) || !get_unaligned(&desc->wMaxPacketSize)) {
612 debug("%s: bad %s maxpacket\n", __func__, _ep->name);
617 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
619 debug("%s: bogus device state\n", __func__);
626 ep->ep.maxpacket = le16_to_cpu(get_unaligned(&desc->wMaxPacketSize));
628 /* Reset halt state */
630 s3c_udc_set_halt(_ep, 0);
632 spin_lock_irqsave(&ep->dev->lock, flags);
633 s3c_udc_ep_activate(ep);
634 spin_unlock_irqrestore(&ep->dev->lock, flags);
636 debug("%s: enabled %s, stopped = %d, maxpacket = %d\n",
637 __func__, _ep->name, ep->stopped, ep->ep.maxpacket);
644 static int s3c_ep_disable(struct usb_ep *_ep)
647 unsigned long flags = 0;
649 debug("%s: %p\n", __func__, _ep);
651 ep = container_of(_ep, struct s3c_ep, ep);
652 if (!_ep || !ep->desc) {
653 debug("%s: %s not enabled\n", __func__,
654 _ep ? ep->ep.name : NULL);
658 spin_lock_irqsave(&ep->dev->lock, flags);
660 /* Nuke all pending requests */
661 nuke(ep, -ESHUTDOWN);
666 spin_unlock_irqrestore(&ep->dev->lock, flags);
668 debug("%s: disabled %s\n", __func__, _ep->name);
672 static struct usb_request *s3c_alloc_request(struct usb_ep *ep,
675 struct s3c_request *req;
677 debug("%s: %s %p\n", __func__, ep->name, ep);
679 req = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*req));
683 memset(req, 0, sizeof *req);
684 INIT_LIST_HEAD(&req->queue);
689 static void s3c_free_request(struct usb_ep *ep, struct usb_request *_req)
691 struct s3c_request *req;
693 debug("%s: %p\n", __func__, ep);
695 req = container_of(_req, struct s3c_request, req);
696 WARN_ON(!list_empty(&req->queue));
700 /* dequeue JUST ONE request */
701 static int s3c_dequeue(struct usb_ep *_ep, struct usb_request *_req)
704 struct s3c_request *req;
705 unsigned long flags = 0;
707 debug("%s: %p\n", __func__, _ep);
709 ep = container_of(_ep, struct s3c_ep, ep);
710 if (!_ep || ep->ep.name == ep0name)
713 spin_lock_irqsave(&ep->dev->lock, flags);
715 /* make sure it's actually queued on this endpoint */
716 list_for_each_entry(req, &ep->queue, queue) {
717 if (&req->req == _req)
720 if (&req->req != _req) {
721 spin_unlock_irqrestore(&ep->dev->lock, flags);
725 done(ep, req, -ECONNRESET);
727 spin_unlock_irqrestore(&ep->dev->lock, flags);
732 * Return bytes in EP FIFO
734 static int s3c_fifo_status(struct usb_ep *_ep)
739 ep = container_of(_ep, struct s3c_ep, ep);
741 debug("%s: bad ep\n", __func__);
745 debug("%s: %d\n", __func__, ep_index(ep));
747 /* LPD can't report unclaimed bytes from IN fifos */
757 static void s3c_fifo_flush(struct usb_ep *_ep)
761 ep = container_of(_ep, struct s3c_ep, ep);
762 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
763 debug("%s: bad ep\n", __func__);
767 debug("%s: %d\n", __func__, ep_index(ep));
770 static const struct usb_gadget_ops s3c_udc_ops = {
771 /* current versions must always be self-powered */
774 static struct s3c_udc memory = {
778 .ep0 = &memory.ep[0].ep,
782 /* control endpoint */
787 .maxpacket = EP0_FIFO_SIZE,
791 .bEndpointAddress = 0,
794 .ep_type = ep_control,
797 /* first group of endpoints */
800 .name = "ep1in-bulk",
802 .maxpacket = EP_FIFO_SIZE,
806 .bEndpointAddress = USB_DIR_IN | 1,
807 .bmAttributes = USB_ENDPOINT_XFER_BULK,
809 .ep_type = ep_bulk_out,
815 .name = "ep2out-bulk",
817 .maxpacket = EP_FIFO_SIZE,
821 .bEndpointAddress = USB_DIR_OUT | 2,
822 .bmAttributes = USB_ENDPOINT_XFER_BULK,
824 .ep_type = ep_bulk_in,
832 .maxpacket = EP_FIFO_SIZE,
836 .bEndpointAddress = USB_DIR_IN | 3,
837 .bmAttributes = USB_ENDPOINT_XFER_INT,
839 .ep_type = ep_interrupt,
845 * probe - binds to the platform device
848 int s3c_udc_probe(struct s3c_plat_otg_data *pdata)
850 struct s3c_udc *dev = &memory;
853 debug("%s: %p\n", __func__, pdata);
857 phy = (struct s3c_usbotg_phy *)pdata->regs_phy;
858 reg = (struct s3c_usbotg_reg *)pdata->regs_otg;
859 usb_phy_ctrl = pdata->usb_phy_ctrl;
861 /* regs_otg = (void *)pdata->regs_otg; */
863 dev->gadget.is_dualspeed = 1; /* Hack only*/
864 dev->gadget.is_otg = 0;
865 dev->gadget.is_a_peripheral = 0;
866 dev->gadget.b_hnp_enable = 0;
867 dev->gadget.a_hnp_support = 0;
868 dev->gadget.a_alt_hnp_support = 0;
870 the_controller = dev;
872 usb_ctrl = memalign(CONFIG_SYS_CACHELINE_SIZE,
873 ROUND(sizeof(struct usb_ctrlrequest),
874 CONFIG_SYS_CACHELINE_SIZE));
876 error("No memory available for UDC!\n");
880 usb_ctrl_dma_addr = (dma_addr_t) usb_ctrl;
887 int usb_gadget_handle_interrupts()
889 u32 intr_status = readl(®->gintsts);
890 u32 gintmsk = readl(®->gintmsk);
892 if (intr_status & gintmsk)
893 return s3c_udc_irq(1, (void *)the_controller);