git.sur5r.net Git - u-boot/blob - drivers/usb/host/ehci-hcd.c

   1 /*-
   2  * Copyright (c) 2007-2008, Juniper Networks, Inc.
   3  * Copyright (c) 2008, Excito Elektronik i Skåne AB
   4  * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
   5  *
   6  * All rights reserved.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0
   9  */
  10 #include <common.h>
  11 #include <dm.h>
  12 #include <errno.h>
  13 #include <asm/byteorder.h>
  14 #include <asm/unaligned.h>
  15 #include <usb.h>
  16 #include <asm/io.h>
  17 #include <malloc.h>
  18 #include <memalign.h>
  19 #include <watchdog.h>
  20 #include <linux/compiler.h>
  21
  22 #include "ehci.h"
  23
  24 #ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
  25 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
  26 #endif
  27
  28 /*
  29  * EHCI spec page 20 says that the HC may take up to 16 uFrames (= 4ms) to halt.
  30  * Let's time out after 8 to have a little safety margin on top of that.
  31  */
  32 #define HCHALT_TIMEOUT (8 * 1000)
  33
  34 #ifndef CONFIG_DM_USB
  35 static struct ehci_ctrl ehcic[CONFIG_USB_MAX_CONTROLLER_COUNT];
  36 #endif
  37
  38 #define ALIGN_END_ADDR(type, ptr, size)                 \
  39         ((unsigned long)(ptr) + roundup((size) * sizeof(type), USB_DMA_MINALIGN))
  40
  41 static struct descriptor {
  42         struct usb_hub_descriptor hub;
  43         struct usb_device_descriptor device;
  44         struct usb_linux_config_descriptor config;
  45         struct usb_linux_interface_descriptor interface;
  46         struct usb_endpoint_descriptor endpoint;
  47 }  __attribute__ ((packed)) descriptor = {
  48         {
  49                 0x8,            /* bDescLength */
  50                 0x29,           /* bDescriptorType: hub descriptor */
  51                 2,              /* bNrPorts -- runtime modified */
  52                 0,              /* wHubCharacteristics */
  53                 10,             /* bPwrOn2PwrGood */
  54                 0,              /* bHubCntrCurrent */
  55                 {},             /* Device removable */
  56                 {}              /* at most 7 ports! XXX */
  57         },
  58         {
  59                 0x12,           /* bLength */
  60                 1,              /* bDescriptorType: UDESC_DEVICE */
  61                 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
  62                 9,              /* bDeviceClass: UDCLASS_HUB */
  63                 0,              /* bDeviceSubClass: UDSUBCLASS_HUB */
  64                 1,              /* bDeviceProtocol: UDPROTO_HSHUBSTT */
  65                 64,             /* bMaxPacketSize: 64 bytes */
  66                 0x0000,         /* idVendor */
  67                 0x0000,         /* idProduct */
  68                 cpu_to_le16(0x0100), /* bcdDevice */
  69                 1,              /* iManufacturer */
  70                 2,              /* iProduct */
  71                 0,              /* iSerialNumber */
  72                 1               /* bNumConfigurations: 1 */
  73         },
  74         {
  75                 0x9,
  76                 2,              /* bDescriptorType: UDESC_CONFIG */
  77                 cpu_to_le16(0x19),
  78                 1,              /* bNumInterface */
  79                 1,              /* bConfigurationValue */
  80                 0,              /* iConfiguration */
  81                 0x40,           /* bmAttributes: UC_SELF_POWER */
  82                 0               /* bMaxPower */
  83         },
  84         {
  85                 0x9,            /* bLength */
  86                 4,              /* bDescriptorType: UDESC_INTERFACE */
  87                 0,              /* bInterfaceNumber */
  88                 0,              /* bAlternateSetting */
  89                 1,              /* bNumEndpoints */
  90                 9,              /* bInterfaceClass: UICLASS_HUB */
  91                 0,              /* bInterfaceSubClass: UISUBCLASS_HUB */
  92                 0,              /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
  93                 0               /* iInterface */
  94         },
  95         {
  96                 0x7,            /* bLength */
  97                 5,              /* bDescriptorType: UDESC_ENDPOINT */
  98                 0x81,           /* bEndpointAddress:
  99                                  * UE_DIR_IN | EHCI_INTR_ENDPT
 100                                  */
 101                 3,              /* bmAttributes: UE_INTERRUPT */
 102                 8,              /* wMaxPacketSize */
 103                 255             /* bInterval */
 104         },
 105 };
 106
 107 #if defined(CONFIG_EHCI_IS_TDI)
 108 #define ehci_is_TDI()   (1)
 109 #else
 110 #define ehci_is_TDI()   (0)
 111 #endif
 112
 113 static struct ehci_ctrl *ehci_get_ctrl(struct usb_device *udev)
 114 {
 115 #ifdef CONFIG_DM_USB
 116         return dev_get_priv(usb_get_bus(udev->dev));
 117 #else
 118         return udev->controller;
 119 #endif
 120 }
 121
 122 static int ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg)
 123 {
 124         return PORTSC_PSPD(reg);
 125 }
 126
 127 static void ehci_set_usbmode(struct ehci_ctrl *ctrl)
 128 {
 129         uint32_t tmp;
 130         uint32_t *reg_ptr;
 131
 132         reg_ptr = (uint32_t *)((u8 *)&ctrl->hcor->or_usbcmd + USBMODE);
 133         tmp = ehci_readl(reg_ptr);
 134         tmp |= USBMODE_CM_HC;
 135 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
 136         tmp |= USBMODE_BE;
 137 #endif
 138         ehci_writel(reg_ptr, tmp);
 139 }
 140
 141 static void ehci_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t *status_reg,
 142                                uint32_t *reg)
 143 {
 144         mdelay(50);
 145 }
 146
 147 static uint32_t *ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port)
 148 {
 149         if (port < 0 || port >= CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
 150                 /* Printing the message would cause a scan failure! */
 151                 debug("The request port(%u) is not configured\n", port);
 152                 return NULL;
 153         }
 154
 155         return (uint32_t *)&ctrl->hcor->or_portsc[port];
 156 }
 157
 158 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
 159 {
 160         uint32_t result;
 161         do {
 162                 result = ehci_readl(ptr);
 163                 udelay(5);
 164                 if (result == ~(uint32_t)0)
 165                         return -1;
 166                 result &= mask;
 167                 if (result == done)
 168                         return 0;
 169                 usec--;
 170         } while (usec > 0);
 171         return -1;
 172 }
 173
 174 static int ehci_reset(struct ehci_ctrl *ctrl)
 175 {
 176         uint32_t cmd;
 177         int ret = 0;
 178
 179         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 180         cmd = (cmd & ~CMD_RUN) | CMD_RESET;
 181         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 182         ret = handshake((uint32_t *)&ctrl->hcor->or_usbcmd,
 183                         CMD_RESET, 0, 250 * 1000);
 184         if (ret < 0) {
 185                 printf("EHCI fail to reset\n");
 186                 goto out;
 187         }
 188
 189         if (ehci_is_TDI())
 190                 ctrl->ops.set_usb_mode(ctrl);
 191
 192 #ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
 193         cmd = ehci_readl(&ctrl->hcor->or_txfilltuning);
 194         cmd &= ~TXFIFO_THRESH_MASK;
 195         cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH);
 196         ehci_writel(&ctrl->hcor->or_txfilltuning, cmd);
 197 #endif
 198 out:
 199         return ret;
 200 }
 201
 202 static int ehci_shutdown(struct ehci_ctrl *ctrl)
 203 {
 204         int i, ret = 0;
 205         uint32_t cmd, reg;
 206
 207         if (!ctrl || !ctrl->hcor)
 208                 return -EINVAL;
 209
 210         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 211         cmd &= ~(CMD_PSE | CMD_ASE);
 212         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 213         ret = handshake(&ctrl->hcor->or_usbsts, STS_ASS | STS_PSS, 0,
 214                 100 * 1000);
 215
 216         if (!ret) {
 217                 for (i = 0; i < CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS; i++) {
 218                         reg = ehci_readl(&ctrl->hcor->or_portsc[i]);
 219                         reg |= EHCI_PS_SUSP;
 220                         ehci_writel(&ctrl->hcor->or_portsc[i], reg);
 221                 }
 222
 223                 cmd &= ~CMD_RUN;
 224                 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 225                 ret = handshake(&ctrl->hcor->or_usbsts, STS_HALT, STS_HALT,
 226                         HCHALT_TIMEOUT);
 227         }
 228
 229         if (ret)
 230                 puts("EHCI failed to shut down host controller.\n");
 231
 232         return ret;
 233 }
 234
 235 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
 236 {
 237         uint32_t delta, next;
 238         uint32_t addr = (unsigned long)buf;
 239         int idx;
 240
 241         if (addr != ALIGN(addr, ARCH_DMA_MINALIGN))
 242                 debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf);
 243
 244         flush_dcache_range(addr, ALIGN(addr + sz, ARCH_DMA_MINALIGN));
 245
 246         idx = 0;
 247         while (idx < QT_BUFFER_CNT) {
 248                 td->qt_buffer[idx] = cpu_to_hc32(addr);
 249                 td->qt_buffer_hi[idx] = 0;
 250                 next = (addr + EHCI_PAGE_SIZE) & ~(EHCI_PAGE_SIZE - 1);
 251                 delta = next - addr;
 252                 if (delta >= sz)
 253                         break;
 254                 sz -= delta;
 255                 addr = next;
 256                 idx++;
 257         }
 258
 259         if (idx == QT_BUFFER_CNT) {
 260                 printf("out of buffer pointers (%zu bytes left)\n", sz);
 261                 return -1;
 262         }
 263
 264         return 0;
 265 }
 266
 267 static inline u8 ehci_encode_speed(enum usb_device_speed speed)
 268 {
 269         #define QH_HIGH_SPEED   2
 270         #define QH_FULL_SPEED   0
 271         #define QH_LOW_SPEED    1
 272         if (speed == USB_SPEED_HIGH)
 273                 return QH_HIGH_SPEED;
 274         if (speed == USB_SPEED_LOW)
 275                 return QH_LOW_SPEED;
 276         return QH_FULL_SPEED;
 277 }
 278
 279 static void ehci_update_endpt2_dev_n_port(struct usb_device *udev,
 280                                           struct QH *qh)
 281 {
 282         struct usb_device *ttdev;
 283         int parent_devnum;
 284
 285         if (udev->speed != USB_SPEED_LOW && udev->speed != USB_SPEED_FULL)
 286                 return;
 287
 288         /*
 289          * For full / low speed devices we need to get the devnum and portnr of
 290          * the tt, so of the first upstream usb-2 hub, there may be usb-1 hubs
 291          * in the tree before that one!
 292          */
 293 #ifdef CONFIG_DM_USB
 294         /*
 295          * When called from usb-uclass.c: usb_scan_device() udev->dev points
 296          * to the parent udevice, not the actual udevice belonging to the
 297          * udev as the device is not instantiated yet. So when searching
 298          * for the first usb-2 parent start with udev->dev not
 299          * udev->dev->parent .
 300          */
 301         struct udevice *parent;
 302         struct usb_device *uparent;
 303
 304         ttdev = udev;
 305         parent = udev->dev;
 306         uparent = dev_get_parentdata(parent);
 307
 308         while (uparent->speed != USB_SPEED_HIGH) {
 309                 struct udevice *dev = parent;
 310
 311                 if (device_get_uclass_id(dev->parent) != UCLASS_USB_HUB) {
 312                         printf("ehci: Error cannot find high-speed parent of usb-1 device\n");
 313                         return;
 314                 }
 315
 316                 ttdev = dev_get_parentdata(dev);
 317                 parent = dev->parent;
 318                 uparent = dev_get_parentdata(parent);
 319         }
 320         parent_devnum = uparent->devnum;
 321 #else
 322         ttdev = udev;
 323         while (ttdev->parent && ttdev->parent->speed != USB_SPEED_HIGH)
 324                 ttdev = ttdev->parent;
 325         if (!ttdev->parent)
 326                 return;
 327         parent_devnum = ttdev->parent->devnum;
 328 #endif
 329
 330         qh->qh_endpt2 |= cpu_to_hc32(QH_ENDPT2_PORTNUM(ttdev->portnr) |
 331                                      QH_ENDPT2_HUBADDR(parent_devnum));
 332 }
 333
 334 static int
 335 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
 336                    int length, struct devrequest *req)
 337 {
 338         ALLOC_ALIGN_BUFFER(struct QH, qh, 1, USB_DMA_MINALIGN);
 339         struct qTD *qtd;
 340         int qtd_count = 0;
 341         int qtd_counter = 0;
 342         volatile struct qTD *vtd;
 343         unsigned long ts;
 344         uint32_t *tdp;
 345         uint32_t endpt, maxpacket, token, usbsts;
 346         uint32_t c, toggle;
 347         uint32_t cmd;
 348         int timeout;
 349         int ret = 0;
 350         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
 351
 352         debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
 353               buffer, length, req);
 354         if (req != NULL)
 355                 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
 356                       req->request, req->request,
 357                       req->requesttype, req->requesttype,
 358                       le16_to_cpu(req->value), le16_to_cpu(req->value),
 359                       le16_to_cpu(req->index));
 360
 361 #define PKT_ALIGN       512
 362         /*
 363          * The USB transfer is split into qTD transfers. Eeach qTD transfer is
 364          * described by a transfer descriptor (the qTD). The qTDs form a linked
 365          * list with a queue head (QH).
 366          *
 367          * Each qTD transfer starts with a new USB packet, i.e. a packet cannot
 368          * have its beginning in a qTD transfer and its end in the following
 369          * one, so the qTD transfer lengths have to be chosen accordingly.
 370          *
 371          * Each qTD transfer uses up to QT_BUFFER_CNT data buffers, mapped to
 372          * single pages. The first data buffer can start at any offset within a
 373          * page (not considering the cache-line alignment issues), while the
 374          * following buffers must be page-aligned. There is no alignment
 375          * constraint on the size of a qTD transfer.
 376          */
 377         if (req != NULL)
 378                 /* 1 qTD will be needed for SETUP, and 1 for ACK. */
 379                 qtd_count += 1 + 1;
 380         if (length > 0 || req == NULL) {
 381                 /*
 382                  * Determine the qTD transfer size that will be used for the
 383                  * data payload (not considering the first qTD transfer, which
 384                  * may be longer or shorter, and the final one, which may be
 385                  * shorter).
 386                  *
 387                  * In order to keep each packet within a qTD transfer, the qTD
 388                  * transfer size is aligned to PKT_ALIGN, which is a multiple of
 389                  * wMaxPacketSize (except in some cases for interrupt transfers,
 390                  * see comment in submit_int_msg()).
 391                  *
 392                  * By default, i.e. if the input buffer is aligned to PKT_ALIGN,
 393                  * QT_BUFFER_CNT full pages will be used.
 394                  */
 395                 int xfr_sz = QT_BUFFER_CNT;
 396                 /*
 397                  * However, if the input buffer is not aligned to PKT_ALIGN, the
 398                  * qTD transfer size will be one page shorter, and the first qTD
 399                  * data buffer of each transfer will be page-unaligned.
 400                  */
 401                 if ((unsigned long)buffer & (PKT_ALIGN - 1))
 402                         xfr_sz--;
 403                 /* Convert the qTD transfer size to bytes. */
 404                 xfr_sz *= EHCI_PAGE_SIZE;
 405                 /*
 406                  * Approximate by excess the number of qTDs that will be
 407                  * required for the data payload. The exact formula is way more
 408                  * complicated and saves at most 2 qTDs, i.e. a total of 128
 409                  * bytes.
 410                  */
 411                 qtd_count += 2 + length / xfr_sz;
 412         }
 413 /*
 414  * Threshold value based on the worst-case total size of the allocated qTDs for
 415  * a mass-storage transfer of 65535 blocks of 512 bytes.
 416  */
 417 #if CONFIG_SYS_MALLOC_LEN <= 64 + 128 * 1024
 418 #warning CONFIG_SYS_MALLOC_LEN may be too small for EHCI
 419 #endif
 420         qtd = memalign(USB_DMA_MINALIGN, qtd_count * sizeof(struct qTD));
 421         if (qtd == NULL) {
 422                 printf("unable to allocate TDs\n");
 423                 return -1;
 424         }
 425
 426         memset(qh, 0, sizeof(struct QH));
 427         memset(qtd, 0, qtd_count * sizeof(*qtd));
 428
 429         toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
 430
 431         /*
 432          * Setup QH (3.6 in ehci-r10.pdf)
 433          *
 434          *   qh_link ................. 03-00 H
 435          *   qh_endpt1 ............... 07-04 H
 436          *   qh_endpt2 ............... 0B-08 H
 437          * - qh_curtd
 438          *   qh_overlay.qt_next ...... 13-10 H
 439          * - qh_overlay.qt_altnext
 440          */
 441         qh->qh_link = cpu_to_hc32((unsigned long)&ctrl->qh_list | QH_LINK_TYPE_QH);
 442         c = (dev->speed != USB_SPEED_HIGH) && !usb_pipeendpoint(pipe);
 443         maxpacket = usb_maxpacket(dev, pipe);
 444         endpt = QH_ENDPT1_RL(8) | QH_ENDPT1_C(c) |
 445                 QH_ENDPT1_MAXPKTLEN(maxpacket) | QH_ENDPT1_H(0) |
 446                 QH_ENDPT1_DTC(QH_ENDPT1_DTC_DT_FROM_QTD) |
 447                 QH_ENDPT1_EPS(ehci_encode_speed(dev->speed)) |
 448                 QH_ENDPT1_ENDPT(usb_pipeendpoint(pipe)) | QH_ENDPT1_I(0) |
 449                 QH_ENDPT1_DEVADDR(usb_pipedevice(pipe));
 450         qh->qh_endpt1 = cpu_to_hc32(endpt);
 451         endpt = QH_ENDPT2_MULT(1) | QH_ENDPT2_UFCMASK(0) | QH_ENDPT2_UFSMASK(0);
 452         qh->qh_endpt2 = cpu_to_hc32(endpt);
 453         ehci_update_endpt2_dev_n_port(dev, qh);
 454         qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 455         qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 456
 457         tdp = &qh->qh_overlay.qt_next;
 458
 459         if (req != NULL) {
 460                 /*
 461                  * Setup request qTD (3.5 in ehci-r10.pdf)
 462                  *
 463                  *   qt_next ................ 03-00 H
 464                  *   qt_altnext ............. 07-04 H
 465                  *   qt_token ............... 0B-08 H
 466                  *
 467                  *   [ buffer, buffer_hi ] loaded with "req".
 468                  */
 469                 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 470                 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 471                 token = QT_TOKEN_DT(0) | QT_TOKEN_TOTALBYTES(sizeof(*req)) |
 472                         QT_TOKEN_IOC(0) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
 473                         QT_TOKEN_PID(QT_TOKEN_PID_SETUP) |
 474                         QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 475                 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 476                 if (ehci_td_buffer(&qtd[qtd_counter], req, sizeof(*req))) {
 477                         printf("unable to construct SETUP TD\n");
 478                         goto fail;
 479                 }
 480                 /* Update previous qTD! */
 481                 *tdp = cpu_to_hc32((unsigned long)&qtd[qtd_counter]);
 482                 tdp = &qtd[qtd_counter++].qt_next;
 483                 toggle = 1;
 484         }
 485
 486         if (length > 0 || req == NULL) {
 487                 uint8_t *buf_ptr = buffer;
 488                 int left_length = length;
 489
 490                 do {
 491                         /*
 492                          * Determine the size of this qTD transfer. By default,
 493                          * QT_BUFFER_CNT full pages can be used.
 494                          */
 495                         int xfr_bytes = QT_BUFFER_CNT * EHCI_PAGE_SIZE;
 496                         /*
 497                          * However, if the input buffer is not page-aligned, the
 498                          * portion of the first page before the buffer start
 499                          * offset within that page is unusable.
 500                          */
 501                         xfr_bytes -= (unsigned long)buf_ptr & (EHCI_PAGE_SIZE - 1);
 502                         /*
 503                          * In order to keep each packet within a qTD transfer,
 504                          * align the qTD transfer size to PKT_ALIGN.
 505                          */
 506                         xfr_bytes &= ~(PKT_ALIGN - 1);
 507                         /*
 508                          * This transfer may be shorter than the available qTD
 509                          * transfer size that has just been computed.
 510                          */
 511                         xfr_bytes = min(xfr_bytes, left_length);
 512
 513                         /*
 514                          * Setup request qTD (3.5 in ehci-r10.pdf)
 515                          *
 516                          *   qt_next ................ 03-00 H
 517                          *   qt_altnext ............. 07-04 H
 518                          *   qt_token ............... 0B-08 H
 519                          *
 520                          *   [ buffer, buffer_hi ] loaded with "buffer".
 521                          */
 522                         qtd[qtd_counter].qt_next =
 523                                         cpu_to_hc32(QT_NEXT_TERMINATE);
 524                         qtd[qtd_counter].qt_altnext =
 525                                         cpu_to_hc32(QT_NEXT_TERMINATE);
 526                         token = QT_TOKEN_DT(toggle) |
 527                                 QT_TOKEN_TOTALBYTES(xfr_bytes) |
 528                                 QT_TOKEN_IOC(req == NULL) | QT_TOKEN_CPAGE(0) |
 529                                 QT_TOKEN_CERR(3) |
 530                                 QT_TOKEN_PID(usb_pipein(pipe) ?
 531                                         QT_TOKEN_PID_IN : QT_TOKEN_PID_OUT) |
 532                                 QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 533                         qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 534                         if (ehci_td_buffer(&qtd[qtd_counter], buf_ptr,
 535                                                 xfr_bytes)) {
 536                                 printf("unable to construct DATA TD\n");
 537                                 goto fail;
 538                         }
 539                         /* Update previous qTD! */
 540                         *tdp = cpu_to_hc32((unsigned long)&qtd[qtd_counter]);
 541                         tdp = &qtd[qtd_counter++].qt_next;
 542                         /*
 543                          * Data toggle has to be adjusted since the qTD transfer
 544                          * size is not always an even multiple of
 545                          * wMaxPacketSize.
 546                          */
 547                         if ((xfr_bytes / maxpacket) & 1)
 548                                 toggle ^= 1;
 549                         buf_ptr += xfr_bytes;
 550                         left_length -= xfr_bytes;
 551                 } while (left_length > 0);
 552         }
 553
 554         if (req != NULL) {
 555                 /*
 556                  * Setup request qTD (3.5 in ehci-r10.pdf)
 557                  *
 558                  *   qt_next ................ 03-00 H
 559                  *   qt_altnext ............. 07-04 H
 560                  *   qt_token ............... 0B-08 H
 561                  */
 562                 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 563                 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 564                 token = QT_TOKEN_DT(1) | QT_TOKEN_TOTALBYTES(0) |
 565                         QT_TOKEN_IOC(1) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
 566                         QT_TOKEN_PID(usb_pipein(pipe) ?
 567                                 QT_TOKEN_PID_OUT : QT_TOKEN_PID_IN) |
 568                         QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
 569                 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
 570                 /* Update previous qTD! */
 571                 *tdp = cpu_to_hc32((unsigned long)&qtd[qtd_counter]);
 572                 tdp = &qtd[qtd_counter++].qt_next;
 573         }
 574
 575         ctrl->qh_list.qh_link = cpu_to_hc32((unsigned long)qh | QH_LINK_TYPE_QH);
 576
 577         /* Flush dcache */
 578         flush_dcache_range((unsigned long)&ctrl->qh_list,
 579                 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 580         flush_dcache_range((unsigned long)qh, ALIGN_END_ADDR(struct QH, qh, 1));
 581         flush_dcache_range((unsigned long)qtd,
 582                            ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
 583
 584         /* Set async. queue head pointer. */
 585         ehci_writel(&ctrl->hcor->or_asynclistaddr, (unsigned long)&ctrl->qh_list);
 586
 587         usbsts = ehci_readl(&ctrl->hcor->or_usbsts);
 588         ehci_writel(&ctrl->hcor->or_usbsts, (usbsts & 0x3f));
 589
 590         /* Enable async. schedule. */
 591         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 592         cmd |= CMD_ASE;
 593         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 594
 595         ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, STS_ASS,
 596                         100 * 1000);
 597         if (ret < 0) {
 598                 printf("EHCI fail timeout STS_ASS set\n");
 599                 goto fail;
 600         }
 601
 602         /* Wait for TDs to be processed. */
 603         ts = get_timer(0);
 604         vtd = &qtd[qtd_counter - 1];
 605         timeout = USB_TIMEOUT_MS(pipe);
 606         do {
 607                 /* Invalidate dcache */
 608                 invalidate_dcache_range((unsigned long)&ctrl->qh_list,
 609                         ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 610                 invalidate_dcache_range((unsigned long)qh,
 611                         ALIGN_END_ADDR(struct QH, qh, 1));
 612                 invalidate_dcache_range((unsigned long)qtd,
 613                         ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
 614
 615                 token = hc32_to_cpu(vtd->qt_token);
 616                 if (!(QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE))
 617                         break;
 618                 WATCHDOG_RESET();
 619         } while (get_timer(ts) < timeout);
 620
 621         /*
 622          * Invalidate the memory area occupied by buffer
 623          * Don't try to fix the buffer alignment, if it isn't properly
 624          * aligned it's upper layer's fault so let invalidate_dcache_range()
 625          * vow about it. But we have to fix the length as it's actual
 626          * transfer length and can be unaligned. This is potentially
 627          * dangerous operation, it's responsibility of the calling
 628          * code to make sure enough space is reserved.
 629          */
 630         invalidate_dcache_range((unsigned long)buffer,
 631                 ALIGN((unsigned long)buffer + length, ARCH_DMA_MINALIGN));
 632
 633         /* Check that the TD processing happened */
 634         if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)
 635                 printf("EHCI timed out on TD - token=%#x\n", token);
 636
 637         /* Disable async schedule. */
 638         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 639         cmd &= ~CMD_ASE;
 640         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 641
 642         ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, 0,
 643                         100 * 1000);
 644         if (ret < 0) {
 645                 printf("EHCI fail timeout STS_ASS reset\n");
 646                 goto fail;
 647         }
 648
 649         token = hc32_to_cpu(qh->qh_overlay.qt_token);
 650         if (!(QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)) {
 651                 debug("TOKEN=%#x\n", token);
 652                 switch (QT_TOKEN_GET_STATUS(token) &
 653                         ~(QT_TOKEN_STATUS_SPLITXSTATE | QT_TOKEN_STATUS_PERR)) {
 654                 case 0:
 655                         toggle = QT_TOKEN_GET_DT(token);
 656                         usb_settoggle(dev, usb_pipeendpoint(pipe),
 657                                        usb_pipeout(pipe), toggle);
 658                         dev->status = 0;
 659                         break;
 660                 case QT_TOKEN_STATUS_HALTED:
 661                         dev->status = USB_ST_STALLED;
 662                         break;
 663                 case QT_TOKEN_STATUS_ACTIVE | QT_TOKEN_STATUS_DATBUFERR:
 664                 case QT_TOKEN_STATUS_DATBUFERR:
 665                         dev->status = USB_ST_BUF_ERR;
 666                         break;
 667                 case QT_TOKEN_STATUS_HALTED | QT_TOKEN_STATUS_BABBLEDET:
 668                 case QT_TOKEN_STATUS_BABBLEDET:
 669                         dev->status = USB_ST_BABBLE_DET;
 670                         break;
 671                 default:
 672                         dev->status = USB_ST_CRC_ERR;
 673                         if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_HALTED)
 674                                 dev->status |= USB_ST_STALLED;
 675                         break;
 676                 }
 677                 dev->act_len = length - QT_TOKEN_GET_TOTALBYTES(token);
 678         } else {
 679                 dev->act_len = 0;
 680 #ifndef CONFIG_USB_EHCI_FARADAY
 681                 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
 682                       dev->devnum, ehci_readl(&ctrl->hcor->or_usbsts),
 683                       ehci_readl(&ctrl->hcor->or_portsc[0]),
 684                       ehci_readl(&ctrl->hcor->or_portsc[1]));
 685 #endif
 686         }
 687
 688         free(qtd);
 689         return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
 690
 691 fail:
 692         free(qtd);
 693         return -1;
 694 }
 695
 696 static int ehci_submit_root(struct usb_device *dev, unsigned long pipe,
 697                             void *buffer, int length, struct devrequest *req)
 698 {
 699         uint8_t tmpbuf[4];
 700         u16 typeReq;
 701         void *srcptr = NULL;
 702         int len, srclen;
 703         uint32_t reg;
 704         uint32_t *status_reg;
 705         int port = le16_to_cpu(req->index) & 0xff;
 706         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
 707
 708         srclen = 0;
 709
 710         debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
 711               req->request, req->request,
 712               req->requesttype, req->requesttype,
 713               le16_to_cpu(req->value), le16_to_cpu(req->index));
 714
 715         typeReq = req->request | req->requesttype << 8;
 716
 717         switch (typeReq) {
 718         case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
 719         case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 720         case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 721                 status_reg = ctrl->ops.get_portsc_register(ctrl, port - 1);
 722                 if (!status_reg)
 723                         return -1;
 724                 break;
 725         default:
 726                 status_reg = NULL;
 727                 break;
 728         }
 729
 730         switch (typeReq) {
 731         case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
 732                 switch (le16_to_cpu(req->value) >> 8) {
 733                 case USB_DT_DEVICE:
 734                         debug("USB_DT_DEVICE request\n");
 735                         srcptr = &descriptor.device;
 736                         srclen = descriptor.device.bLength;
 737                         break;
 738                 case USB_DT_CONFIG:
 739                         debug("USB_DT_CONFIG config\n");
 740                         srcptr = &descriptor.config;
 741                         srclen = descriptor.config.bLength +
 742                                         descriptor.interface.bLength +
 743                                         descriptor.endpoint.bLength;
 744                         break;
 745                 case USB_DT_STRING:
 746                         debug("USB_DT_STRING config\n");
 747                         switch (le16_to_cpu(req->value) & 0xff) {
 748                         case 0: /* Language */
 749                                 srcptr = "\4\3\1\0";
 750                                 srclen = 4;
 751                                 break;
 752                         case 1: /* Vendor */
 753                                 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
 754                                 srclen = 14;
 755                                 break;
 756                         case 2: /* Product */
 757                                 srcptr = "\52\3E\0H\0C\0I\0 "
 758                                          "\0H\0o\0s\0t\0 "
 759                                          "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
 760                                 srclen = 42;
 761                                 break;
 762                         default:
 763                                 debug("unknown value DT_STRING %x\n",
 764                                         le16_to_cpu(req->value));
 765                                 goto unknown;
 766                         }
 767                         break;
 768                 default:
 769                         debug("unknown value %x\n", le16_to_cpu(req->value));
 770                         goto unknown;
 771                 }
 772                 break;
 773         case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
 774                 switch (le16_to_cpu(req->value) >> 8) {
 775                 case USB_DT_HUB:
 776                         debug("USB_DT_HUB config\n");
 777                         srcptr = &descriptor.hub;
 778                         srclen = descriptor.hub.bLength;
 779                         break;
 780                 default:
 781                         debug("unknown value %x\n", le16_to_cpu(req->value));
 782                         goto unknown;
 783                 }
 784                 break;
 785         case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
 786                 debug("USB_REQ_SET_ADDRESS\n");
 787                 ctrl->rootdev = le16_to_cpu(req->value);
 788                 break;
 789         case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
 790                 debug("USB_REQ_SET_CONFIGURATION\n");
 791                 /* Nothing to do */
 792                 break;
 793         case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
 794                 tmpbuf[0] = 1;  /* USB_STATUS_SELFPOWERED */
 795                 tmpbuf[1] = 0;
 796                 srcptr = tmpbuf;
 797                 srclen = 2;
 798                 break;
 799         case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
 800                 memset(tmpbuf, 0, 4);
 801                 reg = ehci_readl(status_reg);
 802                 if (reg & EHCI_PS_CS)
 803                         tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
 804                 if (reg & EHCI_PS_PE)
 805                         tmpbuf[0] |= USB_PORT_STAT_ENABLE;
 806                 if (reg & EHCI_PS_SUSP)
 807                         tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
 808                 if (reg & EHCI_PS_OCA)
 809                         tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
 810                 if (reg & EHCI_PS_PR)
 811                         tmpbuf[0] |= USB_PORT_STAT_RESET;
 812                 if (reg & EHCI_PS_PP)
 813                         tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
 814
 815                 if (ehci_is_TDI()) {
 816                         switch (ctrl->ops.get_port_speed(ctrl, reg)) {
 817                         case PORTSC_PSPD_FS:
 818                                 break;
 819                         case PORTSC_PSPD_LS:
 820                                 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
 821                                 break;
 822                         case PORTSC_PSPD_HS:
 823                         default:
 824                                 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
 825                                 break;
 826                         }
 827                 } else {
 828                         tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
 829                 }
 830
 831                 if (reg & EHCI_PS_CSC)
 832                         tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
 833                 if (reg & EHCI_PS_PEC)
 834                         tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
 835                 if (reg & EHCI_PS_OCC)
 836                         tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
 837                 if (ctrl->portreset & (1 << port))
 838                         tmpbuf[2] |= USB_PORT_STAT_C_RESET;
 839
 840                 srcptr = tmpbuf;
 841                 srclen = 4;
 842                 break;
 843         case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 844                 reg = ehci_readl(status_reg);
 845                 reg &= ~EHCI_PS_CLEAR;
 846                 switch (le16_to_cpu(req->value)) {
 847                 case USB_PORT_FEAT_ENABLE:
 848                         reg |= EHCI_PS_PE;
 849                         ehci_writel(status_reg, reg);
 850                         break;
 851                 case USB_PORT_FEAT_POWER:
 852                         if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams))) {
 853                                 reg |= EHCI_PS_PP;
 854                                 ehci_writel(status_reg, reg);
 855                         }
 856                         break;
 857                 case USB_PORT_FEAT_RESET:
 858                         if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
 859                             !ehci_is_TDI() &&
 860                             EHCI_PS_IS_LOWSPEED(reg)) {
 861                                 /* Low speed device, give up ownership. */
 862                                 debug("port %d low speed --> companion\n",
 863                                       port - 1);
 864                                 reg |= EHCI_PS_PO;
 865                                 ehci_writel(status_reg, reg);
 866                                 return -ENXIO;
 867                         } else {
 868                                 int ret;
 869
 870                                 reg |= EHCI_PS_PR;
 871                                 reg &= ~EHCI_PS_PE;
 872                                 ehci_writel(status_reg, reg);
 873                                 /*
 874                                  * caller must wait, then call GetPortStatus
 875                                  * usb 2.0 specification say 50 ms resets on
 876                                  * root
 877                                  */
 878                                 ctrl->ops.powerup_fixup(ctrl, status_reg, &reg);
 879
 880                                 ehci_writel(status_reg, reg & ~EHCI_PS_PR);
 881                                 /*
 882                                  * A host controller must terminate the reset
 883                                  * and stabilize the state of the port within
 884                                  * 2 milliseconds
 885                                  */
 886                                 ret = handshake(status_reg, EHCI_PS_PR, 0,
 887                                                 2 * 1000);
 888                                 if (!ret) {
 889                                         reg = ehci_readl(status_reg);
 890                                         if ((reg & (EHCI_PS_PE | EHCI_PS_CS))
 891                                             == EHCI_PS_CS && !ehci_is_TDI()) {
 892                                                 debug("port %d full speed --> companion\n", port - 1);
 893                                                 reg &= ~EHCI_PS_CLEAR;
 894                                                 reg |= EHCI_PS_PO;
 895                                                 ehci_writel(status_reg, reg);
 896                                                 return -ENXIO;
 897                                         } else {
 898                                                 ctrl->portreset |= 1 << port;
 899                                         }
 900                                 } else {
 901                                         printf("port(%d) reset error\n",
 902                                                port - 1);
 903                                 }
 904                         }
 905                         break;
 906                 case USB_PORT_FEAT_TEST:
 907                         ehci_shutdown(ctrl);
 908                         reg &= ~(0xf << 16);
 909                         reg |= ((le16_to_cpu(req->index) >> 8) & 0xf) << 16;
 910                         ehci_writel(status_reg, reg);
 911                         break;
 912                 default:
 913                         debug("unknown feature %x\n", le16_to_cpu(req->value));
 914                         goto unknown;
 915                 }
 916                 /* unblock posted writes */
 917                 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
 918                 break;
 919         case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 920                 reg = ehci_readl(status_reg);
 921                 reg &= ~EHCI_PS_CLEAR;
 922                 switch (le16_to_cpu(req->value)) {
 923                 case USB_PORT_FEAT_ENABLE:
 924                         reg &= ~EHCI_PS_PE;
 925                         break;
 926                 case USB_PORT_FEAT_C_ENABLE:
 927                         reg |= EHCI_PS_PE;
 928                         break;
 929                 case USB_PORT_FEAT_POWER:
 930                         if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams)))
 931                                 reg &= ~EHCI_PS_PP;
 932                         break;
 933                 case USB_PORT_FEAT_C_CONNECTION:
 934                         reg |= EHCI_PS_CSC;
 935                         break;
 936                 case USB_PORT_FEAT_OVER_CURRENT:
 937                         reg |= EHCI_PS_OCC;
 938                         break;
 939                 case USB_PORT_FEAT_C_RESET:
 940                         ctrl->portreset &= ~(1 << port);
 941                         break;
 942                 default:
 943                         debug("unknown feature %x\n", le16_to_cpu(req->value));
 944                         goto unknown;
 945                 }
 946                 ehci_writel(status_reg, reg);
 947                 /* unblock posted write */
 948                 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
 949                 break;
 950         default:
 951                 debug("Unknown request\n");
 952                 goto unknown;
 953         }
 954
 955         mdelay(1);
 956         len = min3(srclen, (int)le16_to_cpu(req->length), length);
 957         if (srcptr != NULL && len > 0)
 958                 memcpy(buffer, srcptr, len);
 959         else
 960                 debug("Len is 0\n");
 961
 962         dev->act_len = len;
 963         dev->status = 0;
 964         return 0;
 965
 966 unknown:
 967         debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
 968               req->requesttype, req->request, le16_to_cpu(req->value),
 969               le16_to_cpu(req->index), le16_to_cpu(req->length));
 970
 971         dev->act_len = 0;
 972         dev->status = USB_ST_STALLED;
 973         return -1;
 974 }
 975
 976 const struct ehci_ops default_ehci_ops = {
 977         .set_usb_mode           = ehci_set_usbmode,
 978         .get_port_speed         = ehci_get_port_speed,
 979         .powerup_fixup          = ehci_powerup_fixup,
 980         .get_portsc_register    = ehci_get_portsc_register,
 981 };
 982
 983 static void ehci_setup_ops(struct ehci_ctrl *ctrl, const struct ehci_ops *ops)
 984 {
 985         if (!ops) {
 986                 ctrl->ops = default_ehci_ops;
 987         } else {
 988                 ctrl->ops = *ops;
 989                 if (!ctrl->ops.set_usb_mode)
 990                         ctrl->ops.set_usb_mode = ehci_set_usbmode;
 991                 if (!ctrl->ops.get_port_speed)
 992                         ctrl->ops.get_port_speed = ehci_get_port_speed;
 993                 if (!ctrl->ops.powerup_fixup)
 994                         ctrl->ops.powerup_fixup = ehci_powerup_fixup;
 995                 if (!ctrl->ops.get_portsc_register)
 996                         ctrl->ops.get_portsc_register =
 997                                         ehci_get_portsc_register;
 998         }
 999 }
1000
1001 #ifndef CONFIG_DM_USB
1002 void ehci_set_controller_priv(int index, void *priv, const struct ehci_ops *ops)
1003 {
1004         struct ehci_ctrl *ctrl = &ehcic[index];
1005
1006         ctrl->priv = priv;
1007         ehci_setup_ops(ctrl, ops);
1008 }
1009
1010 void *ehci_get_controller_priv(int index)
1011 {
1012         return ehcic[index].priv;
1013 }
1014 #endif
1015
1016 static int ehci_common_init(struct ehci_ctrl *ctrl, uint tweaks)
1017 {
1018         struct QH *qh_list;
1019         struct QH *periodic;
1020         uint32_t reg;
1021         uint32_t cmd;
1022         int i;
1023
1024         /* Set the high address word (aka segment) for 64-bit controller */
1025         if (ehci_readl(&ctrl->hccr->cr_hccparams) & 1)
1026                 ehci_writel(&ctrl->hcor->or_ctrldssegment, 0);
1027
1028         qh_list = &ctrl->qh_list;
1029
1030         /* Set head of reclaim list */
1031         memset(qh_list, 0, sizeof(*qh_list));
1032         qh_list->qh_link = cpu_to_hc32((unsigned long)qh_list | QH_LINK_TYPE_QH);
1033         qh_list->qh_endpt1 = cpu_to_hc32(QH_ENDPT1_H(1) |
1034                                                 QH_ENDPT1_EPS(USB_SPEED_HIGH));
1035         qh_list->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1036         qh_list->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1037         qh_list->qh_overlay.qt_token =
1038                         cpu_to_hc32(QT_TOKEN_STATUS(QT_TOKEN_STATUS_HALTED));
1039
1040         flush_dcache_range((unsigned long)qh_list,
1041                            ALIGN_END_ADDR(struct QH, qh_list, 1));
1042
1043         /* Set async. queue head pointer. */
1044         ehci_writel(&ctrl->hcor->or_asynclistaddr, (unsigned long)qh_list);
1045
1046         /*
1047          * Set up periodic list
1048          * Step 1: Parent QH for all periodic transfers.
1049          */
1050         ctrl->periodic_schedules = 0;
1051         periodic = &ctrl->periodic_queue;
1052         memset(periodic, 0, sizeof(*periodic));
1053         periodic->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1054         periodic->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1055         periodic->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1056
1057         flush_dcache_range((unsigned long)periodic,
1058                            ALIGN_END_ADDR(struct QH, periodic, 1));
1059
1060         /*
1061          * Step 2: Setup frame-list: Every microframe, USB tries the same list.
1062          *         In particular, device specifications on polling frequency
1063          *         are disregarded. Keyboards seem to send NAK/NYet reliably
1064          *         when polled with an empty buffer.
1065          *
1066          *         Split Transactions will be spread across microframes using
1067          *         S-mask and C-mask.
1068          */
1069         if (ctrl->periodic_list == NULL)
1070                 ctrl->periodic_list = memalign(4096, 1024 * 4);
1071
1072         if (!ctrl->periodic_list)
1073                 return -ENOMEM;
1074         for (i = 0; i < 1024; i++) {
1075                 ctrl->periodic_list[i] = cpu_to_hc32((unsigned long)periodic
1076                                                 | QH_LINK_TYPE_QH);
1077         }
1078
1079         flush_dcache_range((unsigned long)ctrl->periodic_list,
1080                            ALIGN_END_ADDR(uint32_t, ctrl->periodic_list,
1081                                           1024));
1082
1083         /* Set periodic list base address */
1084         ehci_writel(&ctrl->hcor->or_periodiclistbase,
1085                 (unsigned long)ctrl->periodic_list);
1086
1087         reg = ehci_readl(&ctrl->hccr->cr_hcsparams);
1088         descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
1089         debug("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
1090         /* Port Indicators */
1091         if (HCS_INDICATOR(reg))
1092                 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1093                                 | 0x80, &descriptor.hub.wHubCharacteristics);
1094         /* Port Power Control */
1095         if (HCS_PPC(reg))
1096                 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1097                                 | 0x01, &descriptor.hub.wHubCharacteristics);
1098
1099         /* Start the host controller. */
1100         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
1101         /*
1102          * Philips, Intel, and maybe others need CMD_RUN before the
1103          * root hub will detect new devices (why?); NEC doesn't
1104          */
1105         cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
1106         cmd |= CMD_RUN;
1107         ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
1108
1109         if (!(tweaks & EHCI_TWEAK_NO_INIT_CF)) {
1110                 /* take control over the ports */
1111                 cmd = ehci_readl(&ctrl->hcor->or_configflag);
1112                 cmd |= FLAG_CF;
1113                 ehci_writel(&ctrl->hcor->or_configflag, cmd);
1114         }
1115
1116         /* unblock posted write */
1117         cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
1118         mdelay(5);
1119         reg = HC_VERSION(ehci_readl(&ctrl->hccr->cr_capbase));
1120         printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
1121
1122         return 0;
1123 }
1124
1125 #ifndef CONFIG_DM_USB
1126 int usb_lowlevel_stop(int index)
1127 {
1128         ehci_shutdown(&ehcic[index]);
1129         return ehci_hcd_stop(index);
1130 }
1131
1132 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1133 {
1134         struct ehci_ctrl *ctrl = &ehcic[index];
1135         uint tweaks = 0;
1136         int rc;
1137
1138         /**
1139          * Set ops to default_ehci_ops, ehci_hcd_init should call
1140          * ehci_set_controller_priv to change any of these function pointers.
1141          */
1142         ctrl->ops = default_ehci_ops;
1143
1144         rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1145         if (rc)
1146                 return rc;
1147         if (init == USB_INIT_DEVICE)
1148                 goto done;
1149
1150         /* EHCI spec section 4.1 */
1151         if (ehci_reset(ctrl))
1152                 return -1;
1153
1154 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
1155         rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1156         if (rc)
1157                 return rc;
1158 #endif
1159 #ifdef CONFIG_USB_EHCI_FARADAY
1160         tweaks |= EHCI_TWEAK_NO_INIT_CF;
1161 #endif
1162         rc = ehci_common_init(ctrl, tweaks);
1163         if (rc)
1164                 return rc;
1165
1166         ctrl->rootdev = 0;
1167 done:
1168         *controller = &ehcic[index];
1169         return 0;
1170 }
1171 #endif
1172
1173 static int _ehci_submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1174                                  void *buffer, int length)
1175 {
1176
1177         if (usb_pipetype(pipe) != PIPE_BULK) {
1178                 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
1179                 return -1;
1180         }
1181         return ehci_submit_async(dev, pipe, buffer, length, NULL);
1182 }
1183
1184 static int _ehci_submit_control_msg(struct usb_device *dev, unsigned long pipe,
1185                                     void *buffer, int length,
1186                                     struct devrequest *setup)
1187 {
1188         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1189
1190         if (usb_pipetype(pipe) != PIPE_CONTROL) {
1191                 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
1192                 return -1;
1193         }
1194
1195         if (usb_pipedevice(pipe) == ctrl->rootdev) {
1196                 if (!ctrl->rootdev)
1197                         dev->speed = USB_SPEED_HIGH;
1198                 return ehci_submit_root(dev, pipe, buffer, length, setup);
1199         }
1200         return ehci_submit_async(dev, pipe, buffer, length, setup);
1201 }
1202
1203 struct int_queue {
1204         int elementsize;
1205         unsigned long pipe;
1206         struct QH *first;
1207         struct QH *current;
1208         struct QH *last;
1209         struct qTD *tds;
1210 };
1211
1212 #define NEXT_QH(qh) (struct QH *)((unsigned long)hc32_to_cpu((qh)->qh_link) & ~0x1f)
1213
1214 static int
1215 enable_periodic(struct ehci_ctrl *ctrl)
1216 {
1217         uint32_t cmd;
1218         struct ehci_hcor *hcor = ctrl->hcor;
1219         int ret;
1220
1221         cmd = ehci_readl(&hcor->or_usbcmd);
1222         cmd |= CMD_PSE;
1223         ehci_writel(&hcor->or_usbcmd, cmd);
1224
1225         ret = handshake((uint32_t *)&hcor->or_usbsts,
1226                         STS_PSS, STS_PSS, 100 * 1000);
1227         if (ret < 0) {
1228                 printf("EHCI failed: timeout when enabling periodic list\n");
1229                 return -ETIMEDOUT;
1230         }
1231         udelay(1000);
1232         return 0;
1233 }
1234
1235 static int
1236 disable_periodic(struct ehci_ctrl *ctrl)
1237 {
1238         uint32_t cmd;
1239         struct ehci_hcor *hcor = ctrl->hcor;
1240         int ret;
1241
1242         cmd = ehci_readl(&hcor->or_usbcmd);
1243         cmd &= ~CMD_PSE;
1244         ehci_writel(&hcor->or_usbcmd, cmd);
1245
1246         ret = handshake((uint32_t *)&hcor->or_usbsts,
1247                         STS_PSS, 0, 100 * 1000);
1248         if (ret < 0) {
1249                 printf("EHCI failed: timeout when disabling periodic list\n");
1250                 return -ETIMEDOUT;
1251         }
1252         return 0;
1253 }
1254
1255 static struct int_queue *_ehci_create_int_queue(struct usb_device *dev,
1256                         unsigned long pipe, int queuesize, int elementsize,
1257                         void *buffer, int interval)
1258 {
1259         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1260         struct int_queue *result = NULL;
1261         uint32_t i, toggle;
1262
1263         /*
1264          * Interrupt transfers requiring several transactions are not supported
1265          * because bInterval is ignored.
1266          *
1267          * Also, ehci_submit_async() relies on wMaxPacketSize being a power of 2
1268          * <= PKT_ALIGN if several qTDs are required, while the USB
1269          * specification does not constrain this for interrupt transfers. That
1270          * means that ehci_submit_async() would support interrupt transfers
1271          * requiring several transactions only as long as the transfer size does
1272          * not require more than a single qTD.
1273          */
1274         if (elementsize > usb_maxpacket(dev, pipe)) {
1275                 printf("%s: xfers requiring several transactions are not supported.\n",
1276                        __func__);
1277                 return NULL;
1278         }
1279
1280         debug("Enter create_int_queue\n");
1281         if (usb_pipetype(pipe) != PIPE_INTERRUPT) {
1282                 debug("non-interrupt pipe (type=%lu)", usb_pipetype(pipe));
1283                 return NULL;
1284         }
1285
1286         /* limit to 4 full pages worth of data -
1287          * we can safely fit them in a single TD,
1288          * no matter the alignment
1289          */
1290         if (elementsize >= 16384) {
1291                 debug("too large elements for interrupt transfers\n");
1292                 return NULL;
1293         }
1294
1295         result = malloc(sizeof(*result));
1296         if (!result) {
1297                 debug("ehci intr queue: out of memory\n");
1298                 goto fail1;
1299         }
1300         result->elementsize = elementsize;
1301         result->pipe = pipe;
1302         result->first = memalign(USB_DMA_MINALIGN,
1303                                  sizeof(struct QH) * queuesize);
1304         if (!result->first) {
1305                 debug("ehci intr queue: out of memory\n");
1306                 goto fail2;
1307         }
1308         result->current = result->first;
1309         result->last = result->first + queuesize - 1;
1310         result->tds = memalign(USB_DMA_MINALIGN,
1311                                sizeof(struct qTD) * queuesize);
1312         if (!result->tds) {
1313                 debug("ehci intr queue: out of memory\n");
1314                 goto fail3;
1315         }
1316         memset(result->first, 0, sizeof(struct QH) * queuesize);
1317         memset(result->tds, 0, sizeof(struct qTD) * queuesize);
1318
1319         toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
1320
1321         for (i = 0; i < queuesize; i++) {
1322                 struct QH *qh = result->first + i;
1323                 struct qTD *td = result->tds + i;
1324                 void **buf = &qh->buffer;
1325
1326                 qh->qh_link = cpu_to_hc32((unsigned long)(qh+1) | QH_LINK_TYPE_QH);
1327                 if (i == queuesize - 1)
1328                         qh->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1329
1330                 qh->qh_overlay.qt_next = cpu_to_hc32((unsigned long)td);
1331                 qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1332                 qh->qh_endpt1 =
1333                         cpu_to_hc32((0 << 28) | /* No NAK reload (ehci 4.9) */
1334                         (usb_maxpacket(dev, pipe) << 16) | /* MPS */
1335                         (1 << 14) |
1336                         QH_ENDPT1_EPS(ehci_encode_speed(dev->speed)) |
1337                         (usb_pipeendpoint(pipe) << 8) | /* Endpoint Number */
1338                         (usb_pipedevice(pipe) << 0));
1339                 qh->qh_endpt2 = cpu_to_hc32((1 << 30) | /* 1 Tx per mframe */
1340                         (1 << 0)); /* S-mask: microframe 0 */
1341                 if (dev->speed == USB_SPEED_LOW ||
1342                                 dev->speed == USB_SPEED_FULL) {
1343                         /* C-mask: microframes 2-4 */
1344                         qh->qh_endpt2 |= cpu_to_hc32((0x1c << 8));
1345                 }
1346                 ehci_update_endpt2_dev_n_port(dev, qh);
1347
1348                 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1349                 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1350                 debug("communication direction is '%s'\n",
1351                       usb_pipein(pipe) ? "in" : "out");
1352                 td->qt_token = cpu_to_hc32(
1353                         QT_TOKEN_DT(toggle) |
1354                         (elementsize << 16) |
1355                         ((usb_pipein(pipe) ? 1 : 0) << 8) | /* IN/OUT token */
1356                         0x80); /* active */
1357                 td->qt_buffer[0] =
1358                     cpu_to_hc32((unsigned long)buffer + i * elementsize);
1359                 td->qt_buffer[1] =
1360                     cpu_to_hc32((td->qt_buffer[0] + 0x1000) & ~0xfff);
1361                 td->qt_buffer[2] =
1362                     cpu_to_hc32((td->qt_buffer[0] + 0x2000) & ~0xfff);
1363                 td->qt_buffer[3] =
1364                     cpu_to_hc32((td->qt_buffer[0] + 0x3000) & ~0xfff);
1365                 td->qt_buffer[4] =
1366                     cpu_to_hc32((td->qt_buffer[0] + 0x4000) & ~0xfff);
1367
1368                 *buf = buffer + i * elementsize;
1369                 toggle ^= 1;
1370         }
1371
1372         flush_dcache_range((unsigned long)buffer,
1373                            ALIGN_END_ADDR(char, buffer,
1374                                           queuesize * elementsize));
1375         flush_dcache_range((unsigned long)result->first,
1376                            ALIGN_END_ADDR(struct QH, result->first,
1377                                           queuesize));
1378         flush_dcache_range((unsigned long)result->tds,
1379                            ALIGN_END_ADDR(struct qTD, result->tds,
1380                                           queuesize));
1381
1382         if (ctrl->periodic_schedules > 0) {
1383                 if (disable_periodic(ctrl) < 0) {
1384                         debug("FATAL: periodic should never fail, but did");
1385                         goto fail3;
1386                 }
1387         }
1388
1389         /* hook up to periodic list */
1390         struct QH *list = &ctrl->periodic_queue;
1391         result->last->qh_link = list->qh_link;
1392         list->qh_link = cpu_to_hc32((unsigned long)result->first | QH_LINK_TYPE_QH);
1393
1394         flush_dcache_range((unsigned long)result->last,
1395                            ALIGN_END_ADDR(struct QH, result->last, 1));
1396         flush_dcache_range((unsigned long)list,
1397                            ALIGN_END_ADDR(struct QH, list, 1));
1398
1399         if (enable_periodic(ctrl) < 0) {
1400                 debug("FATAL: periodic should never fail, but did");
1401                 goto fail3;
1402         }
1403         ctrl->periodic_schedules++;
1404
1405         debug("Exit create_int_queue\n");
1406         return result;
1407 fail3:
1408         if (result->tds)
1409                 free(result->tds);
1410 fail2:
1411         if (result->first)
1412                 free(result->first);
1413         if (result)
1414                 free(result);
1415 fail1:
1416         return NULL;
1417 }
1418
1419 static void *_ehci_poll_int_queue(struct usb_device *dev,
1420                                   struct int_queue *queue)
1421 {
1422         struct QH *cur = queue->current;
1423         struct qTD *cur_td;
1424         uint32_t token, toggle;
1425         unsigned long pipe = queue->pipe;
1426
1427         /* depleted queue */
1428         if (cur == NULL) {
1429                 debug("Exit poll_int_queue with completed queue\n");
1430                 return NULL;
1431         }
1432         /* still active */
1433         cur_td = &queue->tds[queue->current - queue->first];
1434         invalidate_dcache_range((unsigned long)cur_td,
1435                                 ALIGN_END_ADDR(struct qTD, cur_td, 1));
1436         token = hc32_to_cpu(cur_td->qt_token);
1437         if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE) {
1438                 debug("Exit poll_int_queue with no completed intr transfer. token is %x\n", token);
1439                 return NULL;
1440         }
1441
1442         toggle = QT_TOKEN_GET_DT(token);
1443         usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), toggle);
1444
1445         if (!(cur->qh_link & QH_LINK_TERMINATE))
1446                 queue->current++;
1447         else
1448                 queue->current = NULL;
1449
1450         invalidate_dcache_range((unsigned long)cur->buffer,
1451                                 ALIGN_END_ADDR(char, cur->buffer,
1452                                                queue->elementsize));
1453
1454         debug("Exit poll_int_queue with completed intr transfer. token is %x at %p (first at %p)\n",
1455               token, cur, queue->first);
1456         return cur->buffer;
1457 }
1458
1459 /* Do not free buffers associated with QHs, they're owned by someone else */
1460 static int _ehci_destroy_int_queue(struct usb_device *dev,
1461                                    struct int_queue *queue)
1462 {
1463         struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1464         int result = -1;
1465         unsigned long timeout;
1466
1467         if (disable_periodic(ctrl) < 0) {
1468                 debug("FATAL: periodic should never fail, but did");
1469                 goto out;
1470         }
1471         ctrl->periodic_schedules--;
1472
1473         struct QH *cur = &ctrl->periodic_queue;
1474         timeout = get_timer(0) + 500; /* abort after 500ms */
1475         while (!(cur->qh_link & cpu_to_hc32(QH_LINK_TERMINATE))) {
1476                 debug("considering %p, with qh_link %x\n", cur, cur->qh_link);
1477                 if (NEXT_QH(cur) == queue->first) {
1478                         debug("found candidate. removing from chain\n");
1479                         cur->qh_link = queue->last->qh_link;
1480                         flush_dcache_range((unsigned long)cur,
1481                                            ALIGN_END_ADDR(struct QH, cur, 1));
1482                         result = 0;
1483                         break;
1484                 }
1485                 cur = NEXT_QH(cur);
1486                 if (get_timer(0) > timeout) {
1487                         printf("Timeout destroying interrupt endpoint queue\n");
1488                         result = -1;
1489                         goto out;
1490                 }
1491         }
1492
1493         if (ctrl->periodic_schedules > 0) {
1494                 result = enable_periodic(ctrl);
1495                 if (result < 0)
1496                         debug("FATAL: periodic should never fail, but did");
1497         }
1498
1499 out:
1500         free(queue->tds);
1501         free(queue->first);
1502         free(queue);
1503
1504         return result;
1505 }
1506
1507 static int _ehci_submit_int_msg(struct usb_device *dev, unsigned long pipe,
1508                                 void *buffer, int length, int interval)
1509 {
1510         void *backbuffer;
1511         struct int_queue *queue;
1512         unsigned long timeout;
1513         int result = 0, ret;
1514
1515         debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
1516               dev, pipe, buffer, length, interval);
1517
1518         queue = _ehci_create_int_queue(dev, pipe, 1, length, buffer, interval);
1519         if (!queue)
1520                 return -1;
1521
1522         timeout = get_timer(0) + USB_TIMEOUT_MS(pipe);
1523         while ((backbuffer = _ehci_poll_int_queue(dev, queue)) == NULL)
1524                 if (get_timer(0) > timeout) {
1525                         printf("Timeout poll on interrupt endpoint\n");
1526                         result = -ETIMEDOUT;
1527                         break;
1528                 }
1529
1530         if (backbuffer != buffer) {
1531                 debug("got wrong buffer back (%p instead of %p)\n",
1532                       backbuffer, buffer);
1533                 return -EINVAL;
1534         }
1535
1536         ret = _ehci_destroy_int_queue(dev, queue);
1537         if (ret < 0)
1538                 return ret;
1539
1540         /* everything worked out fine */
1541         return result;
1542 }
1543
1544 #ifndef CONFIG_DM_USB
1545 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1546                             void *buffer, int length)
1547 {
1548         return _ehci_submit_bulk_msg(dev, pipe, buffer, length);
1549 }
1550
1551 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1552                    int length, struct devrequest *setup)
1553 {
1554         return _ehci_submit_control_msg(dev, pipe, buffer, length, setup);
1555 }
1556
1557 int submit_int_msg(struct usb_device *dev, unsigned long pipe,
1558                    void *buffer, int length, int interval)
1559 {
1560         return _ehci_submit_int_msg(dev, pipe, buffer, length, interval);
1561 }
1562
1563 struct int_queue *create_int_queue(struct usb_device *dev,
1564                 unsigned long pipe, int queuesize, int elementsize,
1565                 void *buffer, int interval)
1566 {
1567         return _ehci_create_int_queue(dev, pipe, queuesize, elementsize,
1568                                       buffer, interval);
1569 }
1570
1571 void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)
1572 {
1573         return _ehci_poll_int_queue(dev, queue);
1574 }
1575
1576 int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)
1577 {
1578         return _ehci_destroy_int_queue(dev, queue);
1579 }
1580 #endif
1581
1582 #ifdef CONFIG_DM_USB
1583 static int ehci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
1584                                    unsigned long pipe, void *buffer, int length,
1585                                    struct devrequest *setup)
1586 {
1587         debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__,
1588               dev->name, udev, udev->dev->name, udev->portnr);
1589
1590         return _ehci_submit_control_msg(udev, pipe, buffer, length, setup);
1591 }
1592
1593 static int ehci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
1594                                 unsigned long pipe, void *buffer, int length)
1595 {
1596         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1597         return _ehci_submit_bulk_msg(udev, pipe, buffer, length);
1598 }
1599
1600 static int ehci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
1601                                unsigned long pipe, void *buffer, int length,
1602                                int interval)
1603 {
1604         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1605         return _ehci_submit_int_msg(udev, pipe, buffer, length, interval);
1606 }
1607
1608 static struct int_queue *ehci_create_int_queue(struct udevice *dev,
1609                 struct usb_device *udev, unsigned long pipe, int queuesize,
1610                 int elementsize, void *buffer, int interval)
1611 {
1612         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1613         return _ehci_create_int_queue(udev, pipe, queuesize, elementsize,
1614                                       buffer, interval);
1615 }
1616
1617 static void *ehci_poll_int_queue(struct udevice *dev, struct usb_device *udev,
1618                                  struct int_queue *queue)
1619 {
1620         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1621         return _ehci_poll_int_queue(udev, queue);
1622 }
1623
1624 static int ehci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
1625                                   struct int_queue *queue)
1626 {
1627         debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1628         return _ehci_destroy_int_queue(udev, queue);
1629 }
1630
1631 int ehci_register(struct udevice *dev, struct ehci_hccr *hccr,
1632                   struct ehci_hcor *hcor, const struct ehci_ops *ops,
1633                   uint tweaks, enum usb_init_type init)
1634 {
1635         struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
1636         struct ehci_ctrl *ctrl = dev_get_priv(dev);
1637         int ret;
1638
1639         debug("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p, init=%d\n", __func__,
1640               dev->name, ctrl, hccr, hcor, init);
1641
1642         priv->desc_before_addr = true;
1643
1644         ehci_setup_ops(ctrl, ops);
1645         ctrl->hccr = hccr;
1646         ctrl->hcor = hcor;
1647         ctrl->priv = ctrl;
1648
1649         ctrl->init = init;
1650         if (ctrl->init == USB_INIT_DEVICE)
1651                 goto done;
1652
1653         ret = ehci_reset(ctrl);
1654         if (ret)
1655                 goto err;
1656
1657         ret = ehci_common_init(ctrl, tweaks);
1658         if (ret)
1659                 goto err;
1660 done:
1661         return 0;
1662 err:
1663         free(ctrl);
1664         debug("%s: failed, ret=%d\n", __func__, ret);
1665         return ret;
1666 }
1667
1668 int ehci_deregister(struct udevice *dev)
1669 {
1670         struct ehci_ctrl *ctrl = dev_get_priv(dev);
1671
1672         if (ctrl->init == USB_INIT_DEVICE)
1673                 return 0;
1674
1675         ehci_shutdown(ctrl);
1676
1677         return 0;
1678 }
1679
1680 struct dm_usb_ops ehci_usb_ops = {
1681         .control = ehci_submit_control_msg,
1682         .bulk = ehci_submit_bulk_msg,
1683         .interrupt = ehci_submit_int_msg,
1684         .create_int_queue = ehci_create_int_queue,
1685         .poll_int_queue = ehci_poll_int_queue,
1686         .destroy_int_queue = ehci_destroy_int_queue,
1687 };
1688
1689 #endif