2 * SAMSUNG S5P USB HOST EHCI Controller
4 * Copyright (C) 2012 Samsung Electronics Co.Ltd
5 * Vivek Gautam <gautam.vivek@samsung.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
25 #include <asm/arch/cpu.h>
26 #include <asm/arch/ehci-s5p.h>
28 #include "ehci-core.h"
30 /* Setup the EHCI host controller. */
31 static void setup_usb_phy(struct s5p_usb_phy *usb)
33 clrbits_le32(&usb->usbphyctrl0,
34 HOST_CTRL0_FSEL_MASK |
35 HOST_CTRL0_COMMONON_N |
36 /* HOST Phy setting */
38 HOST_CTRL0_PHYSWRSTALL |
40 HOST_CTRL0_FORCESUSPEND |
41 HOST_CTRL0_FORCESLEEP);
43 setbits_le32(&usb->usbphyctrl0,
44 /* Setting up the ref freq */
46 /* HOST Phy setting */
47 HOST_CTRL0_LINKSWRST |
48 HOST_CTRL0_UTMISWRST);
50 clrbits_le32(&usb->usbphyctrl0,
51 HOST_CTRL0_LINKSWRST |
52 HOST_CTRL0_UTMISWRST);
55 /* EHCI Ctrl setting */
56 setbits_le32(&usb->ehcictrl,
57 EHCICTRL_ENAINCRXALIGN |
63 /* Reset the EHCI host controller. */
64 static void reset_usb_phy(struct s5p_usb_phy *usb)
67 setbits_le32(&usb->usbphyctrl0,
69 HOST_CTRL0_PHYSWRSTALL |
71 HOST_CTRL0_FORCESUSPEND |
72 HOST_CTRL0_FORCESLEEP);
77 * Create the appropriate control structures to manage
78 * a new EHCI host controller.
80 int ehci_hcd_init(void)
82 struct s5p_usb_phy *usb;
84 usb = (struct s5p_usb_phy *)samsung_get_base_usb_phy();
87 hccr = (struct ehci_hccr *)(EXYNOS5_USB_HOST_EHCI_BASE);
88 hcor = (struct ehci_hcor *)((uint32_t) hccr
89 + HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
91 debug("Exynos5-ehci: init hccr %x and hcor %x hc_length %d\n",
92 (uint32_t)hccr, (uint32_t)hcor,
93 (uint32_t)HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
99 * Destroy the appropriate control structures corresponding
100 * the EHCI host controller.
104 struct s5p_usb_phy *usb;
106 usb = (struct s5p_usb_phy *)samsung_get_base_usb_phy();