1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2015 Hans de Goede <hdegoede@redhat.com>
8 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
12 #include <asm/arch/clock.h>
17 #include <generic-phy.h>
19 #ifdef CONFIG_SUNXI_GEN_SUN4I
20 #define AHB_CLK_DIST 2
22 #define AHB_CLK_DIST 1
25 struct ohci_sunxi_cfg {
27 u32 extra_ahb_gate_mask;
30 struct ohci_sunxi_priv {
31 struct sunxi_ccm_reg *ccm;
33 int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */
34 int usb_gate_mask; /* Mask of usb_clk_cfg clk gate bits for this hcd */
36 const struct ohci_sunxi_cfg *cfg;
39 static int ohci_usb_probe(struct udevice *dev)
41 struct usb_bus_priv *bus_priv = dev_get_uclass_priv(dev);
42 struct ohci_sunxi_priv *priv = dev_get_priv(dev);
43 struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
44 int extra_ahb_gate_mask = 0;
47 priv->cfg = (const struct ohci_sunxi_cfg *)dev_get_driver_data(dev);
48 priv->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
49 if (IS_ERR(priv->ccm))
50 return PTR_ERR(priv->ccm);
52 phys = dev_count_phandle_with_args(dev, "phys", "#phy-cells");
58 ret = generic_phy_get_by_name(dev, "usb", &priv->phy);
60 pr_err("failed to get %s usb PHY\n", dev->name);
64 ret = generic_phy_init(&priv->phy);
66 pr_err("failed to init %s USB PHY\n", dev->name);
70 ret = generic_phy_power_on(&priv->phy);
72 pr_err("failed to power on %s USB PHY\n", dev->name);
77 bus_priv->companion = true;
80 * This should go away once we've moved to the driver model for
83 priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0;
84 extra_ahb_gate_mask = priv->cfg->extra_ahb_gate_mask;
85 priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
86 priv->ahb_gate_mask <<= phys * AHB_CLK_DIST;
87 extra_ahb_gate_mask <<= phys * AHB_CLK_DIST;
88 priv->usb_gate_mask <<= phys;
90 setbits_le32(&priv->ccm->ahb_gate0,
91 priv->ahb_gate_mask | extra_ahb_gate_mask);
92 setbits_le32(&priv->ccm->usb_clk_cfg, priv->usb_gate_mask);
93 if (priv->cfg->has_reset)
94 setbits_le32(&priv->ccm->ahb_reset0_cfg,
95 priv->ahb_gate_mask | extra_ahb_gate_mask);
97 return ohci_register(dev, regs);
100 static int ohci_usb_remove(struct udevice *dev)
102 struct ohci_sunxi_priv *priv = dev_get_priv(dev);
105 if (generic_phy_valid(&priv->phy)) {
106 ret = generic_phy_exit(&priv->phy);
108 pr_err("failed to exit %s USB PHY\n", dev->name);
113 ret = ohci_deregister(dev);
117 if (priv->cfg->has_reset)
118 clrbits_le32(&priv->ccm->ahb_reset0_cfg, priv->ahb_gate_mask);
119 clrbits_le32(&priv->ccm->usb_clk_cfg, priv->usb_gate_mask);
120 clrbits_le32(&priv->ccm->ahb_gate0, priv->ahb_gate_mask);
125 static const struct ohci_sunxi_cfg sun4i_a10_cfg = {
129 static const struct ohci_sunxi_cfg sun6i_a31_cfg = {
133 static const struct ohci_sunxi_cfg sun8i_h3_cfg = {
135 .extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0,
138 static const struct udevice_id ohci_usb_ids[] = {
140 .compatible = "allwinner,sun4i-a10-ohci",
141 .data = (ulong)&sun4i_a10_cfg,
144 .compatible = "allwinner,sun5i-a13-ohci",
145 .data = (ulong)&sun4i_a10_cfg,
148 .compatible = "allwinner,sun6i-a31-ohci",
149 .data = (ulong)&sun6i_a31_cfg,
152 .compatible = "allwinner,sun7i-a20-ohci",
153 .data = (ulong)&sun4i_a10_cfg,
156 .compatible = "allwinner,sun8i-a23-ohci",
157 .data = (ulong)&sun6i_a31_cfg,
160 .compatible = "allwinner,sun8i-a83t-ohci",
161 .data = (ulong)&sun6i_a31_cfg,
164 .compatible = "allwinner,sun8i-h3-ohci",
165 .data = (ulong)&sun8i_h3_cfg,
168 .compatible = "allwinner,sun9i-a80-ohci",
169 .data = (ulong)&sun6i_a31_cfg,
172 .compatible = "allwinner,sun50i-a64-ohci",
173 .data = (ulong)&sun6i_a31_cfg,
178 U_BOOT_DRIVER(usb_ohci) = {
179 .name = "ohci_sunxi",
181 .of_match = ohci_usb_ids,
182 .probe = ohci_usb_probe,
183 .remove = ohci_usb_remove,
184 .ops = &ohci_usb_ops,
185 .platdata_auto_alloc_size = sizeof(struct usb_platdata),
186 .priv_auto_alloc_size = sizeof(struct ohci_sunxi_priv),
187 .flags = DM_FLAG_ALLOC_PRIV_DMA,