2 * Mentor USB OTG Core host controller driver.
4 * Copyright (c) 2008 Texas Instruments
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * Author: Thomas Abraham t-abraham@ti.com, Texas Instruments
27 /* MSC control transfers */
28 #define USB_MSC_BBB_RESET 0xFF
29 #define USB_MSC_BBB_GET_MAX_LUN 0xFE
31 /* Endpoint configuration information */
32 static const struct musb_epinfo epinfo[3] = {
33 {MUSB_BULK_EP, 1, 512}, /* EP1 - Bluk Out - 512 Bytes */
34 {MUSB_BULK_EP, 0, 512}, /* EP1 - Bluk In - 512 Bytes */
35 {MUSB_INTR_EP, 0, 64} /* EP2 - Interrupt IN - 64 Bytes */
38 /* --- Virtual Root Hub ---------------------------------------------------- */
39 #ifdef MUSB_NO_MULTIPOINT
41 static u32 port_status;
43 /* Device descriptor */
44 static const u8 root_hub_dev_des[] = {
45 0x12, /* __u8 bLength; */
46 0x01, /* __u8 bDescriptorType; Device */
47 0x00, /* __u16 bcdUSB; v1.1 */
49 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
50 0x00, /* __u8 bDeviceSubClass; */
51 0x00, /* __u8 bDeviceProtocol; */
52 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
53 0x00, /* __u16 idVendor; */
55 0x00, /* __u16 idProduct; */
57 0x00, /* __u16 bcdDevice; */
59 0x00, /* __u8 iManufacturer; */
60 0x01, /* __u8 iProduct; */
61 0x00, /* __u8 iSerialNumber; */
62 0x01 /* __u8 bNumConfigurations; */
65 /* Configuration descriptor */
66 static const u8 root_hub_config_des[] = {
67 0x09, /* __u8 bLength; */
68 0x02, /* __u8 bDescriptorType; Configuration */
69 0x19, /* __u16 wTotalLength; */
71 0x01, /* __u8 bNumInterfaces; */
72 0x01, /* __u8 bConfigurationValue; */
73 0x00, /* __u8 iConfiguration; */
74 0x40, /* __u8 bmAttributes;
75 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
76 0x00, /* __u8 MaxPower; */
79 0x09, /* __u8 if_bLength; */
80 0x04, /* __u8 if_bDescriptorType; Interface */
81 0x00, /* __u8 if_bInterfaceNumber; */
82 0x00, /* __u8 if_bAlternateSetting; */
83 0x01, /* __u8 if_bNumEndpoints; */
84 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
85 0x00, /* __u8 if_bInterfaceSubClass; */
86 0x00, /* __u8 if_bInterfaceProtocol; */
87 0x00, /* __u8 if_iInterface; */
90 0x07, /* __u8 ep_bLength; */
91 0x05, /* __u8 ep_bDescriptorType; Endpoint */
92 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
93 0x03, /* __u8 ep_bmAttributes; Interrupt */
94 0x00, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
96 0xff /* __u8 ep_bInterval; 255 ms */
99 static const unsigned char root_hub_str_index0[] = {
100 0x04, /* __u8 bLength; */
101 0x03, /* __u8 bDescriptorType; String-descriptor */
102 0x09, /* __u8 lang ID */
103 0x04, /* __u8 lang ID */
106 static const unsigned char root_hub_str_index1[] = {
107 0x1c, /* __u8 bLength; */
108 0x03, /* __u8 bDescriptorType; String-descriptor */
109 'M', /* __u8 Unicode */
110 0, /* __u8 Unicode */
111 'U', /* __u8 Unicode */
112 0, /* __u8 Unicode */
113 'S', /* __u8 Unicode */
114 0, /* __u8 Unicode */
115 'B', /* __u8 Unicode */
116 0, /* __u8 Unicode */
117 ' ', /* __u8 Unicode */
118 0, /* __u8 Unicode */
119 'R', /* __u8 Unicode */
120 0, /* __u8 Unicode */
121 'o', /* __u8 Unicode */
122 0, /* __u8 Unicode */
123 'o', /* __u8 Unicode */
124 0, /* __u8 Unicode */
125 't', /* __u8 Unicode */
126 0, /* __u8 Unicode */
127 ' ', /* __u8 Unicode */
128 0, /* __u8 Unicode */
129 'H', /* __u8 Unicode */
130 0, /* __u8 Unicode */
131 'u', /* __u8 Unicode */
132 0, /* __u8 Unicode */
133 'b', /* __u8 Unicode */
134 0, /* __u8 Unicode */
139 * This function writes the data toggle value.
141 static void write_toggle(struct usb_device *dev, u8 ep, u8 dir_out)
143 u16 toggle = usb_gettoggle(dev, ep, dir_out);
147 csr = readw(&musbr->txcsr);
149 if (csr & MUSB_TXCSR_MODE)
150 csr = MUSB_TXCSR_CLRDATATOG;
153 writew(csr, &musbr->txcsr);
155 csr |= MUSB_TXCSR_H_WR_DATATOGGLE;
156 writew(csr, &musbr->txcsr);
157 csr |= (toggle << MUSB_TXCSR_H_DATATOGGLE_SHIFT);
158 writew(csr, &musbr->txcsr);
162 csr = readw(&musbr->txcsr);
163 if (csr & MUSB_TXCSR_MODE)
164 csr = MUSB_RXCSR_CLRDATATOG;
167 writew(csr, &musbr->rxcsr);
169 csr = readw(&musbr->rxcsr);
170 csr |= MUSB_RXCSR_H_WR_DATATOGGLE;
171 writew(csr, &musbr->rxcsr);
172 csr |= (toggle << MUSB_S_RXCSR_H_DATATOGGLE);
173 writew(csr, &musbr->rxcsr);
179 * This function checks if RxStall has occured on the endpoint. If a RxStall
180 * has occured, the RxStall is cleared and 1 is returned. If RxStall has
181 * not occured, 0 is returned.
183 static u8 check_stall(u8 ep, u8 dir_out)
189 csr = readw(&musbr->txcsr);
190 if (csr & MUSB_CSR0_H_RXSTALL) {
191 csr &= ~MUSB_CSR0_H_RXSTALL;
192 writew(csr, &musbr->txcsr);
195 } else { /* For non-ep0 */
196 if (dir_out) { /* is it tx ep */
197 csr = readw(&musbr->txcsr);
198 if (csr & MUSB_TXCSR_H_RXSTALL) {
199 csr &= ~MUSB_TXCSR_H_RXSTALL;
200 writew(csr, &musbr->txcsr);
203 } else { /* is it rx ep */
204 csr = readw(&musbr->rxcsr);
205 if (csr & MUSB_RXCSR_H_RXSTALL) {
206 csr &= ~MUSB_RXCSR_H_RXSTALL;
207 writew(csr, &musbr->rxcsr);
216 * waits until ep0 is ready. Returns 0 if ep is ready, -1 for timeout
217 * error and -2 for stall.
219 static int wait_until_ep0_ready(struct usb_device *dev, u32 bit_mask)
223 int timeout = CONFIG_MUSB_TIMEOUT;
226 csr = readw(&musbr->txcsr);
227 if (csr & MUSB_CSR0_H_ERROR) {
228 csr &= ~MUSB_CSR0_H_ERROR;
229 writew(csr, &musbr->txcsr);
230 dev->status = USB_ST_CRC_ERR;
236 case MUSB_CSR0_TXPKTRDY:
237 if (!(csr & MUSB_CSR0_TXPKTRDY)) {
238 if (check_stall(MUSB_CONTROL_EP, 0)) {
239 dev->status = USB_ST_STALLED;
246 case MUSB_CSR0_RXPKTRDY:
247 if (check_stall(MUSB_CONTROL_EP, 0)) {
248 dev->status = USB_ST_STALLED;
251 if (csr & MUSB_CSR0_RXPKTRDY)
255 case MUSB_CSR0_H_REQPKT:
256 if (!(csr & MUSB_CSR0_H_REQPKT)) {
257 if (check_stall(MUSB_CONTROL_EP, 0)) {
258 dev->status = USB_ST_STALLED;
266 /* Check the timeout */
270 dev->status = USB_ST_CRC_ERR;
280 * waits until tx ep is ready. Returns 1 when ep is ready and 0 on error.
282 static u8 wait_until_txep_ready(struct usb_device *dev, u8 ep)
285 int timeout = CONFIG_MUSB_TIMEOUT;
288 if (check_stall(ep, 1)) {
289 dev->status = USB_ST_STALLED;
293 csr = readw(&musbr->txcsr);
294 if (csr & MUSB_TXCSR_H_ERROR) {
295 dev->status = USB_ST_CRC_ERR;
299 /* Check the timeout */
303 dev->status = USB_ST_CRC_ERR;
307 } while (csr & MUSB_TXCSR_TXPKTRDY);
312 * waits until rx ep is ready. Returns 1 when ep is ready and 0 on error.
314 static u8 wait_until_rxep_ready(struct usb_device *dev, u8 ep)
317 int timeout = CONFIG_MUSB_TIMEOUT;
320 if (check_stall(ep, 0)) {
321 dev->status = USB_ST_STALLED;
325 csr = readw(&musbr->rxcsr);
326 if (csr & MUSB_RXCSR_H_ERROR) {
327 dev->status = USB_ST_CRC_ERR;
331 /* Check the timeout */
335 dev->status = USB_ST_CRC_ERR;
339 } while (!(csr & MUSB_RXCSR_RXPKTRDY));
344 * This function performs the setup phase of the control transfer
346 static int ctrlreq_setup_phase(struct usb_device *dev, struct devrequest *setup)
351 /* write the control request to ep0 fifo */
352 write_fifo(MUSB_CONTROL_EP, sizeof(struct devrequest), (void *)setup);
354 /* enable transfer of setup packet */
355 csr = readw(&musbr->txcsr);
356 csr |= (MUSB_CSR0_TXPKTRDY|MUSB_CSR0_H_SETUPPKT);
357 writew(csr, &musbr->txcsr);
359 /* wait until the setup packet is transmitted */
360 result = wait_until_ep0_ready(dev, MUSB_CSR0_TXPKTRDY);
366 * This function handles the control transfer in data phase
368 static int ctrlreq_in_data_phase(struct usb_device *dev, u32 len, void *buffer)
373 u8 maxpktsize = (1 << dev->maxpacketsize) * 8;
374 u8 *rxbuff = (u8 *)buffer;
378 while (rxlen < len) {
379 /* Determine the next read length */
380 nextlen = ((len-rxlen) > maxpktsize) ? maxpktsize : (len-rxlen);
382 /* Set the ReqPkt bit */
383 csr = readw(&musbr->txcsr);
384 writew(csr | MUSB_CSR0_H_REQPKT, &musbr->txcsr);
385 result = wait_until_ep0_ready(dev, MUSB_CSR0_RXPKTRDY);
389 /* Actual number of bytes received by usb */
390 rxedlength = readb(&musbr->rxcount);
392 /* Read the data from the RxFIFO */
393 read_fifo(MUSB_CONTROL_EP, rxedlength, &rxbuff[rxlen]);
395 /* Clear the RxPktRdy Bit */
396 csr = readw(&musbr->txcsr);
397 csr &= ~MUSB_CSR0_RXPKTRDY;
398 writew(csr, &musbr->txcsr);
401 if (rxedlength != nextlen) {
402 dev->act_len += rxedlength;
406 dev->act_len = rxlen;
412 * This function handles the control transfer out data phase
414 static int ctrlreq_out_data_phase(struct usb_device *dev, u32 len, void *buffer)
419 u8 maxpktsize = (1 << dev->maxpacketsize) * 8;
420 u8 *txbuff = (u8 *)buffer;
423 while (txlen < len) {
424 /* Determine the next write length */
425 nextlen = ((len-txlen) > maxpktsize) ? maxpktsize : (len-txlen);
427 /* Load the data to send in FIFO */
428 write_fifo(MUSB_CONTROL_EP, txlen, &txbuff[txlen]);
430 /* Set TXPKTRDY bit */
431 csr = readw(&musbr->txcsr);
432 writew(csr | MUSB_CSR0_H_DIS_PING | MUSB_CSR0_TXPKTRDY,
434 result = wait_until_ep0_ready(dev, MUSB_CSR0_TXPKTRDY);
439 dev->act_len = txlen;
445 * This function handles the control transfer out status phase
447 static int ctrlreq_out_status_phase(struct usb_device *dev)
452 /* Set the StatusPkt bit */
453 csr = readw(&musbr->txcsr);
454 csr |= (MUSB_CSR0_H_DIS_PING | MUSB_CSR0_TXPKTRDY |
455 MUSB_CSR0_H_STATUSPKT);
456 writew(csr, &musbr->txcsr);
458 /* Wait until TXPKTRDY bit is cleared */
459 result = wait_until_ep0_ready(dev, MUSB_CSR0_TXPKTRDY);
464 * This function handles the control transfer in status phase
466 static int ctrlreq_in_status_phase(struct usb_device *dev)
471 /* Set the StatusPkt bit and ReqPkt bit */
472 csr = MUSB_CSR0_H_DIS_PING | MUSB_CSR0_H_REQPKT | MUSB_CSR0_H_STATUSPKT;
473 writew(csr, &musbr->txcsr);
474 result = wait_until_ep0_ready(dev, MUSB_CSR0_H_REQPKT);
476 /* clear StatusPkt bit and RxPktRdy bit */
477 csr = readw(&musbr->txcsr);
478 csr &= ~(MUSB_CSR0_RXPKTRDY | MUSB_CSR0_H_STATUSPKT);
479 writew(csr, &musbr->txcsr);
484 * determines the speed of the device (High/Full/Slow)
486 static u8 get_dev_speed(struct usb_device *dev)
488 return (dev->speed & USB_SPEED_HIGH) ? MUSB_TYPE_SPEED_HIGH :
489 ((dev->speed & USB_SPEED_LOW) ? MUSB_TYPE_SPEED_LOW :
490 MUSB_TYPE_SPEED_FULL);
494 * configure the hub address and the port address.
496 static void config_hub_port(struct usb_device *dev, u8 ep)
501 /* Find out the nearest parent which is high speed */
502 while (dev->parent->parent != NULL)
503 if (get_dev_speed(dev->parent) != MUSB_TYPE_SPEED_HIGH)
508 /* determine the port address at that hub */
509 hub = dev->parent->devnum;
510 for (chid = 0; chid < USB_MAXCHILDREN; chid++)
511 if (dev->parent->children[chid] == dev)
514 #ifndef MUSB_NO_MULTIPOINT
515 /* configure the hub address and the port address */
516 writeb(hub, &musbr->tar[ep].txhubaddr);
517 writeb((chid + 1), &musbr->tar[ep].txhubport);
518 writeb(hub, &musbr->tar[ep].rxhubaddr);
519 writeb((chid + 1), &musbr->tar[ep].rxhubport);
523 #ifdef MUSB_NO_MULTIPOINT
525 static void musb_port_reset(int do_reset)
527 u8 power = readb(&musbr->power);
531 writeb(power | MUSB_POWER_RESET, &musbr->power);
532 port_status |= USB_PORT_STAT_RESET;
533 port_status &= ~USB_PORT_STAT_ENABLE;
536 writeb(power & ~MUSB_POWER_RESET, &musbr->power);
538 power = readb(&musbr->power);
539 if (power & MUSB_POWER_HSMODE)
540 port_status |= USB_PORT_STAT_HIGH_SPEED;
542 port_status &= ~(USB_PORT_STAT_RESET | (USB_PORT_STAT_C_CONNECTION << 16));
543 port_status |= USB_PORT_STAT_ENABLE
544 | (USB_PORT_STAT_C_RESET << 16)
545 | (USB_PORT_STAT_C_ENABLE << 16);
552 static int musb_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
553 void *buffer, int transfer_len,
554 struct devrequest *cmd)
556 int leni = transfer_len;
560 const u8 *data_buf = (u8 *) datab;
567 if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
568 debug("Root-Hub submit IRQ: NOT implemented\n");
572 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
573 wValue = swap_16(cmd->value);
574 wIndex = swap_16(cmd->index);
575 wLength = swap_16(cmd->length);
577 debug("--- HUB ----------------------------------------\n");
578 debug("submit rh urb, req=%x val=%#x index=%#x len=%d\n",
579 bmRType_bReq, wValue, wIndex, wLength);
580 debug("------------------------------------------------\n");
582 switch (bmRType_bReq) {
584 debug("RH_GET_STATUS\n");
586 *(__u16 *) data_buf = swap_16(1);
590 case RH_GET_STATUS | RH_INTERFACE:
591 debug("RH_GET_STATUS | RH_INTERFACE\n");
593 *(__u16 *) data_buf = swap_16(0);
597 case RH_GET_STATUS | RH_ENDPOINT:
598 debug("RH_GET_STATUS | RH_ENDPOINT\n");
600 *(__u16 *) data_buf = swap_16(0);
604 case RH_GET_STATUS | RH_CLASS:
605 debug("RH_GET_STATUS | RH_CLASS\n");
607 *(__u32 *) data_buf = swap_32(0);
611 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
612 debug("RH_GET_STATUS | RH_OTHER | RH_CLASS\n");
614 int_usb = readw(&musbr->intrusb);
615 if (int_usb & MUSB_INTR_CONNECT) {
616 port_status |= USB_PORT_STAT_CONNECTION
617 | (USB_PORT_STAT_C_CONNECTION << 16);
618 port_status |= USB_PORT_STAT_HIGH_SPEED
619 | USB_PORT_STAT_ENABLE;
622 if (port_status & USB_PORT_STAT_RESET)
625 *(__u32 *) data_buf = swap_32(port_status);
629 case RH_CLEAR_FEATURE | RH_ENDPOINT:
630 debug("RH_CLEAR_FEATURE | RH_ENDPOINT\n");
633 case RH_ENDPOINT_STALL:
634 debug("C_HUB_ENDPOINT_STALL\n");
638 port_status &= ~(1 << wValue);
641 case RH_CLEAR_FEATURE | RH_CLASS:
642 debug("RH_CLEAR_FEATURE | RH_CLASS\n");
645 case RH_C_HUB_LOCAL_POWER:
646 debug("C_HUB_LOCAL_POWER\n");
650 case RH_C_HUB_OVER_CURRENT:
651 debug("C_HUB_OVER_CURRENT\n");
655 port_status &= ~(1 << wValue);
658 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
659 debug("RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS\n");
666 case RH_PORT_SUSPEND:
674 case RH_C_PORT_CONNECTION:
678 case RH_C_PORT_ENABLE:
682 case RH_C_PORT_SUSPEND:
686 case RH_C_PORT_OVER_CURRENT:
690 case RH_C_PORT_RESET:
695 debug("invalid wValue\n");
696 stat = USB_ST_STALLED;
699 port_status &= ~(1 << wValue);
702 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
703 debug("RH_SET_FEATURE | RH_OTHER | RH_CLASS\n");
706 case RH_PORT_SUSPEND:
724 debug("invalid wValue\n");
725 stat = USB_ST_STALLED;
728 port_status |= 1 << wValue;
732 debug("RH_SET_ADDRESS\n");
738 case RH_GET_DESCRIPTOR:
739 debug("RH_GET_DESCRIPTOR: %x, %d\n", wValue, wLength);
742 case (USB_DT_DEVICE << 8): /* device descriptor */
743 len = min_t(unsigned int,
744 leni, min_t(unsigned int,
745 sizeof(root_hub_dev_des),
747 data_buf = root_hub_dev_des;
750 case (USB_DT_CONFIG << 8): /* configuration descriptor */
751 len = min_t(unsigned int,
752 leni, min_t(unsigned int,
753 sizeof(root_hub_config_des),
755 data_buf = root_hub_config_des;
758 case ((USB_DT_STRING << 8) | 0x00): /* string 0 descriptors */
759 len = min_t(unsigned int,
760 leni, min_t(unsigned int,
761 sizeof(root_hub_str_index0),
763 data_buf = root_hub_str_index0;
766 case ((USB_DT_STRING << 8) | 0x01): /* string 1 descriptors */
767 len = min_t(unsigned int,
768 leni, min_t(unsigned int,
769 sizeof(root_hub_str_index1),
771 data_buf = root_hub_str_index1;
775 debug("invalid wValue\n");
776 stat = USB_ST_STALLED;
781 case RH_GET_DESCRIPTOR | RH_CLASS: {
782 u8 *_data_buf = (u8 *) datab;
783 debug("RH_GET_DESCRIPTOR | RH_CLASS\n");
785 _data_buf[0] = 0x09; /* min length; */
787 _data_buf[2] = 0x1; /* 1 port */
788 _data_buf[3] = 0x01; /* per-port power switching */
789 _data_buf[3] |= 0x10; /* no overcurrent reporting */
791 /* Corresponds to data_buf[4-7] */
798 len = min_t(unsigned int, leni,
799 min_t(unsigned int, data_buf[0], wLength));
803 case RH_GET_CONFIGURATION:
804 debug("RH_GET_CONFIGURATION\n");
806 *(__u8 *) data_buf = 0x01;
810 case RH_SET_CONFIGURATION:
811 debug("RH_SET_CONFIGURATION\n");
817 debug("*** *** *** unsupported root hub command *** *** ***\n");
818 stat = USB_ST_STALLED;
821 len = min_t(int, len, leni);
822 if (buffer != data_buf)
823 memcpy(buffer, data_buf, len);
827 debug("dev act_len %d, status %d\n", dev->act_len, dev->status);
832 static void musb_rh_init(void)
840 static void musb_rh_init(void) {}
845 * do a control transfer
847 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
848 int len, struct devrequest *setup)
850 int devnum = usb_pipedevice(pipe);
854 #ifdef MUSB_NO_MULTIPOINT
855 /* Control message is for the HUB? */
856 if (devnum == rh_devnum)
857 return musb_submit_rh_msg(dev, pipe, buffer, len, setup);
860 /* select control endpoint */
861 writeb(MUSB_CONTROL_EP, &musbr->index);
862 csr = readw(&musbr->txcsr);
864 #ifndef MUSB_NO_MULTIPOINT
865 /* target addr and (for multipoint) hub addr/port */
866 writeb(devnum, &musbr->tar[MUSB_CONTROL_EP].txfuncaddr);
867 writeb(devnum, &musbr->tar[MUSB_CONTROL_EP].rxfuncaddr);
870 /* configure the hub address and the port number as required */
871 devspeed = get_dev_speed(dev);
872 if ((musb_ishighspeed()) && (dev->parent != NULL) &&
873 (devspeed != MUSB_TYPE_SPEED_HIGH)) {
874 config_hub_port(dev, MUSB_CONTROL_EP);
875 writeb(devspeed << 6, &musbr->txtype);
877 writeb(musb_cfg.musb_speed << 6, &musbr->txtype);
878 #ifndef MUSB_NO_MULTIPOINT
879 writeb(0, &musbr->tar[MUSB_CONTROL_EP].txhubaddr);
880 writeb(0, &musbr->tar[MUSB_CONTROL_EP].txhubport);
881 writeb(0, &musbr->tar[MUSB_CONTROL_EP].rxhubaddr);
882 writeb(0, &musbr->tar[MUSB_CONTROL_EP].rxhubport);
886 /* Control transfer setup phase */
887 if (ctrlreq_setup_phase(dev, setup) < 0)
890 switch (setup->request) {
891 case USB_REQ_GET_DESCRIPTOR:
892 case USB_REQ_GET_CONFIGURATION:
893 case USB_REQ_GET_INTERFACE:
894 case USB_REQ_GET_STATUS:
895 case USB_MSC_BBB_GET_MAX_LUN:
896 /* control transfer in-data-phase */
897 if (ctrlreq_in_data_phase(dev, len, buffer) < 0)
899 /* control transfer out-status-phase */
900 if (ctrlreq_out_status_phase(dev) < 0)
904 case USB_REQ_SET_ADDRESS:
905 case USB_REQ_SET_CONFIGURATION:
906 case USB_REQ_SET_FEATURE:
907 case USB_REQ_SET_INTERFACE:
908 case USB_REQ_CLEAR_FEATURE:
909 case USB_MSC_BBB_RESET:
910 /* control transfer in status phase */
911 if (ctrlreq_in_status_phase(dev) < 0)
915 case USB_REQ_SET_DESCRIPTOR:
916 /* control transfer out data phase */
917 if (ctrlreq_out_data_phase(dev, len, buffer) < 0)
919 /* control transfer in status phase */
920 if (ctrlreq_in_status_phase(dev) < 0)
925 /* unhandled control transfer */
932 #ifdef MUSB_NO_MULTIPOINT
933 /* Set device address to USB_FADDR register */
934 if (setup->request == USB_REQ_SET_ADDRESS)
935 writeb(dev->devnum, &musbr->faddr);
944 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
945 void *buffer, int len)
947 int dir_out = usb_pipeout(pipe);
948 int ep = usb_pipeendpoint(pipe);
949 #ifndef MUSB_NO_MULTIPOINT
950 int devnum = usb_pipedevice(pipe);
958 /* select bulk endpoint */
959 writeb(MUSB_BULK_EP, &musbr->index);
961 #ifndef MUSB_NO_MULTIPOINT
962 /* write the address of the device */
964 writeb(devnum, &musbr->tar[MUSB_BULK_EP].txfuncaddr);
966 writeb(devnum, &musbr->tar[MUSB_BULK_EP].rxfuncaddr);
969 /* configure the hub address and the port number as required */
970 devspeed = get_dev_speed(dev);
971 if ((musb_ishighspeed()) && (dev->parent != NULL) &&
972 (devspeed != MUSB_TYPE_SPEED_HIGH)) {
974 * MUSB is in high speed and the destination device is full
975 * speed device. So configure the hub address and port
978 config_hub_port(dev, MUSB_BULK_EP);
980 #ifndef MUSB_NO_MULTIPOINT
982 writeb(0, &musbr->tar[MUSB_BULK_EP].txhubaddr);
983 writeb(0, &musbr->tar[MUSB_BULK_EP].txhubport);
985 writeb(0, &musbr->tar[MUSB_BULK_EP].rxhubaddr);
986 writeb(0, &musbr->tar[MUSB_BULK_EP].rxhubport);
989 devspeed = musb_cfg.musb_speed;
992 /* Write the saved toggle bit value */
993 write_toggle(dev, ep, dir_out);
995 if (dir_out) { /* bulk-out transfer */
996 /* Program the TxType register */
997 type = (devspeed << MUSB_TYPE_SPEED_SHIFT) |
998 (MUSB_TYPE_PROTO_BULK << MUSB_TYPE_PROTO_SHIFT) |
999 (ep & MUSB_TYPE_REMOTE_END);
1000 writeb(type, &musbr->txtype);
1002 /* Write maximum packet size to the TxMaxp register */
1003 writew(dev->epmaxpacketout[ep], &musbr->txmaxp);
1004 while (txlen < len) {
1005 nextlen = ((len-txlen) < dev->epmaxpacketout[ep]) ?
1006 (len-txlen) : dev->epmaxpacketout[ep];
1008 #ifdef CONFIG_USB_BLACKFIN
1009 /* Set the transfer data size */
1010 writew(nextlen, &musbr->txcount);
1013 /* Write the data to the FIFO */
1014 write_fifo(MUSB_BULK_EP, nextlen,
1015 (void *)(((u8 *)buffer) + txlen));
1017 /* Set the TxPktRdy bit */
1018 csr = readw(&musbr->txcsr);
1019 writew(csr | MUSB_TXCSR_TXPKTRDY, &musbr->txcsr);
1021 /* Wait until the TxPktRdy bit is cleared */
1022 if (!wait_until_txep_ready(dev, MUSB_BULK_EP)) {
1023 readw(&musbr->txcsr);
1024 usb_settoggle(dev, ep, dir_out,
1025 (csr >> MUSB_TXCSR_H_DATATOGGLE_SHIFT) & 1);
1026 dev->act_len = txlen;
1032 /* Keep a copy of the data toggle bit */
1033 csr = readw(&musbr->txcsr);
1034 usb_settoggle(dev, ep, dir_out,
1035 (csr >> MUSB_TXCSR_H_DATATOGGLE_SHIFT) & 1);
1036 } else { /* bulk-in transfer */
1037 /* Write the saved toggle bit value */
1038 write_toggle(dev, ep, dir_out);
1040 /* Program the RxType register */
1041 type = (devspeed << MUSB_TYPE_SPEED_SHIFT) |
1042 (MUSB_TYPE_PROTO_BULK << MUSB_TYPE_PROTO_SHIFT) |
1043 (ep & MUSB_TYPE_REMOTE_END);
1044 writeb(type, &musbr->rxtype);
1046 /* Write the maximum packet size to the RxMaxp register */
1047 writew(dev->epmaxpacketin[ep], &musbr->rxmaxp);
1048 while (txlen < len) {
1049 nextlen = ((len-txlen) < dev->epmaxpacketin[ep]) ?
1050 (len-txlen) : dev->epmaxpacketin[ep];
1052 /* Set the ReqPkt bit */
1053 csr = readw(&musbr->rxcsr);
1054 writew(csr | MUSB_RXCSR_H_REQPKT, &musbr->rxcsr);
1056 /* Wait until the RxPktRdy bit is set */
1057 if (!wait_until_rxep_ready(dev, MUSB_BULK_EP)) {
1058 csr = readw(&musbr->rxcsr);
1059 usb_settoggle(dev, ep, dir_out,
1060 (csr >> MUSB_S_RXCSR_H_DATATOGGLE) & 1);
1061 csr &= ~MUSB_RXCSR_RXPKTRDY;
1062 writew(csr, &musbr->rxcsr);
1063 dev->act_len = txlen;
1067 /* Read the data from the FIFO */
1068 read_fifo(MUSB_BULK_EP, nextlen,
1069 (void *)(((u8 *)buffer) + txlen));
1071 /* Clear the RxPktRdy bit */
1072 csr = readw(&musbr->rxcsr);
1073 csr &= ~MUSB_RXCSR_RXPKTRDY;
1074 writew(csr, &musbr->rxcsr);
1078 /* Keep a copy of the data toggle bit */
1079 csr = readw(&musbr->rxcsr);
1080 usb_settoggle(dev, ep, dir_out,
1081 (csr >> MUSB_S_RXCSR_H_DATATOGGLE) & 1);
1084 /* bulk transfer is complete */
1091 * This function initializes the usb controller module.
1093 int usb_lowlevel_init(void)
1100 if (musb_platform_init() == -1)
1103 /* Configure all the endpoint FIFO's and start usb controller */
1104 musbr = musb_cfg.regs;
1105 musb_configure_ep(&epinfo[0],
1106 sizeof(epinfo) / sizeof(struct musb_epinfo));
1110 * Wait until musb is enabled in host mode with a timeout. There
1111 * should be a usb device connected.
1113 timeout = musb_cfg.timeout;
1115 if (readb(&musbr->devctl) & MUSB_DEVCTL_HM)
1118 /* if musb core is not in host mode, then return */
1122 /* start usb bus reset */
1123 power = readb(&musbr->power);
1124 writeb(power | MUSB_POWER_RESET, &musbr->power);
1126 /* After initiating a usb reset, wait for about 20ms to 30ms */
1129 /* stop usb bus reset */
1130 power = readb(&musbr->power);
1131 power &= ~MUSB_POWER_RESET;
1132 writeb(power, &musbr->power);
1134 /* Determine if the connected device is a high/full/low speed device */
1135 musb_cfg.musb_speed = (readb(&musbr->power) & MUSB_POWER_HSMODE) ?
1136 MUSB_TYPE_SPEED_HIGH :
1137 ((readb(&musbr->devctl) & MUSB_DEVCTL_FSDEV) ?
1138 MUSB_TYPE_SPEED_FULL : MUSB_TYPE_SPEED_LOW);
1143 * This function stops the operation of the davinci usb module.
1145 int usb_lowlevel_stop(void)
1147 /* Reset the USB module */
1148 musb_platform_deinit();
1149 writeb(0, &musbr->devctl);
1154 * This function supports usb interrupt transfers. Currently, usb interrupt
1155 * transfers are not supported.
1157 int submit_int_msg(struct usb_device *dev, unsigned long pipe,
1158 void *buffer, int len, int interval)
1160 int dir_out = usb_pipeout(pipe);
1161 int ep = usb_pipeendpoint(pipe);
1162 #ifndef MUSB_NO_MULTIPOINT
1163 int devnum = usb_pipedevice(pipe);
1171 /* select interrupt endpoint */
1172 writeb(MUSB_INTR_EP, &musbr->index);
1174 #ifndef MUSB_NO_MULTIPOINT
1175 /* write the address of the device */
1177 writeb(devnum, &musbr->tar[MUSB_INTR_EP].txfuncaddr);
1179 writeb(devnum, &musbr->tar[MUSB_INTR_EP].rxfuncaddr);
1182 /* configure the hub address and the port number as required */
1183 devspeed = get_dev_speed(dev);
1184 if ((musb_ishighspeed()) && (dev->parent != NULL) &&
1185 (devspeed != MUSB_TYPE_SPEED_HIGH)) {
1187 * MUSB is in high speed and the destination device is full
1188 * speed device. So configure the hub address and port
1189 * address registers.
1191 config_hub_port(dev, MUSB_INTR_EP);
1193 #ifndef MUSB_NO_MULTIPOINT
1195 writeb(0, &musbr->tar[MUSB_INTR_EP].txhubaddr);
1196 writeb(0, &musbr->tar[MUSB_INTR_EP].txhubport);
1198 writeb(0, &musbr->tar[MUSB_INTR_EP].rxhubaddr);
1199 writeb(0, &musbr->tar[MUSB_INTR_EP].rxhubport);
1202 devspeed = musb_cfg.musb_speed;
1205 /* Write the saved toggle bit value */
1206 write_toggle(dev, ep, dir_out);
1208 if (!dir_out) { /* intrrupt-in transfer */
1209 /* Write the saved toggle bit value */
1210 write_toggle(dev, ep, dir_out);
1211 writeb(interval, &musbr->rxinterval);
1213 /* Program the RxType register */
1214 type = (devspeed << MUSB_TYPE_SPEED_SHIFT) |
1215 (MUSB_TYPE_PROTO_INTR << MUSB_TYPE_PROTO_SHIFT) |
1216 (ep & MUSB_TYPE_REMOTE_END);
1217 writeb(type, &musbr->rxtype);
1219 /* Write the maximum packet size to the RxMaxp register */
1220 writew(dev->epmaxpacketin[ep], &musbr->rxmaxp);
1222 while (txlen < len) {
1223 nextlen = ((len-txlen) < dev->epmaxpacketin[ep]) ?
1224 (len-txlen) : dev->epmaxpacketin[ep];
1226 /* Set the ReqPkt bit */
1227 csr = readw(&musbr->rxcsr);
1228 writew(csr | MUSB_RXCSR_H_REQPKT, &musbr->rxcsr);
1230 /* Wait until the RxPktRdy bit is set */
1231 if (!wait_until_rxep_ready(dev, MUSB_INTR_EP)) {
1232 csr = readw(&musbr->rxcsr);
1233 usb_settoggle(dev, ep, dir_out,
1234 (csr >> MUSB_S_RXCSR_H_DATATOGGLE) & 1);
1235 csr &= ~MUSB_RXCSR_RXPKTRDY;
1236 writew(csr, &musbr->rxcsr);
1237 dev->act_len = txlen;
1241 /* Read the data from the FIFO */
1242 read_fifo(MUSB_INTR_EP, nextlen,
1243 (void *)(((u8 *)buffer) + txlen));
1245 /* Clear the RxPktRdy bit */
1246 csr = readw(&musbr->rxcsr);
1247 csr &= ~MUSB_RXCSR_RXPKTRDY;
1248 writew(csr, &musbr->rxcsr);
1252 /* Keep a copy of the data toggle bit */
1253 csr = readw(&musbr->rxcsr);
1254 usb_settoggle(dev, ep, dir_out,
1255 (csr >> MUSB_S_RXCSR_H_DATATOGGLE) & 1);
1258 /* interrupt transfer is complete */
1259 dev->irq_status = 0;
1260 dev->irq_act_len = len;
1261 dev->irq_handle(dev);
1268 #ifdef CONFIG_SYS_USB_EVENT_POLL
1270 * This function polls for USB keyboard data.
1272 void usb_event_poll()
1274 struct stdio_dev *dev;
1275 struct usb_device *usb_kbd_dev;
1276 struct usb_interface *iface;
1277 struct usb_endpoint_descriptor *ep;
1281 /* Get the pointer to USB Keyboard device pointer */
1282 dev = stdio_get_by_name("usbkbd");
1283 usb_kbd_dev = (struct usb_device *)dev->priv;
1284 iface = &usb_kbd_dev->config.if_desc[0];
1285 ep = &iface->ep_desc[0];
1286 pipe = usb_rcvintpipe(usb_kbd_dev, ep->bEndpointAddress);
1288 /* Submit a interrupt transfer request */
1289 maxp = usb_maxpacket(usb_kbd_dev, pipe);
1290 usb_submit_int_msg(usb_kbd_dev, pipe, &new[0],
1291 maxp > 8 ? 8 : maxp, ep->bInterval);
1293 #endif /* CONFIG_SYS_USB_EVENT_POLL */