2 * Texas Instruments DSPS platforms "glue layer"
4 * Copyright (C) 2012, by Texas Instruments
6 * Based on the am35x "glue layer" code.
8 * This file is part of the Inventra Controller Driver for Linux.
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
33 #include <linux/init.h>
35 #include <linux/err.h>
36 #include <linux/platform_device.h>
37 #include <linux/dma-mapping.h>
38 #include <linux/pm_runtime.h>
39 #include <linux/module.h>
42 #include <linux/of_device.h>
43 #include <linux/of_address.h>
48 #include <asm/omap_musb.h>
49 #include "linux-compat.h"
52 #include "musb_core.h"
55 * avoid using musb_readx()/musb_writex() as glue layer should not be
56 * dependent on musb core layer symbols.
58 static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
59 { return __raw_readb(addr + offset); }
61 static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
62 { return __raw_readl(addr + offset); }
64 static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
65 { __raw_writeb(data, addr + offset); }
67 static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
68 { __raw_writel(data, addr + offset); }
71 * DSPS musb wrapper register offset.
72 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
75 struct dsps_musb_wrapper {
89 /* bit positions for control */
92 /* bit positions for interrupt */
98 unsigned txep_shift:5;
102 unsigned rxep_shift:5;
106 /* bit positions for phy_utmi */
107 unsigned otg_disable:5;
109 /* bit positions for mode */
111 /* miscellaneous stuff */
112 u32 musb_core_offset;
116 static const struct dsps_musb_wrapper ti81xx_driver_data __devinitconst = {
122 .epintr_clear = 0x40,
123 .epintr_status = 0x30,
124 .coreintr_set = 0x3c,
125 .coreintr_clear = 0x44,
126 .coreintr_status = 0x34,
134 .usb_bitmap = (0x1ff << 0),
138 .txep_bitmap = (0xffff << 0),
141 .rxep_bitmap = (0xfffe << 16),
142 .musb_core_offset = 0x400,
147 * DSPS glue structure.
151 struct platform_device *musb; /* child musb pdev */
152 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
153 struct timer_list timer; /* otg_workaround timer */
157 * dsps_musb_enable - enable interrupts
159 static void dsps_musb_enable(struct musb *musb)
162 struct device *dev = musb->controller;
163 struct platform_device *pdev = to_platform_device(dev->parent);
164 struct dsps_glue *glue = platform_get_drvdata(pdev);
165 const struct dsps_musb_wrapper *wrp = glue->wrp;
167 const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data;
169 void __iomem *reg_base = musb->ctrl_base;
170 u32 epmask, coremask;
172 /* Workaround: setup IRQs through both register sets. */
173 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
174 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
175 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
177 dsps_writel(reg_base, wrp->epintr_set, epmask);
178 dsps_writel(reg_base, wrp->coreintr_set, coremask);
179 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
181 if (is_otg_enabled(musb))
182 dsps_writel(reg_base, wrp->coreintr_set,
183 (1 << wrp->drvvbus) << wrp->usb_shift);
188 * dsps_musb_disable - disable HDRC and flush interrupts
190 static void dsps_musb_disable(struct musb *musb)
193 struct device *dev = musb->controller;
194 struct platform_device *pdev = to_platform_device(dev->parent);
195 struct dsps_glue *glue = platform_get_drvdata(pdev);
196 const struct dsps_musb_wrapper *wrp = glue->wrp;
197 void __iomem *reg_base = musb->ctrl_base;
199 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
200 dsps_writel(reg_base, wrp->epintr_clear,
201 wrp->txep_bitmap | wrp->rxep_bitmap);
202 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
203 dsps_writel(reg_base, wrp->eoi, 0);
208 static void otg_timer(unsigned long _musb)
210 struct musb *musb = (void *)_musb;
211 void __iomem *mregs = musb->mregs;
212 struct device *dev = musb->controller;
213 struct platform_device *pdev = to_platform_device(dev->parent);
214 struct dsps_glue *glue = platform_get_drvdata(pdev);
215 const struct dsps_musb_wrapper *wrp = glue->wrp;
220 * We poll because DSPS IP's won't expose several OTG-critical
221 * status change events (from the transceiver) otherwise.
223 devctl = dsps_readb(mregs, MUSB_DEVCTL);
224 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
225 otg_state_string(musb->xceiv->state));
227 spin_lock_irqsave(&musb->lock, flags);
228 switch (musb->xceiv->state) {
229 case OTG_STATE_A_WAIT_BCON:
230 devctl &= ~MUSB_DEVCTL_SESSION;
231 dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl);
233 devctl = dsps_readb(musb->mregs, MUSB_DEVCTL);
234 if (devctl & MUSB_DEVCTL_BDEVICE) {
235 musb->xceiv->state = OTG_STATE_B_IDLE;
238 musb->xceiv->state = OTG_STATE_A_IDLE;
242 case OTG_STATE_A_WAIT_VFALL:
243 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
244 dsps_writel(musb->ctrl_base, wrp->coreintr_set,
245 MUSB_INTR_VBUSERROR << wrp->usb_shift);
247 case OTG_STATE_B_IDLE:
248 if (!is_peripheral_enabled(musb))
251 devctl = dsps_readb(mregs, MUSB_DEVCTL);
252 if (devctl & MUSB_DEVCTL_BDEVICE)
253 mod_timer(&glue->timer,
254 jiffies + wrp->poll_seconds * HZ);
256 musb->xceiv->state = OTG_STATE_A_IDLE;
261 spin_unlock_irqrestore(&musb->lock, flags);
264 static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
266 struct device *dev = musb->controller;
267 struct platform_device *pdev = to_platform_device(dev->parent);
268 struct dsps_glue *glue = platform_get_drvdata(pdev);
269 static unsigned long last_timer;
271 if (!is_otg_enabled(musb))
275 timeout = jiffies + msecs_to_jiffies(3);
277 /* Never idle if active, or when VBUS timeout is not set as host */
278 if (musb->is_active || (musb->a_wait_bcon == 0 &&
279 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
280 dev_dbg(musb->controller, "%s active, deleting timer\n",
281 otg_state_string(musb->xceiv->state));
282 del_timer(&glue->timer);
283 last_timer = jiffies;
287 if (time_after(last_timer, timeout) && timer_pending(&glue->timer)) {
288 dev_dbg(musb->controller,
289 "Longer idle timer already pending, ignoring...\n");
292 last_timer = timeout;
294 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
295 otg_state_string(musb->xceiv->state),
296 jiffies_to_msecs(timeout - jiffies));
297 mod_timer(&glue->timer, timeout);
301 static irqreturn_t dsps_interrupt(int irq, void *hci)
303 struct musb *musb = hci;
304 void __iomem *reg_base = musb->ctrl_base;
306 struct device *dev = musb->controller;
307 struct platform_device *pdev = to_platform_device(dev->parent);
308 struct dsps_glue *glue = platform_get_drvdata(pdev);
309 const struct dsps_musb_wrapper *wrp = glue->wrp;
311 const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data;
314 irqreturn_t ret = IRQ_NONE;
317 spin_lock_irqsave(&musb->lock, flags);
319 /* Get endpoint interrupts */
320 epintr = dsps_readl(reg_base, wrp->epintr_status);
321 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
322 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
325 dsps_writel(reg_base, wrp->epintr_status, epintr);
327 /* Get usb core interrupts */
328 usbintr = dsps_readl(reg_base, wrp->coreintr_status);
329 if (!usbintr && !epintr)
332 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
334 dsps_writel(reg_base, wrp->coreintr_status, usbintr);
336 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
340 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
341 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
342 * switch appropriately between halves of the OTG state machine.
343 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
344 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
345 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
347 if ((usbintr & MUSB_INTR_BABBLE) && is_host_enabled(musb))
348 pr_info("CAUTION: musb: Babble Interrupt Occured\n");
350 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
351 int drvvbus = dsps_readl(reg_base, wrp->status);
352 void __iomem *mregs = musb->mregs;
353 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
356 err = is_host_enabled(musb) && (musb->int_usb &
357 MUSB_INTR_VBUSERROR);
360 * The Mentor core doesn't debounce VBUS as needed
361 * to cope with device connect current spikes. This
362 * means it's not uncommon for bus-powered devices
363 * to get VBUS errors during enumeration.
365 * This is a workaround, but newer RTL from Mentor
366 * seems to allow a better one: "re"-starting sessions
367 * without waiting for VBUS to stop registering in
370 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
371 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
372 mod_timer(&glue->timer,
373 jiffies + wrp->poll_seconds * HZ);
374 WARNING("VBUS error workaround (delay coming)\n");
375 } else if (is_host_enabled(musb) && drvvbus) {
378 musb->xceiv->otg->default_a = 1;
379 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
380 del_timer(&glue->timer);
384 musb->xceiv->otg->default_a = 0;
385 musb->xceiv->state = OTG_STATE_B_IDLE;
388 /* NOTE: this must complete power-on within 100 ms. */
389 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
390 drvvbus ? "on" : "off",
391 otg_state_string(musb->xceiv->state),
398 if (musb->int_tx || musb->int_rx || musb->int_usb)
399 ret |= musb_interrupt(musb);
402 /* EOI needs to be written for the IRQ to be re-asserted. */
403 if (ret == IRQ_HANDLED || epintr || usbintr)
404 dsps_writel(reg_base, wrp->eoi, 1);
407 /* Poll for ID change */
408 if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE)
409 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
412 spin_unlock_irqrestore(&musb->lock, flags);
417 static int dsps_musb_init(struct musb *musb)
420 struct device *dev = musb->controller;
421 struct musb_hdrc_platform_data *plat = dev->platform_data;
422 struct platform_device *pdev = to_platform_device(dev->parent);
423 struct dsps_glue *glue = platform_get_drvdata(pdev);
424 const struct dsps_musb_wrapper *wrp = glue->wrp;
425 struct omap_musb_board_data *data = plat->board_data;
427 struct omap_musb_board_data *data =
428 (struct omap_musb_board_data *)musb->controller;
429 const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data;
431 void __iomem *reg_base = musb->ctrl_base;
435 /* mentor core register starts at offset of 0x400 from musb base */
436 musb->mregs += wrp->musb_core_offset;
439 /* NOP driver needs change if supporting dual instance */
440 usb_nop_xceiv_register();
441 musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
442 if (IS_ERR_OR_NULL(musb->xceiv))
446 /* Returns zero if e.g. not clocked */
447 rev = dsps_readl(reg_base, wrp->revision);
454 if (is_host_enabled(musb))
455 setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
459 dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
461 /* Start the on-chip PHY and its PLL. */
462 if (data->set_phy_power)
463 data->set_phy_power(1);
465 musb->isr = dsps_interrupt;
467 /* reset the otgdisable bit, needed for host mode to work */
468 val = dsps_readl(reg_base, wrp->phy_utmi);
469 val &= ~(1 << wrp->otg_disable);
470 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
472 /* clear level interrupt */
473 dsps_writel(reg_base, wrp->eoi, 0);
478 usb_put_phy(musb->xceiv);
479 usb_nop_xceiv_unregister();
484 static int dsps_musb_exit(struct musb *musb)
487 struct device *dev = musb->controller;
488 struct musb_hdrc_platform_data *plat = dev->platform_data;
489 struct omap_musb_board_data *data = plat->board_data;
490 struct platform_device *pdev = to_platform_device(dev->parent);
491 struct dsps_glue *glue = platform_get_drvdata(pdev);
493 struct omap_musb_board_data *data =
494 (struct omap_musb_board_data *)musb->controller;
498 if (is_host_enabled(musb))
499 del_timer_sync(&glue->timer);
502 /* Shutdown the on-chip PHY and its PLL. */
503 if (data->set_phy_power)
504 data->set_phy_power(0);
507 /* NOP driver needs change if supporting dual instance */
508 usb_put_phy(musb->xceiv);
509 usb_nop_xceiv_unregister();
516 static struct musb_platform_ops dsps_ops = {
518 struct musb_platform_ops musb_dsps_ops = {
520 .init = dsps_musb_init,
521 .exit = dsps_musb_exit,
523 .enable = dsps_musb_enable,
524 .disable = dsps_musb_disable,
527 .try_idle = dsps_musb_try_idle,
532 static u64 musb_dmamask = DMA_BIT_MASK(32);
536 static int __devinit dsps_create_musb_pdev(struct dsps_glue *glue, u8 id)
538 struct device *dev = glue->dev;
539 struct platform_device *pdev = to_platform_device(dev);
540 struct musb_hdrc_platform_data *pdata = dev->platform_data;
541 struct platform_device *musb;
542 struct resource *res;
543 struct resource resources[2];
547 /* get memory resource */
548 sprintf(res_name, "musb%d", id);
549 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
551 dev_err(dev, "%s get mem resource failed\n", res_name);
558 /* get irq resource */
559 sprintf(res_name, "musb%d-irq", id);
560 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
562 dev_err(dev, "%s get irq resource failed\n", res_name);
568 resources[1].name = "mc";
570 /* allocate the child platform device */
571 musb = platform_device_alloc("musb-hdrc", -1);
573 dev_err(dev, "failed to allocate musb device\n");
578 musb->dev.parent = dev;
579 musb->dev.dma_mask = &musb_dmamask;
580 musb->dev.coherent_dma_mask = musb_dmamask;
584 pdata->platform_ops = &dsps_ops;
586 ret = platform_device_add_resources(musb, resources, 2);
588 dev_err(dev, "failed to add resources\n");
592 ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
594 dev_err(dev, "failed to add platform_data\n");
598 ret = platform_device_add(musb);
600 dev_err(dev, "failed to register musb device\n");
607 platform_device_put(musb);
612 static void __devexit dsps_delete_musb_pdev(struct dsps_glue *glue)
614 platform_device_del(glue->musb);
615 platform_device_put(glue->musb);
618 static int __devinit dsps_probe(struct platform_device *pdev)
620 const struct platform_device_id *id = platform_get_device_id(pdev);
621 const struct dsps_musb_wrapper *wrp =
622 (struct dsps_musb_wrapper *)id->driver_data;
623 struct dsps_glue *glue;
624 struct resource *iomem;
628 glue = kzalloc(sizeof(*glue), GFP_KERNEL);
630 dev_err(&pdev->dev, "unable to allocate glue memory\n");
635 /* get memory resource */
636 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
638 dev_err(&pdev->dev, "failed to get usbss mem resourse\n");
643 glue->dev = &pdev->dev;
645 glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL);
647 dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n");
651 platform_set_drvdata(pdev, glue);
653 /* enable the usbss clocks */
654 pm_runtime_enable(&pdev->dev);
656 ret = pm_runtime_get_sync(&pdev->dev);
658 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
662 /* create the child platform device for first instances of musb */
663 ret = dsps_create_musb_pdev(glue, 0);
665 dev_err(&pdev->dev, "failed to create child pdev\n");
672 pm_runtime_put(&pdev->dev);
674 pm_runtime_disable(&pdev->dev);
681 static int __devexit dsps_remove(struct platform_device *pdev)
683 struct dsps_glue *glue = platform_get_drvdata(pdev);
685 /* delete the child platform device */
686 dsps_delete_musb_pdev(glue);
688 /* disable usbss clocks */
689 pm_runtime_put(&pdev->dev);
690 pm_runtime_disable(&pdev->dev);
696 #ifdef CONFIG_PM_SLEEP
697 static int dsps_suspend(struct device *dev)
699 struct musb_hdrc_platform_data *plat = dev->platform_data;
700 struct omap_musb_board_data *data = plat->board_data;
702 /* Shutdown the on-chip PHY and its PLL. */
703 if (data->set_phy_power)
704 data->set_phy_power(0);
709 static int dsps_resume(struct device *dev)
711 struct musb_hdrc_platform_data *plat = dev->platform_data;
712 struct omap_musb_board_data *data = plat->board_data;
714 /* Start the on-chip PHY and its PLL. */
715 if (data->set_phy_power)
716 data->set_phy_power(1);
722 static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
726 static const struct platform_device_id musb_dsps_id_table[] __devinitconst = {
728 .name = "musb-ti81xx",
729 .driver_data = (kernel_ulong_t) &ti81xx_driver_data,
731 { }, /* Terminating Entry */
733 MODULE_DEVICE_TABLE(platform, musb_dsps_id_table);
735 static const struct of_device_id musb_dsps_of_match[] __devinitconst = {
736 { .compatible = "musb-ti81xx", },
737 { .compatible = "ti,ti81xx-musb", },
738 { .compatible = "ti,am335x-musb", },
741 MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
743 static struct platform_driver dsps_usbss_driver = {
745 .remove = __devexit_p(dsps_remove),
749 .of_match_table = musb_dsps_of_match,
751 .id_table = musb_dsps_id_table,
754 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
755 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
756 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
757 MODULE_LICENSE("GPL v2");
759 static int __init dsps_init(void)
761 return platform_driver_register(&dsps_usbss_driver);
763 subsys_initcall(dsps_init);
765 static void __exit dsps_exit(void)
767 platform_driver_unregister(&dsps_usbss_driver);
769 module_exit(dsps_exit);