1 // SPDX-License-Identifier: GPL-2.0
3 * Allwinner SUNXI "glue layer"
5 * Copyright © 2015 Hans de Goede <hdegoede@redhat.com>
6 * Copyright © 2013 Jussi Kivilinna <jussi.kivilinna@iki.fi>
8 * Based on the sw_usb "Allwinner OTG Dual Role Controller" code.
9 * Copyright 2007-2012 (C) Allwinner Technology Co., Ltd.
10 * javen <javen@allwinnertech.com>
12 * Based on the DA8xx "glue layer" code.
13 * Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
14 * Copyright (C) 2005-2006 by Texas Instruments
16 * This file is part of the Inventra Controller Driver for Linux.
20 #include <asm/arch/cpu.h>
21 #include <asm/arch/clock.h>
22 #include <asm/arch/gpio.h>
23 #include <asm/arch/usb_phy.h>
24 #include <asm-generic/gpio.h>
27 #include <linux/usb/musb.h>
28 #include "linux-compat.h"
29 #include "musb_core.h"
30 #include "musb_uboot.h"
32 /******************************************************************************
33 ******************************************************************************
34 * From the Allwinner driver
35 ******************************************************************************
36 ******************************************************************************/
38 /******************************************************************************
39 * From include/sunxi_usb_bsp.h
40 ******************************************************************************/
43 #define USBC_REG_o_ISCR 0x0400
44 #define USBC_REG_o_PHYCTL 0x0404
45 #define USBC_REG_o_PHYBIST 0x0408
46 #define USBC_REG_o_PHYTUNE 0x040c
48 #define USBC_REG_o_VEND0 0x0043
50 /* Interface Status and Control */
51 #define USBC_BP_ISCR_VBUS_VALID_FROM_DATA 30
52 #define USBC_BP_ISCR_VBUS_VALID_FROM_VBUS 29
53 #define USBC_BP_ISCR_EXT_ID_STATUS 28
54 #define USBC_BP_ISCR_EXT_DM_STATUS 27
55 #define USBC_BP_ISCR_EXT_DP_STATUS 26
56 #define USBC_BP_ISCR_MERGED_VBUS_STATUS 25
57 #define USBC_BP_ISCR_MERGED_ID_STATUS 24
59 #define USBC_BP_ISCR_ID_PULLUP_EN 17
60 #define USBC_BP_ISCR_DPDM_PULLUP_EN 16
61 #define USBC_BP_ISCR_FORCE_ID 14
62 #define USBC_BP_ISCR_FORCE_VBUS_VALID 12
63 #define USBC_BP_ISCR_VBUS_VALID_SRC 10
65 #define USBC_BP_ISCR_HOSC_EN 7
66 #define USBC_BP_ISCR_VBUS_CHANGE_DETECT 6
67 #define USBC_BP_ISCR_ID_CHANGE_DETECT 5
68 #define USBC_BP_ISCR_DPDM_CHANGE_DETECT 4
69 #define USBC_BP_ISCR_IRQ_ENABLE 3
70 #define USBC_BP_ISCR_VBUS_CHANGE_DETECT_EN 2
71 #define USBC_BP_ISCR_ID_CHANGE_DETECT_EN 1
72 #define USBC_BP_ISCR_DPDM_CHANGE_DETECT_EN 0
74 /******************************************************************************
76 ******************************************************************************/
78 struct sunxi_musb_config {
79 struct musb_hdrc_config *config;
85 struct musb_host_data mdata;
86 struct sunxi_ccm_reg *ccm;
87 struct sunxi_musb_config *cfg;
90 #define to_sunxi_glue(d) container_of(d, struct sunxi_glue, dev)
92 static u32 USBC_WakeUp_ClearChangeDetect(u32 reg_val)
96 temp &= ~BIT(USBC_BP_ISCR_VBUS_CHANGE_DETECT);
97 temp &= ~BIT(USBC_BP_ISCR_ID_CHANGE_DETECT);
98 temp &= ~BIT(USBC_BP_ISCR_DPDM_CHANGE_DETECT);
103 static void USBC_EnableIdPullUp(__iomem void *base)
107 reg_val = musb_readl(base, USBC_REG_o_ISCR);
108 reg_val |= BIT(USBC_BP_ISCR_ID_PULLUP_EN);
109 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
110 musb_writel(base, USBC_REG_o_ISCR, reg_val);
113 static void USBC_EnableDpDmPullUp(__iomem void *base)
117 reg_val = musb_readl(base, USBC_REG_o_ISCR);
118 reg_val |= BIT(USBC_BP_ISCR_DPDM_PULLUP_EN);
119 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
120 musb_writel(base, USBC_REG_o_ISCR, reg_val);
123 static void USBC_ForceIdToLow(__iomem void *base)
127 reg_val = musb_readl(base, USBC_REG_o_ISCR);
128 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID);
129 reg_val |= (0x02 << USBC_BP_ISCR_FORCE_ID);
130 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
131 musb_writel(base, USBC_REG_o_ISCR, reg_val);
134 static void USBC_ForceIdToHigh(__iomem void *base)
138 reg_val = musb_readl(base, USBC_REG_o_ISCR);
139 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID);
140 reg_val |= (0x03 << USBC_BP_ISCR_FORCE_ID);
141 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
142 musb_writel(base, USBC_REG_o_ISCR, reg_val);
145 static void USBC_ForceVbusValidToLow(__iomem void *base)
149 reg_val = musb_readl(base, USBC_REG_o_ISCR);
150 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
151 reg_val |= (0x02 << USBC_BP_ISCR_FORCE_VBUS_VALID);
152 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
153 musb_writel(base, USBC_REG_o_ISCR, reg_val);
156 static void USBC_ForceVbusValidToHigh(__iomem void *base)
160 reg_val = musb_readl(base, USBC_REG_o_ISCR);
161 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
162 reg_val |= (0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
163 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
164 musb_writel(base, USBC_REG_o_ISCR, reg_val);
167 static void USBC_ConfigFIFO_Base(void)
171 /* config usb fifo, 8kb mode */
172 reg_value = readl(SUNXI_SRAMC_BASE + 0x04);
173 reg_value &= ~(0x03 << 0);
175 writel(reg_value, SUNXI_SRAMC_BASE + 0x04);
178 /******************************************************************************
179 * Needed for the DFU polling magic
180 ******************************************************************************/
182 static u8 last_int_usb;
184 bool dfu_usb_get_reset(void)
186 return !!(last_int_usb & MUSB_INTR_RESET);
189 /******************************************************************************
191 ******************************************************************************/
193 static irqreturn_t sunxi_musb_interrupt(int irq, void *__hci)
195 struct musb *musb = __hci;
196 irqreturn_t retval = IRQ_NONE;
198 /* read and flush interrupts */
199 musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
200 last_int_usb = musb->int_usb;
202 musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb);
203 musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
205 musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx);
206 musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
208 musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx);
210 if (musb->int_usb || musb->int_tx || musb->int_rx)
211 retval |= musb_interrupt(musb);
216 /* musb_core does not call enable / disable in a balanced manner <sigh> */
217 static bool enabled = false;
219 static int sunxi_musb_enable(struct musb *musb)
223 pr_debug("%s():\n", __func__);
225 musb_ep_select(musb->mregs, 0);
226 musb_writeb(musb->mregs, MUSB_FADDR, 0);
231 /* select PIO mode */
232 musb_writeb(musb->mregs, USBC_REG_o_VEND0, 0);
234 if (is_host_enabled(musb)) {
235 ret = sunxi_usb_phy_vbus_detect(0);
237 printf("A charger is plugged into the OTG: ");
240 ret = sunxi_usb_phy_id_detect(0);
242 printf("No host cable detected: ");
245 sunxi_usb_phy_power_on(0); /* port power on */
248 USBC_ForceVbusValidToHigh(musb->mregs);
254 static void sunxi_musb_disable(struct musb *musb)
256 pr_debug("%s():\n", __func__);
261 if (is_host_enabled(musb))
262 sunxi_usb_phy_power_off(0); /* port power off */
264 USBC_ForceVbusValidToLow(musb->mregs);
265 mdelay(200); /* Wait for the current session to timeout */
270 static int sunxi_musb_init(struct musb *musb)
272 struct sunxi_glue *glue = to_sunxi_glue(musb->controller);
274 pr_debug("%s():\n", __func__);
276 musb->isr = sunxi_musb_interrupt;
278 setbits_le32(&glue->ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_USB0));
279 if (glue->cfg->clkgate_bit)
280 setbits_le32(&glue->ccm->ahb_gate0,
281 BIT(glue->cfg->clkgate_bit));
282 #ifdef CONFIG_SUNXI_GEN_SUN6I
283 setbits_le32(&glue->ccm->ahb_reset0_cfg, BIT(AHB_GATE_OFFSET_USB0));
284 if (glue->cfg->rst_bit)
285 setbits_le32(&glue->ccm->ahb_reset0_cfg,
286 BIT(glue->cfg->rst_bit));
289 sunxi_usb_phy_init(0);
291 USBC_ConfigFIFO_Base();
292 USBC_EnableDpDmPullUp(musb->mregs);
293 USBC_EnableIdPullUp(musb->mregs);
295 if (is_host_enabled(musb)) {
297 USBC_ForceIdToLow(musb->mregs);
299 /* Peripheral mode */
300 USBC_ForceIdToHigh(musb->mregs);
302 USBC_ForceVbusValidToHigh(musb->mregs);
307 static void sunxi_musb_pre_root_reset_end(struct musb *musb)
309 struct sunxi_glue *glue = to_sunxi_glue(musb->controller);
311 sun4i_usb_phy_set_squelch_detect(glue->phy, false);
314 static void sunxi_musb_post_root_reset_end(struct musb *musb)
316 struct sunxi_glue *glue = to_sunxi_glue(musb->controller);
318 sun4i_usb_phy_set_squelch_detect(glue->phy, true);
321 static const struct musb_platform_ops sunxi_musb_ops = {
322 .init = sunxi_musb_init,
323 .enable = sunxi_musb_enable,
324 .disable = sunxi_musb_disable,
325 .pre_root_reset_end = sunxi_musb_pre_root_reset_end,
326 .post_root_reset_end = sunxi_musb_post_root_reset_end,
329 /* Allwinner OTG supports up to 5 endpoints */
330 #define SUNXI_MUSB_MAX_EP_NUM 6
331 #define SUNXI_MUSB_RAM_BITS 11
333 static struct musb_fifo_cfg sunxi_musb_mode_cfg[] = {
334 MUSB_EP_FIFO_SINGLE(1, FIFO_TX, 512),
335 MUSB_EP_FIFO_SINGLE(1, FIFO_RX, 512),
336 MUSB_EP_FIFO_SINGLE(2, FIFO_TX, 512),
337 MUSB_EP_FIFO_SINGLE(2, FIFO_RX, 512),
338 MUSB_EP_FIFO_SINGLE(3, FIFO_TX, 512),
339 MUSB_EP_FIFO_SINGLE(3, FIFO_RX, 512),
340 MUSB_EP_FIFO_SINGLE(4, FIFO_TX, 512),
341 MUSB_EP_FIFO_SINGLE(4, FIFO_RX, 512),
342 MUSB_EP_FIFO_SINGLE(5, FIFO_TX, 512),
343 MUSB_EP_FIFO_SINGLE(5, FIFO_RX, 512),
346 /* H3/V3s OTG supports only 4 endpoints */
347 #define SUNXI_MUSB_MAX_EP_NUM_H3 5
349 static struct musb_fifo_cfg sunxi_musb_mode_cfg_h3[] = {
350 MUSB_EP_FIFO_SINGLE(1, FIFO_TX, 512),
351 MUSB_EP_FIFO_SINGLE(1, FIFO_RX, 512),
352 MUSB_EP_FIFO_SINGLE(2, FIFO_TX, 512),
353 MUSB_EP_FIFO_SINGLE(2, FIFO_RX, 512),
354 MUSB_EP_FIFO_SINGLE(3, FIFO_TX, 512),
355 MUSB_EP_FIFO_SINGLE(3, FIFO_RX, 512),
356 MUSB_EP_FIFO_SINGLE(4, FIFO_TX, 512),
357 MUSB_EP_FIFO_SINGLE(4, FIFO_RX, 512),
360 static struct musb_hdrc_config musb_config = {
361 .fifo_cfg = sunxi_musb_mode_cfg,
362 .fifo_cfg_size = ARRAY_SIZE(sunxi_musb_mode_cfg),
365 .num_eps = SUNXI_MUSB_MAX_EP_NUM,
366 .ram_bits = SUNXI_MUSB_RAM_BITS,
369 static struct musb_hdrc_config musb_config_h3 = {
370 .fifo_cfg = sunxi_musb_mode_cfg_h3,
371 .fifo_cfg_size = ARRAY_SIZE(sunxi_musb_mode_cfg_h3),
375 .num_eps = SUNXI_MUSB_MAX_EP_NUM_H3,
376 .ram_bits = SUNXI_MUSB_RAM_BITS,
379 static int musb_usb_probe(struct udevice *dev)
381 struct sunxi_glue *glue = dev_get_priv(dev);
382 struct musb_host_data *host = &glue->mdata;
383 struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
384 struct musb_hdrc_platform_data pdata;
385 void *base = dev_read_addr_ptr(dev);
391 glue->cfg = (struct sunxi_musb_config *)dev_get_driver_data(dev);
395 glue->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
396 if (IS_ERR(glue->ccm))
397 return PTR_ERR(glue->ccm);
399 priv->desc_before_addr = true;
401 memset(&pdata, 0, sizeof(pdata));
403 pdata.platform_ops = &sunxi_musb_ops;
404 pdata.config = glue->cfg->config;
406 #ifdef CONFIG_USB_MUSB_HOST
407 pdata.mode = MUSB_HOST;
408 host->host = musb_init_controller(&pdata, &glue->dev, base);
412 ret = musb_lowlevel_init(host);
414 printf("Allwinner mUSB OTG (Host)\n");
416 pdata.mode = MUSB_PERIPHERAL;
417 ret = musb_register(&pdata, &glue->dev, base);
419 printf("Allwinner mUSB OTG (Peripheral)\n");
425 static int musb_usb_remove(struct udevice *dev)
427 struct sunxi_glue *glue = dev_get_priv(dev);
428 struct musb_host_data *host = &glue->mdata;
430 musb_stop(host->host);
432 sunxi_usb_phy_exit(0);
433 #ifdef CONFIG_SUNXI_GEN_SUN6I
434 clrbits_le32(&glue->ccm->ahb_reset0_cfg, BIT(AHB_GATE_OFFSET_USB0));
435 if (glue->cfg->rst_bit)
436 clrbits_le32(&glue->ccm->ahb_reset0_cfg,
437 BIT(glue->cfg->rst_bit));
439 clrbits_le32(&glue->ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_USB0));
440 if (glue->cfg->clkgate_bit)
441 clrbits_le32(&glue->ccm->ahb_gate0,
442 BIT(glue->cfg->clkgate_bit));
450 static const struct sunxi_musb_config sun4i_a10_cfg = {
451 .config = &musb_config,
454 static const struct sunxi_musb_config sun8i_h3_cfg = {
455 .config = &musb_config_h3,
460 static const struct udevice_id sunxi_musb_ids[] = {
461 { .compatible = "allwinner,sun4i-a10-musb",
462 .data = (ulong)&sun4i_a10_cfg },
463 { .compatible = "allwinner,sun6i-a31-musb",
464 .data = (ulong)&sun4i_a10_cfg },
465 { .compatible = "allwinner,sun8i-a33-musb",
466 .data = (ulong)&sun4i_a10_cfg },
467 { .compatible = "allwinner,sun8i-h3-musb",
468 .data = (ulong)&sun8i_h3_cfg },
472 U_BOOT_DRIVER(usb_musb) = {
473 .name = "sunxi-musb",
474 #ifdef CONFIG_USB_MUSB_HOST
477 .id = UCLASS_USB_DEV_GENERIC,
479 .of_match = sunxi_musb_ids,
480 .probe = musb_usb_probe,
481 .remove = musb_usb_remove,
482 #ifdef CONFIG_USB_MUSB_HOST
483 .ops = &musb_usb_ops,
485 .platdata_auto_alloc_size = sizeof(struct usb_platdata),
486 .priv_auto_alloc_size = sizeof(struct sunxi_glue),