]> git.sur5r.net Git - u-boot/blob - drivers/usb/usb_ohci.c
fix USB initialisation procedure
[u-boot] / drivers / usb / usb_ohci.c
1 /*
2  * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
3  *
4  * Interrupt support is added. Now, it has been tested
5  * on ULI1575 chip and works well with USB keyboard.
6  *
7  * (C) Copyright 2007
8  * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
9  *
10  * (C) Copyright 2003
11  * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
12  *
13  * Note: Much of this code has been derived from Linux 2.4
14  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
15  * (C) Copyright 2000-2002 David Brownell
16  *
17  * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
18  * ebenard@eukrea.com - based on s3c24x0's driver
19  *
20  * See file CREDITS for list of people who contributed to this
21  * project.
22  *
23  * This program is free software; you can redistribute it and/or
24  * modify it under the terms of the GNU General Public License as
25  * published by the Free Software Foundation; either version 2 of
26  * the License, or (at your option) any later version.
27  *
28  * This program is distributed in the hope that it will be useful,
29  * but WITHOUT ANY WARRANTY; without even the implied warranty of
30  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
31  * GNU General Public License for more details.
32  *
33  * You should have received a copy of the GNU General Public License
34  * along with this program; if not, write to the Free Software
35  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
36  * MA 02111-1307 USA
37  *
38  */
39 /*
40  * IMPORTANT NOTES
41  * 1 - Read doc/README.generic_usb_ohci
42  * 2 - this driver is intended for use with USB Mass Storage Devices
43  *     (BBB) and USB keyboard. There is NO support for Isochronous pipes!
44  * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
45  *     to activate workaround for bug #41 or this driver will NOT work!
46  */
47
48 #include <common.h>
49
50 #ifdef CONFIG_USB_OHCI_NEW
51
52 #include <asm/byteorder.h>
53
54 #if defined(CONFIG_PCI_OHCI)
55 # include <pci.h>
56 #if !defined(CONFIG_PCI_OHCI_DEVNO)
57 #define CONFIG_PCI_OHCI_DEVNO   0
58 #endif
59 #endif
60
61 #include <malloc.h>
62 #include <usb.h>
63 #include "usb_ohci.h"
64
65 #ifdef CONFIG_AT91RM9200
66 #include <asm/arch/hardware.h>  /* needed for AT91_USB_HOST_BASE */
67 #endif
68
69 #if defined(CONFIG_ARM920T) || \
70     defined(CONFIG_S3C2400) || \
71     defined(CONFIG_S3C2410) || \
72     defined(CONFIG_S3C6400) || \
73     defined(CONFIG_440EP) || \
74     defined(CONFIG_PCI_OHCI) || \
75     defined(CONFIG_MPC5200) || \
76     defined(CFG_OHCI_USE_NPS)
77 # define OHCI_USE_NPS           /* force NoPowerSwitching mode */
78 #endif
79
80 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
81 #undef DEBUG
82 #undef SHOW_INFO
83 #undef OHCI_FILL_TRACE
84
85 /* For initializing controller (mask in an HCFS mode too) */
86 #define OHCI_CONTROL_INIT \
87         (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
88
89 /*
90  * e.g. PCI controllers need this
91  */
92 #ifdef CFG_OHCI_SWAP_REG_ACCESS
93 # define readl(a) __swap_32(*((volatile u32 *)(a)))
94 # define writel(a, b) (*((volatile u32 *)(b)) = __swap_32((volatile u32)a))
95 #else
96 # define readl(a) (*((volatile u32 *)(a)))
97 # define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
98 #endif /* CFG_OHCI_SWAP_REG_ACCESS */
99
100 #define min_t(type, x, y) \
101                     ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
102
103 #ifdef CONFIG_PCI_OHCI
104 static struct pci_device_id ohci_pci_ids[] = {
105         {0x10b9, 0x5237},       /* ULI1575 PCI OHCI module ids */
106         {0x1033, 0x0035},       /* NEC PCI OHCI module ids */
107         {0x1131, 0x1561},       /* Philips 1561 PCI OHCI module ids */
108         /* Please add supported PCI OHCI controller ids here */
109         {0, 0}
110 };
111 #endif
112
113 #ifdef CONFIG_PCI_EHCI_DEVNO
114 static struct pci_device_id ehci_pci_ids[] = {
115         {0x1131, 0x1562},       /* Philips 1562 PCI EHCI module ids */
116         /* Please add supported PCI EHCI controller ids here */
117         {0, 0}
118 };
119 #endif
120
121 #ifdef DEBUG
122 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
123 #else
124 #define dbg(format, arg...) do {} while (0)
125 #endif /* DEBUG */
126 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
127 #ifdef SHOW_INFO
128 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
129 #else
130 #define info(format, arg...) do {} while (0)
131 #endif
132
133 #ifdef CFG_OHCI_BE_CONTROLLER
134 # define m16_swap(x) cpu_to_be16(x)
135 # define m32_swap(x) cpu_to_be32(x)
136 #else
137 # define m16_swap(x) cpu_to_le16(x)
138 # define m32_swap(x) cpu_to_le32(x)
139 #endif /* CFG_OHCI_BE_CONTROLLER */
140
141 /* global ohci_t */
142 static ohci_t gohci;
143 /* this must be aligned to a 256 byte boundary */
144 struct ohci_hcca ghcca[1];
145 /* a pointer to the aligned storage */
146 struct ohci_hcca *phcca;
147 /* this allocates EDs for all possible endpoints */
148 struct ohci_device ohci_dev;
149 /* device which was disconnected */
150 struct usb_device *devgone;
151
152 static inline u32 roothub_a(struct ohci *hc)
153         { return readl(&hc->regs->roothub.a); }
154 static inline u32 roothub_b(struct ohci *hc)
155         { return readl(&hc->regs->roothub.b); }
156 static inline u32 roothub_status(struct ohci *hc)
157         { return readl(&hc->regs->roothub.status); }
158 static inline u32 roothub_portstatus(struct ohci *hc, int i)
159         { return readl(&hc->regs->roothub.portstatus[i]); }
160
161 /* forward declaration */
162 static int hc_interrupt(void);
163 static void td_submit_job(struct usb_device *dev, unsigned long pipe,
164                           void *buffer, int transfer_len,
165                           struct devrequest *setup, urb_priv_t *urb,
166                           int interval);
167
168 /*-------------------------------------------------------------------------*
169  * URB support functions
170  *-------------------------------------------------------------------------*/
171
172 /* free HCD-private data associated with this URB */
173
174 static void urb_free_priv(urb_priv_t *urb)
175 {
176         int             i;
177         int             last;
178         struct td       *td;
179
180         last = urb->length - 1;
181         if (last >= 0) {
182                 for (i = 0; i <= last; i++) {
183                         td = urb->td[i];
184                         if (td) {
185                                 td->usb_dev = NULL;
186                                 urb->td[i] = NULL;
187                         }
188                 }
189         }
190         free(urb);
191 }
192
193 /*-------------------------------------------------------------------------*/
194
195 #ifdef DEBUG
196 static int sohci_get_current_frame_number(struct usb_device *dev);
197
198 /* debug| print the main components of an URB
199  * small: 0) header + data packets 1) just header */
200
201 static void pkt_print(urb_priv_t *purb, struct usb_device *dev,
202                       unsigned long pipe, void *buffer, int transfer_len,
203                       struct devrequest *setup, char *str, int small)
204 {
205         dbg("%s URB:[%4x] dev:%2lu,ep:%2lu-%c,type:%s,len:%d/%d stat:%#lx",
206                         str,
207                         sohci_get_current_frame_number(dev),
208                         usb_pipedevice(pipe),
209                         usb_pipeendpoint(pipe),
210                         usb_pipeout(pipe)? 'O': 'I',
211                         usb_pipetype(pipe) < 2 ? \
212                                 (usb_pipeint(pipe)? "INTR": "ISOC"): \
213                                 (usb_pipecontrol(pipe)? "CTRL": "BULK"),
214                         (purb ? purb->actual_length : 0),
215                         transfer_len, dev->status);
216 #ifdef  OHCI_VERBOSE_DEBUG
217         if (!small) {
218                 int i, len;
219
220                 if (usb_pipecontrol(pipe)) {
221                         printf(__FILE__ ": cmd(8):");
222                         for (i = 0; i < 8 ; i++)
223                                 printf(" %02x", ((__u8 *) setup) [i]);
224                         printf("\n");
225                 }
226                 if (transfer_len > 0 && buffer) {
227                         printf(__FILE__ ": data(%d/%d):",
228                                 (purb ? purb->actual_length : 0),
229                                 transfer_len);
230                         len = usb_pipeout(pipe)? transfer_len:
231                                         (purb ? purb->actual_length : 0);
232                         for (i = 0; i < 16 && i < len; i++)
233                                 printf(" %02x", ((__u8 *) buffer) [i]);
234                         printf("%s\n", i < len? "...": "");
235                 }
236         }
237 #endif
238 }
239
240 /* just for debugging; prints non-empty branches of the int ed tree
241  * inclusive iso eds */
242 void ep_print_int_eds(ohci_t *ohci, char *str)
243 {
244         int i, j;
245          __u32 *ed_p;
246         for (i = 0; i < 32; i++) {
247                 j = 5;
248                 ed_p = &(ohci->hcca->int_table [i]);
249                 if (*ed_p == 0)
250                     continue;
251                 printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
252                 while (*ed_p != 0 && j--) {
253                         ed_t *ed = (ed_t *)m32_swap(ed_p);
254                         printf(" ed: %4x;", ed->hwINFO);
255                         ed_p = &ed->hwNextED;
256                 }
257                 printf("\n");
258         }
259 }
260
261 static void ohci_dump_intr_mask(char *label, __u32 mask)
262 {
263         dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
264                 label,
265                 mask,
266                 (mask & OHCI_INTR_MIE) ? " MIE" : "",
267                 (mask & OHCI_INTR_OC) ? " OC" : "",
268                 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
269                 (mask & OHCI_INTR_FNO) ? " FNO" : "",
270                 (mask & OHCI_INTR_UE) ? " UE" : "",
271                 (mask & OHCI_INTR_RD) ? " RD" : "",
272                 (mask & OHCI_INTR_SF) ? " SF" : "",
273                 (mask & OHCI_INTR_WDH) ? " WDH" : "",
274                 (mask & OHCI_INTR_SO) ? " SO" : ""
275                 );
276 }
277
278 static void maybe_print_eds(char *label, __u32 value)
279 {
280         ed_t *edp = (ed_t *)value;
281
282         if (value) {
283                 dbg("%s %08x", label, value);
284                 dbg("%08x", edp->hwINFO);
285                 dbg("%08x", edp->hwTailP);
286                 dbg("%08x", edp->hwHeadP);
287                 dbg("%08x", edp->hwNextED);
288         }
289 }
290
291 static char *hcfs2string(int state)
292 {
293         switch (state) {
294         case OHCI_USB_RESET:    return "reset";
295         case OHCI_USB_RESUME:   return "resume";
296         case OHCI_USB_OPER:     return "operational";
297         case OHCI_USB_SUSPEND:  return "suspend";
298         }
299         return "?";
300 }
301
302 /* dump control and status registers */
303 static void ohci_dump_status(ohci_t *controller)
304 {
305         struct ohci_regs        *regs = controller->regs;
306         __u32                   temp;
307
308         temp = readl(&regs->revision) & 0xff;
309         if (temp != 0x10)
310                 dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
311
312         temp = readl(&regs->control);
313         dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
314                 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
315                 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
316                 (temp & OHCI_CTRL_IR) ? " IR" : "",
317                 hcfs2string(temp & OHCI_CTRL_HCFS),
318                 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
319                 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
320                 (temp & OHCI_CTRL_IE) ? " IE" : "",
321                 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
322                 temp & OHCI_CTRL_CBSR
323                 );
324
325         temp = readl(&regs->cmdstatus);
326         dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
327                 (temp & OHCI_SOC) >> 16,
328                 (temp & OHCI_OCR) ? " OCR" : "",
329                 (temp & OHCI_BLF) ? " BLF" : "",
330                 (temp & OHCI_CLF) ? " CLF" : "",
331                 (temp & OHCI_HCR) ? " HCR" : ""
332                 );
333
334         ohci_dump_intr_mask("intrstatus", readl(&regs->intrstatus));
335         ohci_dump_intr_mask("intrenable", readl(&regs->intrenable));
336
337         maybe_print_eds("ed_periodcurrent", readl(&regs->ed_periodcurrent));
338
339         maybe_print_eds("ed_controlhead", readl(&regs->ed_controlhead));
340         maybe_print_eds("ed_controlcurrent", readl(&regs->ed_controlcurrent));
341
342         maybe_print_eds("ed_bulkhead", readl(&regs->ed_bulkhead));
343         maybe_print_eds("ed_bulkcurrent", readl(&regs->ed_bulkcurrent));
344
345         maybe_print_eds("donehead", readl(&regs->donehead));
346 }
347
348 static void ohci_dump_roothub(ohci_t *controller, int verbose)
349 {
350         __u32                   temp, ndp, i;
351
352         temp = roothub_a(controller);
353         ndp = (temp & RH_A_NDP);
354 #ifdef CONFIG_AT91C_PQFP_UHPBUG
355         ndp = (ndp == 2) ? 1:0;
356 #endif
357         if (verbose) {
358                 dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
359                         ((temp & RH_A_POTPGT) >> 24) & 0xff,
360                         (temp & RH_A_NOCP) ? " NOCP" : "",
361                         (temp & RH_A_OCPM) ? " OCPM" : "",
362                         (temp & RH_A_DT) ? " DT" : "",
363                         (temp & RH_A_NPS) ? " NPS" : "",
364                         (temp & RH_A_PSM) ? " PSM" : "",
365                         ndp
366                         );
367                 temp = roothub_b(controller);
368                 dbg("roothub.b: %08x PPCM=%04x DR=%04x",
369                         temp,
370                         (temp & RH_B_PPCM) >> 16,
371                         (temp & RH_B_DR)
372                         );
373                 temp = roothub_status(controller);
374                 dbg("roothub.status: %08x%s%s%s%s%s%s",
375                         temp,
376                         (temp & RH_HS_CRWE) ? " CRWE" : "",
377                         (temp & RH_HS_OCIC) ? " OCIC" : "",
378                         (temp & RH_HS_LPSC) ? " LPSC" : "",
379                         (temp & RH_HS_DRWE) ? " DRWE" : "",
380                         (temp & RH_HS_OCI) ? " OCI" : "",
381                         (temp & RH_HS_LPS) ? " LPS" : ""
382                         );
383         }
384
385         for (i = 0; i < ndp; i++) {
386                 temp = roothub_portstatus(controller, i);
387                 dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
388                         i,
389                         temp,
390                         (temp & RH_PS_PRSC) ? " PRSC" : "",
391                         (temp & RH_PS_OCIC) ? " OCIC" : "",
392                         (temp & RH_PS_PSSC) ? " PSSC" : "",
393                         (temp & RH_PS_PESC) ? " PESC" : "",
394                         (temp & RH_PS_CSC) ? " CSC" : "",
395
396                         (temp & RH_PS_LSDA) ? " LSDA" : "",
397                         (temp & RH_PS_PPS) ? " PPS" : "",
398                         (temp & RH_PS_PRS) ? " PRS" : "",
399                         (temp & RH_PS_POCI) ? " POCI" : "",
400                         (temp & RH_PS_PSS) ? " PSS" : "",
401
402                         (temp & RH_PS_PES) ? " PES" : "",
403                         (temp & RH_PS_CCS) ? " CCS" : ""
404                         );
405         }
406 }
407
408 static void ohci_dump(ohci_t *controller, int verbose)
409 {
410         dbg("OHCI controller usb-%s state", controller->slot_name);
411
412         /* dumps some of the state we know about */
413         ohci_dump_status(controller);
414         if (verbose)
415                 ep_print_int_eds(controller, "hcca");
416         dbg("hcca frame #%04x", controller->hcca->frame_no);
417         ohci_dump_roothub(controller, 1);
418 }
419 #endif /* DEBUG */
420
421 /*-------------------------------------------------------------------------*
422  * Interface functions (URB)
423  *-------------------------------------------------------------------------*/
424
425 /* get a transfer request */
426
427 int sohci_submit_job(urb_priv_t *urb, struct devrequest *setup)
428 {
429         ohci_t *ohci;
430         ed_t *ed;
431         urb_priv_t *purb_priv = urb;
432         int i, size = 0;
433         struct usb_device *dev = urb->dev;
434         unsigned long pipe = urb->pipe;
435         void *buffer = urb->transfer_buffer;
436         int transfer_len = urb->transfer_buffer_length;
437         int interval = urb->interval;
438
439         ohci = &gohci;
440
441         /* when controller's hung, permit only roothub cleanup attempts
442          * such as powering down ports */
443         if (ohci->disabled) {
444                 err("sohci_submit_job: EPIPE");
445                 return -1;
446         }
447
448         /* we're about to begin a new transaction here so mark the
449          * URB unfinished */
450         urb->finished = 0;
451
452         /* every endpoint has a ed, locate and fill it */
453         ed = ep_add_ed(dev, pipe, interval, 1);
454         if (!ed) {
455                 err("sohci_submit_job: ENOMEM");
456                 return -1;
457         }
458
459         /* for the private part of the URB we need the number of TDs (size) */
460         switch (usb_pipetype(pipe)) {
461         case PIPE_BULK: /* one TD for every 4096 Byte */
462                 size = (transfer_len - 1) / 4096 + 1;
463                 break;
464         case PIPE_CONTROL:/* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
465                 size = (transfer_len == 0)? 2:
466                                         (transfer_len - 1) / 4096 + 3;
467                 break;
468         case PIPE_INTERRUPT: /* 1 TD */
469                 size = 1;
470                 break;
471         }
472
473         ed->purb = urb;
474
475         if (size >= (N_URB_TD - 1)) {
476                 err("need %d TDs, only have %d", size, N_URB_TD);
477                 return -1;
478         }
479         purb_priv->pipe = pipe;
480
481         /* fill the private part of the URB */
482         purb_priv->length = size;
483         purb_priv->ed = ed;
484         purb_priv->actual_length = 0;
485
486         /* allocate the TDs */
487         /* note that td[0] was allocated in ep_add_ed */
488         for (i = 0; i < size; i++) {
489                 purb_priv->td[i] = td_alloc(dev);
490                 if (!purb_priv->td[i]) {
491                         purb_priv->length = i;
492                         urb_free_priv(purb_priv);
493                         err("sohci_submit_job: ENOMEM");
494                         return -1;
495                 }
496         }
497
498         if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
499                 urb_free_priv(purb_priv);
500                 err("sohci_submit_job: EINVAL");
501                 return -1;
502         }
503
504         /* link the ed into a chain if is not already */
505         if (ed->state != ED_OPER)
506                 ep_link(ohci, ed);
507
508         /* fill the TDs and link it to the ed */
509         td_submit_job(dev, pipe, buffer, transfer_len,
510                       setup, purb_priv, interval);
511
512         return 0;
513 }
514
515 static inline int sohci_return_job(struct ohci *hc, urb_priv_t *urb)
516 {
517         struct ohci_regs *regs = hc->regs;
518
519         switch (usb_pipetype(urb->pipe)) {
520         case PIPE_INTERRUPT:
521                 /* implicitly requeued */
522                 if (urb->dev->irq_handle &&
523                                 (urb->dev->irq_act_len = urb->actual_length)) {
524                         writel(OHCI_INTR_WDH, &regs->intrenable);
525                         readl(&regs->intrenable); /* PCI posting flush */
526                         urb->dev->irq_handle(urb->dev);
527                         writel(OHCI_INTR_WDH, &regs->intrdisable);
528                         readl(&regs->intrdisable); /* PCI posting flush */
529                 }
530                 urb->actual_length = 0;
531                 td_submit_job(
532                                 urb->dev,
533                                 urb->pipe,
534                                 urb->transfer_buffer,
535                                 urb->transfer_buffer_length,
536                                 NULL,
537                                 urb,
538                                 urb->interval);
539                 break;
540         case PIPE_CONTROL:
541         case PIPE_BULK:
542                 break;
543         default:
544                 return 0;
545         }
546         return 1;
547 }
548
549 /*-------------------------------------------------------------------------*/
550
551 #ifdef DEBUG
552 /* tell us the current USB frame number */
553
554 static int sohci_get_current_frame_number(struct usb_device *usb_dev)
555 {
556         ohci_t *ohci = &gohci;
557
558         return m16_swap(ohci->hcca->frame_no);
559 }
560 #endif
561
562 /*-------------------------------------------------------------------------*
563  * ED handling functions
564  *-------------------------------------------------------------------------*/
565
566 /* search for the right branch to insert an interrupt ed into the int tree
567  * do some load ballancing;
568  * returns the branch and
569  * sets the interval to interval = 2^integer (ld (interval)) */
570
571 static int ep_int_ballance(ohci_t *ohci, int interval, int load)
572 {
573         int i, branch = 0;
574
575         /* search for the least loaded interrupt endpoint
576          * branch of all 32 branches
577          */
578         for (i = 0; i < 32; i++)
579                 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
580                         branch = i;
581
582         branch = branch % interval;
583         for (i = branch; i < 32; i += interval)
584                 ohci->ohci_int_load [i] += load;
585
586         return branch;
587 }
588
589 /*-------------------------------------------------------------------------*/
590
591 /*  2^int( ld (inter)) */
592
593 static int ep_2_n_interval(int inter)
594 {
595         int i;
596         for (i = 0; ((inter >> i) > 1) && (i < 5); i++);
597         return 1 << i;
598 }
599
600 /*-------------------------------------------------------------------------*/
601
602 /* the int tree is a binary tree
603  * in order to process it sequentially the indexes of the branches have to
604  * be mapped the mapping reverses the bits of a word of num_bits length */
605 static int ep_rev(int num_bits, int word)
606 {
607         int i, wout = 0;
608
609         for (i = 0; i < num_bits; i++)
610                 wout |= (((word >> i) & 1) << (num_bits - i - 1));
611         return wout;
612 }
613
614 /*-------------------------------------------------------------------------*
615  * ED handling functions
616  *-------------------------------------------------------------------------*/
617
618 /* link an ed into one of the HC chains */
619
620 static int ep_link(ohci_t *ohci, ed_t *edi)
621 {
622         volatile ed_t *ed = edi;
623         int int_branch;
624         int i;
625         int inter;
626         int interval;
627         int load;
628         __u32 *ed_p;
629
630         ed->state = ED_OPER;
631         ed->int_interval = 0;
632
633         switch (ed->type) {
634         case PIPE_CONTROL:
635                 ed->hwNextED = 0;
636                 if (ohci->ed_controltail == NULL)
637                         writel(ed, &ohci->regs->ed_controlhead);
638                 else
639                         ohci->ed_controltail->hwNextED =
640                                                    m32_swap((unsigned long)ed);
641
642                 ed->ed_prev = ohci->ed_controltail;
643                 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
644                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
645                         ohci->hc_control |= OHCI_CTRL_CLE;
646                         writel(ohci->hc_control, &ohci->regs->control);
647                 }
648                 ohci->ed_controltail = edi;
649                 break;
650
651         case PIPE_BULK:
652                 ed->hwNextED = 0;
653                 if (ohci->ed_bulktail == NULL)
654                         writel(ed, &ohci->regs->ed_bulkhead);
655                 else
656                         ohci->ed_bulktail->hwNextED =
657                                                    m32_swap((unsigned long)ed);
658
659                 ed->ed_prev = ohci->ed_bulktail;
660                 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
661                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
662                         ohci->hc_control |= OHCI_CTRL_BLE;
663                         writel(ohci->hc_control, &ohci->regs->control);
664                 }
665                 ohci->ed_bulktail = edi;
666                 break;
667
668         case PIPE_INTERRUPT:
669                 load = ed->int_load;
670                 interval = ep_2_n_interval(ed->int_period);
671                 ed->int_interval = interval;
672                 int_branch = ep_int_ballance(ohci, interval, load);
673                 ed->int_branch = int_branch;
674
675                 for (i = 0; i < ep_rev(6, interval); i += inter) {
676                         inter = 1;
677                         for (ed_p = &(ohci->hcca->int_table[\
678                                                 ep_rev(5, i) + int_branch]);
679                                 (*ed_p != 0) &&
680                                 (((ed_t *)ed_p)->int_interval >= interval);
681                                 ed_p = &(((ed_t *)ed_p)->hwNextED))
682                                         inter = ep_rev(6,
683                                                  ((ed_t *)ed_p)->int_interval);
684                         ed->hwNextED = *ed_p;
685                         *ed_p = m32_swap((unsigned long)ed);
686                 }
687                 break;
688         }
689         return 0;
690 }
691
692 /*-------------------------------------------------------------------------*/
693
694 /* scan the periodic table to find and unlink this ED */
695 static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed,
696                             unsigned index, unsigned period)
697 {
698         for (; index < NUM_INTS; index += period) {
699                 __u32   *ed_p = &ohci->hcca->int_table [index];
700
701                 /* ED might have been unlinked through another path */
702                 while (*ed_p != 0) {
703                         if (((struct ed *)
704                                         m32_swap((unsigned long)ed_p)) == ed) {
705                                 *ed_p = ed->hwNextED;
706                                 break;
707                         }
708                         ed_p = &(((struct ed *)
709                                      m32_swap((unsigned long)ed_p))->hwNextED);
710                 }
711         }
712 }
713
714 /* unlink an ed from one of the HC chains.
715  * just the link to the ed is unlinked.
716  * the link from the ed still points to another operational ed or 0
717  * so the HC can eventually finish the processing of the unlinked ed */
718
719 static int ep_unlink(ohci_t *ohci, ed_t *edi)
720 {
721         volatile ed_t *ed = edi;
722         int i;
723
724         ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
725
726         switch (ed->type) {
727         case PIPE_CONTROL:
728                 if (ed->ed_prev == NULL) {
729                         if (!ed->hwNextED) {
730                                 ohci->hc_control &= ~OHCI_CTRL_CLE;
731                                 writel(ohci->hc_control, &ohci->regs->control);
732                         }
733                         writel(m32_swap(*((__u32 *)&ed->hwNextED)),
734                                 &ohci->regs->ed_controlhead);
735                 } else {
736                         ed->ed_prev->hwNextED = ed->hwNextED;
737                 }
738                 if (ohci->ed_controltail == ed) {
739                         ohci->ed_controltail = ed->ed_prev;
740                 } else {
741                         ((ed_t *)m32_swap(
742                             *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
743                 }
744                 break;
745
746         case PIPE_BULK:
747                 if (ed->ed_prev == NULL) {
748                         if (!ed->hwNextED) {
749                                 ohci->hc_control &= ~OHCI_CTRL_BLE;
750                                 writel(ohci->hc_control, &ohci->regs->control);
751                         }
752                         writel(m32_swap(*((__u32 *)&ed->hwNextED)),
753                                &ohci->regs->ed_bulkhead);
754                 } else {
755                         ed->ed_prev->hwNextED = ed->hwNextED;
756                 }
757                 if (ohci->ed_bulktail == ed) {
758                         ohci->ed_bulktail = ed->ed_prev;
759                 } else {
760                         ((ed_t *)m32_swap(
761                              *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
762                 }
763                 break;
764
765         case PIPE_INTERRUPT:
766                 periodic_unlink(ohci, ed, 0, 1);
767                 for (i = ed->int_branch; i < 32; i += ed->int_interval)
768                     ohci->ohci_int_load[i] -= ed->int_load;
769                 break;
770         }
771         ed->state = ED_UNLINK;
772         return 0;
773 }
774
775 /*-------------------------------------------------------------------------*/
776
777 /* add/reinit an endpoint; this should be done once at the
778  * usb_set_configuration command, but the USB stack is a little bit
779  * stateless so we do it at every transaction if the state of the ed
780  * is ED_NEW then a dummy td is added and the state is changed to
781  * ED_UNLINK in all other cases the state is left unchanged the ed
782  * info fields are setted anyway even though most of them should not
783  * change
784  */
785 static ed_t *ep_add_ed(struct usb_device *usb_dev, unsigned long pipe,
786                         int interval, int load)
787 {
788         td_t *td;
789         ed_t *ed_ret;
790         volatile ed_t *ed;
791
792         ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint(pipe) << 1) |
793                         (usb_pipecontrol(pipe)? 0: usb_pipeout(pipe))];
794
795         if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
796                 err("ep_add_ed: pending delete");
797                 /* pending delete request */
798                 return NULL;
799         }
800
801         if (ed->state == ED_NEW) {
802                 /* dummy td; end of td list for ed */
803                 td = td_alloc(usb_dev);
804                 ed->hwTailP = m32_swap((unsigned long)td);
805                 ed->hwHeadP = ed->hwTailP;
806                 ed->state = ED_UNLINK;
807                 ed->type = usb_pipetype(pipe);
808                 ohci_dev.ed_cnt++;
809         }
810
811         ed->hwINFO = m32_swap(usb_pipedevice(pipe)
812                         | usb_pipeendpoint(pipe) << 7
813                         | (usb_pipeisoc(pipe)? 0x8000: 0)
814                         | (usb_pipecontrol(pipe)? 0: \
815                                            (usb_pipeout(pipe)? 0x800: 0x1000))
816                         | usb_pipeslow(pipe) << 13
817                         | usb_maxpacket(usb_dev, pipe) << 16);
818
819         if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
820                 ed->int_period = interval;
821                 ed->int_load = load;
822         }
823
824         return ed_ret;
825 }
826
827 /*-------------------------------------------------------------------------*
828  * TD handling functions
829  *-------------------------------------------------------------------------*/
830
831 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
832
833 static void td_fill(ohci_t *ohci, unsigned int info,
834         void *data, int len,
835         struct usb_device *dev, int index, urb_priv_t *urb_priv)
836 {
837         volatile td_t  *td, *td_pt;
838 #ifdef OHCI_FILL_TRACE
839         int i;
840 #endif
841
842         if (index > urb_priv->length) {
843                 err("index > length");
844                 return;
845         }
846         /* use this td as the next dummy */
847         td_pt = urb_priv->td [index];
848         td_pt->hwNextTD = 0;
849
850         /* fill the old dummy TD */
851         td = urb_priv->td [index] =
852                              (td_t *)(m32_swap(urb_priv->ed->hwTailP) & ~0xf);
853
854         td->ed = urb_priv->ed;
855         td->next_dl_td = NULL;
856         td->index = index;
857         td->data = (__u32)data;
858 #ifdef OHCI_FILL_TRACE
859         if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
860                 for (i = 0; i < len; i++)
861                 printf("td->data[%d] %#2x ", i, ((unsigned char *)td->data)[i]);
862                 printf("\n");
863         }
864 #endif
865         if (!len)
866                 data = 0;
867
868         td->hwINFO = m32_swap(info);
869         td->hwCBP = m32_swap((unsigned long)data);
870         if (data)
871                 td->hwBE = m32_swap((unsigned long)(data + len - 1));
872         else
873                 td->hwBE = 0;
874
875         td->hwNextTD = m32_swap((unsigned long)td_pt);
876
877         /* append to queue */
878         td->ed->hwTailP = td->hwNextTD;
879 }
880
881 /*-------------------------------------------------------------------------*/
882
883 /* prepare all TDs of a transfer */
884
885 static void td_submit_job(struct usb_device *dev, unsigned long pipe,
886                           void *buffer, int transfer_len,
887                           struct devrequest *setup, urb_priv_t *urb,
888                           int interval)
889 {
890         ohci_t *ohci = &gohci;
891         int data_len = transfer_len;
892         void *data;
893         int cnt = 0;
894         __u32 info = 0;
895         unsigned int toggle = 0;
896
897         /* OHCI handles the DATA-toggles itself, we just use the USB-toggle
898          * bits for reseting */
899         if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
900                 toggle = TD_T_TOGGLE;
901         } else {
902                 toggle = TD_T_DATA0;
903                 usb_settoggle(dev, usb_pipeendpoint(pipe),
904                                 usb_pipeout(pipe), 1);
905         }
906         urb->td_cnt = 0;
907         if (data_len)
908                 data = buffer;
909         else
910                 data = 0;
911
912         switch (usb_pipetype(pipe)) {
913         case PIPE_BULK:
914                 info = usb_pipeout(pipe)?
915                         TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
916                 while (data_len > 4096) {
917                         td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle),
918                                 data, 4096, dev, cnt, urb);
919                         data += 4096; data_len -= 4096; cnt++;
920                 }
921                 info = usb_pipeout(pipe)?
922                         TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
923                 td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle), data,
924                         data_len, dev, cnt, urb);
925                 cnt++;
926
927                 if (!ohci->sleeping) {
928                         /* start bulk list */
929                         writel(OHCI_BLF, &ohci->regs->cmdstatus);
930                 }
931                 break;
932
933         case PIPE_CONTROL:
934                 /* Setup phase */
935                 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
936                 td_fill(ohci, info, setup, 8, dev, cnt++, urb);
937
938                 /* Optional Data phase */
939                 if (data_len > 0) {
940                         info = usb_pipeout(pipe)?
941                                 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 :
942                                 TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
943                         /* NOTE:  mishandles transfers >8K, some >4K */
944                         td_fill(ohci, info, data, data_len, dev, cnt++, urb);
945                 }
946
947                 /* Status phase */
948                 info = usb_pipeout(pipe)?
949                         TD_CC | TD_DP_IN | TD_T_DATA1:
950                         TD_CC | TD_DP_OUT | TD_T_DATA1;
951                 td_fill(ohci, info, data, 0, dev, cnt++, urb);
952
953                 if (!ohci->sleeping) {
954                         /* start Control list */
955                         writel(OHCI_CLF, &ohci->regs->cmdstatus);
956                 }
957                 break;
958
959         case PIPE_INTERRUPT:
960                 info = usb_pipeout(urb->pipe)?
961                         TD_CC | TD_DP_OUT | toggle:
962                         TD_CC | TD_R | TD_DP_IN | toggle;
963                 td_fill(ohci, info, data, data_len, dev, cnt++, urb);
964                 break;
965         }
966         if (urb->length != cnt)
967                 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
968 }
969
970 /*-------------------------------------------------------------------------*
971  * Done List handling functions
972  *-------------------------------------------------------------------------*/
973
974 /* calculate the transfer length and update the urb */
975
976 static void dl_transfer_length(td_t *td)
977 {
978         __u32 tdINFO, tdBE, tdCBP;
979         urb_priv_t *lurb_priv = td->ed->purb;
980
981         tdINFO = m32_swap(td->hwINFO);
982         tdBE   = m32_swap(td->hwBE);
983         tdCBP  = m32_swap(td->hwCBP);
984
985         if (!(usb_pipecontrol(lurb_priv->pipe) &&
986             ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
987                 if (tdBE != 0) {
988                         if (td->hwCBP == 0)
989                                 lurb_priv->actual_length += tdBE - td->data + 1;
990                         else
991                                 lurb_priv->actual_length += tdCBP - td->data;
992                 }
993         }
994 }
995
996 /*-------------------------------------------------------------------------*/
997 static void check_status(td_t *td_list)
998 {
999         urb_priv_t *lurb_priv = td_list->ed->purb;
1000         int        urb_len    = lurb_priv->length;
1001         __u32      *phwHeadP  = &td_list->ed->hwHeadP;
1002         int        cc;
1003
1004         cc = TD_CC_GET(m32_swap(td_list->hwINFO));
1005         if (cc) {
1006                 err(" USB-error: %s (%x)", cc_to_string[cc], cc);
1007
1008                 if (*phwHeadP & m32_swap(0x1)) {
1009                         if (lurb_priv &&
1010                             ((td_list->index + 1) < urb_len)) {
1011                                 *phwHeadP =
1012                                         (lurb_priv->td[urb_len - 1]->hwNextTD &\
1013                                                         m32_swap(0xfffffff0)) |
1014                                                    (*phwHeadP & m32_swap(0x2));
1015
1016                                 lurb_priv->td_cnt += urb_len -
1017                                                      td_list->index - 1;
1018                         } else
1019                                 *phwHeadP &= m32_swap(0xfffffff2);
1020                 }
1021 #ifdef CONFIG_MPC5200
1022                 td_list->hwNextTD = 0;
1023 #endif
1024         }
1025 }
1026
1027 /* replies to the request have to be on a FIFO basis so
1028  * we reverse the reversed done-list */
1029 static td_t *dl_reverse_done_list(ohci_t *ohci)
1030 {
1031         __u32 td_list_hc;
1032         td_t *td_rev = NULL;
1033         td_t *td_list = NULL;
1034
1035         td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0;
1036         ohci->hcca->done_head = 0;
1037
1038         while (td_list_hc) {
1039                 td_list = (td_t *)td_list_hc;
1040                 check_status(td_list);
1041                 td_list->next_dl_td = td_rev;
1042                 td_rev = td_list;
1043                 td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0;
1044         }
1045         return td_list;
1046 }
1047
1048 /*-------------------------------------------------------------------------*/
1049 /*-------------------------------------------------------------------------*/
1050
1051 static void finish_urb(ohci_t *ohci, urb_priv_t *urb, int status)
1052 {
1053         if ((status & (ED_OPER | ED_UNLINK)) && (urb->state != URB_DEL))
1054                 urb->finished = sohci_return_job(ohci, urb);
1055         else
1056                 dbg("finish_urb: strange.., ED state %x, \n", status);
1057 }
1058
1059 /*
1060  * Used to take back a TD from the host controller. This would normally be
1061  * called from within dl_done_list, however it may be called directly if the
1062  * HC no longer sees the TD and it has not appeared on the donelist (after
1063  * two frames).  This bug has been observed on ZF Micro systems.
1064  */
1065 static int takeback_td(ohci_t *ohci, td_t *td_list)
1066 {
1067         ed_t *ed;
1068         int cc;
1069         int stat = 0;
1070         /* urb_t *urb; */
1071         urb_priv_t *lurb_priv;
1072         __u32 tdINFO, edHeadP, edTailP;
1073
1074         tdINFO = m32_swap(td_list->hwINFO);
1075
1076         ed = td_list->ed;
1077         lurb_priv = ed->purb;
1078
1079         dl_transfer_length(td_list);
1080
1081         lurb_priv->td_cnt++;
1082
1083         /* error code of transfer */
1084         cc = TD_CC_GET(tdINFO);
1085         if (cc) {
1086                 err("USB-error: %s (%x)", cc_to_string[cc], cc);
1087                 stat = cc_to_error[cc];
1088         }
1089
1090         /* see if this done list makes for all TD's of current URB,
1091         * and mark the URB finished if so */
1092         if (lurb_priv->td_cnt == lurb_priv->length)
1093                 finish_urb(ohci, lurb_priv, ed->state);
1094
1095         dbg("dl_done_list: processing TD %x, len %x\n",
1096                 lurb_priv->td_cnt, lurb_priv->length);
1097
1098         if (ed->state != ED_NEW && (!usb_pipeint(lurb_priv->pipe))) {
1099                 edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0;
1100                 edTailP = m32_swap(ed->hwTailP);
1101
1102                 /* unlink eds if they are not busy */
1103                 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1104                         ep_unlink(ohci, ed);
1105         }
1106         return stat;
1107 }
1108
1109 static int dl_done_list(ohci_t *ohci)
1110 {
1111         int stat = 0;
1112         td_t    *td_list = dl_reverse_done_list(ohci);
1113
1114         while (td_list) {
1115                 td_t    *td_next = td_list->next_dl_td;
1116                 stat = takeback_td(ohci, td_list);
1117                 td_list = td_next;
1118         }
1119         return stat;
1120 }
1121
1122 /*-------------------------------------------------------------------------*
1123  * Virtual Root Hub
1124  *-------------------------------------------------------------------------*/
1125
1126 /* Device descriptor */
1127 static __u8 root_hub_dev_des[] =
1128 {
1129         0x12,       /*  __u8  bLength; */
1130         0x01,       /*  __u8  bDescriptorType; Device */
1131         0x10,       /*  __u16 bcdUSB; v1.1 */
1132         0x01,
1133         0x09,       /*  __u8  bDeviceClass; HUB_CLASSCODE */
1134         0x00,       /*  __u8  bDeviceSubClass; */
1135         0x00,       /*  __u8  bDeviceProtocol; */
1136         0x08,       /*  __u8  bMaxPacketSize0; 8 Bytes */
1137         0x00,       /*  __u16 idVendor; */
1138         0x00,
1139         0x00,       /*  __u16 idProduct; */
1140         0x00,
1141         0x00,       /*  __u16 bcdDevice; */
1142         0x00,
1143         0x00,       /*  __u8  iManufacturer; */
1144         0x01,       /*  __u8  iProduct; */
1145         0x00,       /*  __u8  iSerialNumber; */
1146         0x01        /*  __u8  bNumConfigurations; */
1147 };
1148
1149 /* Configuration descriptor */
1150 static __u8 root_hub_config_des[] =
1151 {
1152         0x09,       /*  __u8  bLength; */
1153         0x02,       /*  __u8  bDescriptorType; Configuration */
1154         0x19,       /*  __u16 wTotalLength; */
1155         0x00,
1156         0x01,       /*  __u8  bNumInterfaces; */
1157         0x01,       /*  __u8  bConfigurationValue; */
1158         0x00,       /*  __u8  iConfiguration; */
1159         0x40,       /*  __u8  bmAttributes;
1160          Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
1161         0x00,       /*  __u8  MaxPower; */
1162
1163         /* interface */
1164         0x09,       /*  __u8  if_bLength; */
1165         0x04,       /*  __u8  if_bDescriptorType; Interface */
1166         0x00,       /*  __u8  if_bInterfaceNumber; */
1167         0x00,       /*  __u8  if_bAlternateSetting; */
1168         0x01,       /*  __u8  if_bNumEndpoints; */
1169         0x09,       /*  __u8  if_bInterfaceClass; HUB_CLASSCODE */
1170         0x00,       /*  __u8  if_bInterfaceSubClass; */
1171         0x00,       /*  __u8  if_bInterfaceProtocol; */
1172         0x00,       /*  __u8  if_iInterface; */
1173
1174         /* endpoint */
1175         0x07,       /*  __u8  ep_bLength; */
1176         0x05,       /*  __u8  ep_bDescriptorType; Endpoint */
1177         0x81,       /*  __u8  ep_bEndpointAddress; IN Endpoint 1 */
1178         0x03,       /*  __u8  ep_bmAttributes; Interrupt */
1179         0x02,       /*  __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
1180         0x00,
1181         0xff        /*  __u8  ep_bInterval; 255 ms */
1182 };
1183
1184 static unsigned char root_hub_str_index0[] =
1185 {
1186         0x04,                   /*  __u8  bLength; */
1187         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
1188         0x09,                   /*  __u8  lang ID */
1189         0x04,                   /*  __u8  lang ID */
1190 };
1191
1192 static unsigned char root_hub_str_index1[] =
1193 {
1194         28,                     /*  __u8  bLength; */
1195         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
1196         'O',                    /*  __u8  Unicode */
1197         0,                              /*  __u8  Unicode */
1198         'H',                    /*  __u8  Unicode */
1199         0,                              /*  __u8  Unicode */
1200         'C',                    /*  __u8  Unicode */
1201         0,                              /*  __u8  Unicode */
1202         'I',                    /*  __u8  Unicode */
1203         0,                              /*  __u8  Unicode */
1204         ' ',                    /*  __u8  Unicode */
1205         0,                              /*  __u8  Unicode */
1206         'R',                    /*  __u8  Unicode */
1207         0,                              /*  __u8  Unicode */
1208         'o',                    /*  __u8  Unicode */
1209         0,                              /*  __u8  Unicode */
1210         'o',                    /*  __u8  Unicode */
1211         0,                              /*  __u8  Unicode */
1212         't',                    /*  __u8  Unicode */
1213         0,                              /*  __u8  Unicode */
1214         ' ',                    /*  __u8  Unicode */
1215         0,                              /*  __u8  Unicode */
1216         'H',                    /*  __u8  Unicode */
1217         0,                              /*  __u8  Unicode */
1218         'u',                    /*  __u8  Unicode */
1219         0,                              /*  __u8  Unicode */
1220         'b',                    /*  __u8  Unicode */
1221         0,                              /*  __u8  Unicode */
1222 };
1223
1224 /* Hub class-specific descriptor is constructed dynamically */
1225
1226 /*-------------------------------------------------------------------------*/
1227
1228 #define OK(x)                   len = (x); break
1229 #ifdef DEBUG
1230 #define WR_RH_STAT(x)           {info("WR:status %#8x", (x)); writel((x), \
1231                                                 &gohci.regs->roothub.status); }
1232 #define WR_RH_PORTSTAT(x)       {info("WR:portstatus[%d] %#8x", wIndex-1, \
1233                 (x)); writel((x), &gohci.regs->roothub.portstatus[wIndex-1]); }
1234 #else
1235 #define WR_RH_STAT(x)           writel((x), &gohci.regs->roothub.status)
1236 #define WR_RH_PORTSTAT(x)       writel((x), \
1237                                     &gohci.regs->roothub.portstatus[wIndex-1])
1238 #endif
1239 #define RD_RH_STAT              roothub_status(&gohci)
1240 #define RD_RH_PORTSTAT          roothub_portstatus(&gohci, wIndex-1)
1241
1242 /* request to virtual root hub */
1243
1244 int rh_check_port_status(ohci_t *controller)
1245 {
1246         __u32 temp, ndp, i;
1247         int res;
1248
1249         res = -1;
1250         temp = roothub_a(controller);
1251         ndp = (temp & RH_A_NDP);
1252 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1253         ndp = (ndp == 2) ? 1:0;
1254 #endif
1255         for (i = 0; i < ndp; i++) {
1256                 temp = roothub_portstatus(controller, i);
1257                 /* check for a device disconnect */
1258                 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1259                         (RH_PS_PESC | RH_PS_CSC)) &&
1260                         ((temp & RH_PS_CCS) == 0)) {
1261                         res = i;
1262                         break;
1263                 }
1264         }
1265         return res;
1266 }
1267
1268 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1269                 void *buffer, int transfer_len, struct devrequest *cmd)
1270 {
1271         void *data = buffer;
1272         int leni = transfer_len;
1273         int len = 0;
1274         int stat = 0;
1275         __u32 datab[4];
1276         __u8 *data_buf = (__u8 *)datab;
1277         __u16 bmRType_bReq;
1278         __u16 wValue;
1279         __u16 wIndex;
1280         __u16 wLength;
1281
1282 #ifdef DEBUG
1283 pkt_print(NULL, dev, pipe, buffer, transfer_len,
1284           cmd, "SUB(rh)", usb_pipein(pipe));
1285 #else
1286         wait_ms(1);
1287 #endif
1288         if (usb_pipeint(pipe)) {
1289                 info("Root-Hub submit IRQ: NOT implemented");
1290                 return 0;
1291         }
1292
1293         bmRType_bReq  = cmd->requesttype | (cmd->request << 8);
1294         wValue        = le16_to_cpu(cmd->value);
1295         wIndex        = le16_to_cpu(cmd->index);
1296         wLength       = le16_to_cpu(cmd->length);
1297
1298         info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1299                 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1300
1301         switch (bmRType_bReq) {
1302         /* Request Destination:
1303            without flags: Device,
1304            RH_INTERFACE: interface,
1305            RH_ENDPOINT: endpoint,
1306            RH_CLASS means HUB here,
1307            RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
1308         */
1309
1310         case RH_GET_STATUS:
1311                 *(__u16 *) data_buf = cpu_to_le16(1);
1312                 OK(2);
1313         case RH_GET_STATUS | RH_INTERFACE:
1314                 *(__u16 *) data_buf = cpu_to_le16(0);
1315                 OK(2);
1316         case RH_GET_STATUS | RH_ENDPOINT:
1317                 *(__u16 *) data_buf = cpu_to_le16(0);
1318                 OK(2);
1319         case RH_GET_STATUS | RH_CLASS:
1320                 *(__u32 *) data_buf = cpu_to_le32(
1321                                 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1322                 OK(4);
1323         case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1324                 *(__u32 *) data_buf = cpu_to_le32(RD_RH_PORTSTAT);
1325                 OK(4);
1326
1327         case RH_CLEAR_FEATURE | RH_ENDPOINT:
1328                 switch (wValue) {
1329                 case (RH_ENDPOINT_STALL):
1330                         OK(0);
1331                 }
1332                 break;
1333
1334         case RH_CLEAR_FEATURE | RH_CLASS:
1335                 switch (wValue) {
1336                 case RH_C_HUB_LOCAL_POWER:
1337                         OK(0);
1338                 case (RH_C_HUB_OVER_CURRENT):
1339                         WR_RH_STAT(RH_HS_OCIC);
1340                         OK(0);
1341                 }
1342                 break;
1343
1344         case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1345                 switch (wValue) {
1346                 case (RH_PORT_ENABLE):        WR_RH_PORTSTAT(RH_PS_CCS);  OK(0);
1347                 case (RH_PORT_SUSPEND):       WR_RH_PORTSTAT(RH_PS_POCI); OK(0);
1348                 case (RH_PORT_POWER):         WR_RH_PORTSTAT(RH_PS_LSDA); OK(0);
1349                 case (RH_C_PORT_CONNECTION):  WR_RH_PORTSTAT(RH_PS_CSC);  OK(0);
1350                 case (RH_C_PORT_ENABLE):      WR_RH_PORTSTAT(RH_PS_PESC); OK(0);
1351                 case (RH_C_PORT_SUSPEND):     WR_RH_PORTSTAT(RH_PS_PSSC); OK(0);
1352                 case (RH_C_PORT_OVER_CURRENT):WR_RH_PORTSTAT(RH_PS_OCIC); OK(0);
1353                 case (RH_C_PORT_RESET):       WR_RH_PORTSTAT(RH_PS_PRSC); OK(0);
1354                 }
1355                 break;
1356
1357         case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1358                 switch (wValue) {
1359                 case (RH_PORT_SUSPEND):
1360                         WR_RH_PORTSTAT(RH_PS_PSS);  OK(0);
1361                 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1362                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1363                                 WR_RH_PORTSTAT(RH_PS_PRS);
1364                         OK(0);
1365                 case (RH_PORT_POWER):
1366                         WR_RH_PORTSTAT(RH_PS_PPS);
1367                         wait_ms(100);
1368                         OK(0);
1369                 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1370                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1371                                 WR_RH_PORTSTAT(RH_PS_PES);
1372                         OK(0);
1373                 }
1374                 break;
1375
1376         case RH_SET_ADDRESS:
1377                 gohci.rh.devnum = wValue;
1378                 OK(0);
1379
1380         case RH_GET_DESCRIPTOR:
1381                 switch ((wValue & 0xff00) >> 8) {
1382                 case (0x01): /* device descriptor */
1383                         len = min_t(unsigned int,
1384                                         leni,
1385                                         min_t(unsigned int,
1386                                         sizeof(root_hub_dev_des),
1387                                         wLength));
1388                         data_buf = root_hub_dev_des; OK(len);
1389                 case (0x02): /* configuration descriptor */
1390                         len = min_t(unsigned int,
1391                                         leni,
1392                                         min_t(unsigned int,
1393                                         sizeof(root_hub_config_des),
1394                                         wLength));
1395                         data_buf = root_hub_config_des; OK(len);
1396                 case (0x03): /* string descriptors */
1397                         if (wValue == 0x0300) {
1398                                 len = min_t(unsigned int,
1399                                                 leni,
1400                                                 min_t(unsigned int,
1401                                                 sizeof(root_hub_str_index0),
1402                                                 wLength));
1403                                 data_buf = root_hub_str_index0;
1404                                 OK(len);
1405                         }
1406                         if (wValue == 0x0301) {
1407                                 len = min_t(unsigned int,
1408                                                 leni,
1409                                                 min_t(unsigned int,
1410                                                 sizeof(root_hub_str_index1),
1411                                                 wLength));
1412                                 data_buf = root_hub_str_index1;
1413                                 OK(len);
1414                 }
1415                 default:
1416                         stat = USB_ST_STALLED;
1417                 }
1418                 break;
1419
1420         case RH_GET_DESCRIPTOR | RH_CLASS:
1421         {
1422                 __u32 temp = roothub_a(&gohci);
1423
1424                 data_buf [0] = 9;               /* min length; */
1425                 data_buf [1] = 0x29;
1426                 data_buf [2] = temp & RH_A_NDP;
1427 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1428                 data_buf [2] = (data_buf [2] == 2) ? 1:0;
1429 #endif
1430                 data_buf [3] = 0;
1431                 if (temp & RH_A_PSM)    /* per-port power switching? */
1432                         data_buf [3] |= 0x1;
1433                 if (temp & RH_A_NOCP)   /* no overcurrent reporting? */
1434                         data_buf [3] |= 0x10;
1435                 else if (temp & RH_A_OCPM)/* per-port overcurrent reporting? */
1436                         data_buf [3] |= 0x8;
1437
1438                 /* corresponds to data_buf[4-7] */
1439                 datab [1] = 0;
1440                 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1441                 temp = roothub_b(&gohci);
1442                 data_buf [7] = temp & RH_B_DR;
1443                 if (data_buf [2] < 7) {
1444                         data_buf [8] = 0xff;
1445                 } else {
1446                         data_buf [0] += 2;
1447                         data_buf [8] = (temp & RH_B_DR) >> 8;
1448                         data_buf [10] = data_buf [9] = 0xff;
1449                 }
1450
1451                 len = min_t(unsigned int, leni,
1452                             min_t(unsigned int, data_buf [0], wLength));
1453                 OK(len);
1454         }
1455
1456         case RH_GET_CONFIGURATION:      *(__u8 *) data_buf = 0x01; OK(1);
1457
1458         case RH_SET_CONFIGURATION:      WR_RH_STAT(0x10000); OK(0);
1459
1460         default:
1461                 dbg("unsupported root hub command");
1462                 stat = USB_ST_STALLED;
1463         }
1464
1465 #ifdef  DEBUG
1466         ohci_dump_roothub(&gohci, 1);
1467 #else
1468         wait_ms(1);
1469 #endif
1470
1471         len = min_t(int, len, leni);
1472         if (data != data_buf)
1473             memcpy(data, data_buf, len);
1474         dev->act_len = len;
1475         dev->status = stat;
1476
1477 #ifdef DEBUG
1478         pkt_print(NULL, dev, pipe, buffer,
1479                   transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1480 #else
1481         wait_ms(1);
1482 #endif
1483
1484         return stat;
1485 }
1486
1487 /*-------------------------------------------------------------------------*/
1488
1489 /* common code for handling submit messages - used for all but root hub */
1490 /* accesses. */
1491 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1492                 int transfer_len, struct devrequest *setup, int interval)
1493 {
1494         int stat = 0;
1495         int maxsize = usb_maxpacket(dev, pipe);
1496         int timeout;
1497         urb_priv_t *urb;
1498
1499         urb = malloc(sizeof(urb_priv_t));
1500         memset(urb, 0, sizeof(urb_priv_t));
1501
1502         urb->dev = dev;
1503         urb->pipe = pipe;
1504         urb->transfer_buffer = buffer;
1505         urb->transfer_buffer_length = transfer_len;
1506         urb->interval = interval;
1507
1508         /* device pulled? Shortcut the action. */
1509         if (devgone == dev) {
1510                 dev->status = USB_ST_CRC_ERR;
1511                 return 0;
1512         }
1513
1514 #ifdef DEBUG
1515         urb->actual_length = 0;
1516         pkt_print(urb, dev, pipe, buffer, transfer_len,
1517                   setup, "SUB", usb_pipein(pipe));
1518 #else
1519         wait_ms(1);
1520 #endif
1521         if (!maxsize) {
1522                 err("submit_common_message: pipesize for pipe %lx is zero",
1523                         pipe);
1524                 return -1;
1525         }
1526
1527         if (sohci_submit_job(urb, setup) < 0) {
1528                 err("sohci_submit_job failed");
1529                 return -1;
1530         }
1531
1532 #if 0
1533         wait_ms(10);
1534         /* ohci_dump_status(&gohci); */
1535 #endif
1536
1537         /* allow more time for a BULK device to react - some are slow */
1538 #define BULK_TO  5000   /* timeout in milliseconds */
1539         if (usb_pipebulk(pipe))
1540                 timeout = BULK_TO;
1541         else
1542                 timeout = 100;
1543
1544         /* wait for it to complete */
1545         for (;;) {
1546                 /* check whether the controller is done */
1547                 stat = hc_interrupt();
1548                 if (stat < 0) {
1549                         stat = USB_ST_CRC_ERR;
1550                         break;
1551                 }
1552
1553                 /* NOTE: since we are not interrupt driven in U-Boot and always
1554                  * handle only one URB at a time, we cannot assume the
1555                  * transaction finished on the first successful return from
1556                  * hc_interrupt().. unless the flag for current URB is set,
1557                  * meaning that all TD's to/from device got actually
1558                  * transferred and processed. If the current URB is not
1559                  * finished we need to re-iterate this loop so as
1560                  * hc_interrupt() gets called again as there needs to be some
1561                  * more TD's to process still */
1562                 if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1563                         /* 0xff is returned for an SF-interrupt */
1564                         break;
1565                 }
1566
1567                 if (--timeout) {
1568                         wait_ms(1);
1569                         if (!urb->finished)
1570                                 dbg("*");
1571
1572                 } else {
1573                         err("CTL:TIMEOUT ");
1574                         dbg("submit_common_msg: TO status %x\n", stat);
1575                         urb->finished = 1;
1576                         stat = USB_ST_CRC_ERR;
1577                         break;
1578                 }
1579         }
1580
1581         dev->status = stat;
1582         dev->act_len = transfer_len;
1583
1584 #ifdef DEBUG
1585         pkt_print(urb, dev, pipe, buffer, transfer_len,
1586                   setup, "RET(ctlr)", usb_pipein(pipe));
1587 #else
1588         wait_ms(1);
1589 #endif
1590
1591         /* free TDs in urb_priv */
1592         if (!usb_pipeint(pipe))
1593                 urb_free_priv(urb);
1594         return 0;
1595 }
1596
1597 /* submit routines called from usb.c */
1598 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1599                 int transfer_len)
1600 {
1601         info("submit_bulk_msg");
1602         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1603 }
1604
1605 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1606                 int transfer_len, struct devrequest *setup)
1607 {
1608         int maxsize = usb_maxpacket(dev, pipe);
1609
1610         info("submit_control_msg");
1611 #ifdef DEBUG
1612         pkt_print(NULL, dev, pipe, buffer, transfer_len,
1613                   setup, "SUB", usb_pipein(pipe));
1614 #else
1615         wait_ms(1);
1616 #endif
1617         if (!maxsize) {
1618                 err("submit_control_message: pipesize for pipe %lx is zero",
1619                         pipe);
1620                 return -1;
1621         }
1622         if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1623                 gohci.rh.dev = dev;
1624                 /* root hub - redirect */
1625                 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1626                         setup);
1627         }
1628
1629         return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1630 }
1631
1632 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1633                 int transfer_len, int interval)
1634 {
1635         info("submit_int_msg");
1636         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL,
1637                         interval);
1638 }
1639
1640 /*-------------------------------------------------------------------------*
1641  * HC functions
1642  *-------------------------------------------------------------------------*/
1643
1644 /* reset the HC and BUS */
1645
1646 static int hc_reset(ohci_t *ohci)
1647 {
1648 #ifdef CONFIG_PCI_EHCI_DEVNO
1649         pci_dev_t pdev;
1650 #endif
1651         int timeout = 30;
1652         int smm_timeout = 50; /* 0,5 sec */
1653
1654         dbg("%s\n", __FUNCTION__);
1655
1656 #ifdef CONFIG_PCI_EHCI_DEVNO
1657         /*
1658          *  Some multi-function controllers (e.g. ISP1562) allow root hub
1659          * resetting via EHCI registers only.
1660          */
1661         pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVNO);
1662         if (pdev != -1) {
1663                 u32 base;
1664                 int timeout = 1000;
1665
1666                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1667                 writel(readl(base + EHCI_USBCMD_OFF) | EHCI_USBCMD_HCRESET,
1668                         base + EHCI_USBCMD_OFF);
1669
1670                 while (readl(base + EHCI_USBCMD_OFF) & EHCI_USBCMD_HCRESET) {
1671                         if (timeout-- <= 0) {
1672                                 printf("USB RootHub reset timed out!");
1673                                 break;
1674                         }
1675                         udelay(1);
1676                 }
1677         } else
1678                 printf("No EHCI func at %d index!\n", CONFIG_PCI_EHCI_DEVNO);
1679 #endif
1680         if (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1681                 /* SMM owns the HC */
1682                 writel(OHCI_OCR, &ohci->regs->cmdstatus);/* request ownership */
1683                 info("USB HC TakeOver from SMM");
1684                 while (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1685                         wait_ms(10);
1686                         if (--smm_timeout == 0) {
1687                                 err("USB HC TakeOver failed!");
1688                                 return -1;
1689                         }
1690                 }
1691         }
1692
1693         /* Disable HC interrupts */
1694         writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
1695
1696         dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1697                 ohci->slot_name,
1698                 readl(&ohci->regs->control));
1699
1700         /* Reset USB (needed by some controllers) */
1701         ohci->hc_control = 0;
1702         writel(ohci->hc_control, &ohci->regs->control);
1703
1704         /* HC Reset requires max 10 us delay */
1705         writel(OHCI_HCR,  &ohci->regs->cmdstatus);
1706         while ((readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1707                 if (--timeout == 0) {
1708                         err("USB HC reset timed out!");
1709                         return -1;
1710                 }
1711                 udelay(1);
1712         }
1713         return 0;
1714 }
1715
1716 /*-------------------------------------------------------------------------*/
1717
1718 /* Start an OHCI controller, set the BUS operational
1719  * enable interrupts
1720  * connect the virtual root hub */
1721
1722 static int hc_start(ohci_t *ohci)
1723 {
1724         __u32 mask;
1725         unsigned int fminterval;
1726
1727         ohci->disabled = 1;
1728
1729         /* Tell the controller where the control and bulk lists are
1730          * The lists are empty now. */
1731
1732         writel(0, &ohci->regs->ed_controlhead);
1733         writel(0, &ohci->regs->ed_bulkhead);
1734
1735         writel((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1736
1737         fminterval = 0x2edf;
1738         writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
1739         fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1740         writel(fminterval, &ohci->regs->fminterval);
1741         writel(0x628, &ohci->regs->lsthresh);
1742
1743         /* start controller operations */
1744         ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1745         ohci->disabled = 0;
1746         writel(ohci->hc_control, &ohci->regs->control);
1747
1748         /* disable all interrupts */
1749         mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1750                         OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1751                         OHCI_INTR_OC | OHCI_INTR_MIE);
1752         writel(mask, &ohci->regs->intrdisable);
1753         /* clear all interrupts */
1754         mask &= ~OHCI_INTR_MIE;
1755         writel(mask, &ohci->regs->intrstatus);
1756         /* Choose the interrupts we care about now  - but w/o MIE */
1757         mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1758         writel(mask, &ohci->regs->intrenable);
1759
1760 #ifdef  OHCI_USE_NPS
1761         /* required for AMD-756 and some Mac platforms */
1762         writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
1763                 &ohci->regs->roothub.a);
1764         writel(RH_HS_LPSC, &ohci->regs->roothub.status);
1765 #endif  /* OHCI_USE_NPS */
1766
1767 #define mdelay(n) ({unsigned long msec = (n); while (msec--) udelay(1000); })
1768         /* POTPGT delay is bits 24-31, in 2 ms units. */
1769         mdelay((roothub_a(ohci) >> 23) & 0x1fe);
1770
1771         /* connect the virtual root hub */
1772         ohci->rh.devnum = 0;
1773
1774         return 0;
1775 }
1776
1777 /*-------------------------------------------------------------------------*/
1778
1779 /* Poll USB interrupt. */
1780 void usb_event_poll(void)
1781 {
1782         hc_interrupt();
1783 }
1784
1785 /* an interrupt happens */
1786
1787 static int hc_interrupt(void)
1788 {
1789         ohci_t *ohci = &gohci;
1790         struct ohci_regs *regs = ohci->regs;
1791         int ints;
1792         int stat = -1;
1793
1794         if ((ohci->hcca->done_head != 0) &&
1795                                 !(m32_swap(ohci->hcca->done_head) & 0x01)) {
1796                 ints =  OHCI_INTR_WDH;
1797         } else {
1798                 ints = readl(&regs->intrstatus);
1799                 if (ints == ~(u32)0) {
1800                         ohci->disabled++;
1801                         err("%s device removed!", ohci->slot_name);
1802                         return -1;
1803                 } else {
1804                         ints &= readl(&regs->intrenable);
1805                         if (ints == 0) {
1806                                 dbg("hc_interrupt: returning..\n");
1807                                 return 0xff;
1808                         }
1809                 }
1810         }
1811
1812         /* dbg("Interrupt: %x frame: %x", ints,
1813                                         le16_to_cpu(ohci->hcca->frame_no)); */
1814
1815         if (ints & OHCI_INTR_RHSC)
1816                 stat = 0xff;
1817
1818         if (ints & OHCI_INTR_UE) {
1819                 ohci->disabled++;
1820                 err("OHCI Unrecoverable Error, controller usb-%s disabled",
1821                         ohci->slot_name);
1822                 /* e.g. due to PCI Master/Target Abort */
1823
1824 #ifdef  DEBUG
1825                 ohci_dump(ohci, 1);
1826 #else
1827                 wait_ms(1);
1828 #endif
1829                 /* FIXME: be optimistic, hope that bug won't repeat often. */
1830                 /* Make some non-interrupt context restart the controller. */
1831                 /* Count and limit the retries though; either hardware or */
1832                 /* software errors can go forever... */
1833                 hc_reset(ohci);
1834                 return -1;
1835         }
1836
1837         if (ints & OHCI_INTR_WDH) {
1838                 wait_ms(1);
1839                 writel(OHCI_INTR_WDH, &regs->intrdisable);
1840                 (void)readl(&regs->intrdisable); /* flush */
1841                 stat = dl_done_list(&gohci);
1842                 writel(OHCI_INTR_WDH, &regs->intrenable);
1843                 (void)readl(&regs->intrdisable); /* flush */
1844         }
1845
1846         if (ints & OHCI_INTR_SO) {
1847                 dbg("USB Schedule overrun\n");
1848                 writel(OHCI_INTR_SO, &regs->intrenable);
1849                 stat = -1;
1850         }
1851
1852         /* FIXME:  this assumes SOF (1/ms) interrupts don't get lost... */
1853         if (ints & OHCI_INTR_SF) {
1854                 unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
1855                 wait_ms(1);
1856                 writel(OHCI_INTR_SF, &regs->intrdisable);
1857                 if (ohci->ed_rm_list[frame] != NULL)
1858                         writel(OHCI_INTR_SF, &regs->intrenable);
1859                 stat = 0xff;
1860         }
1861
1862         writel(ints, &regs->intrstatus);
1863         return stat;
1864 }
1865
1866 /*-------------------------------------------------------------------------*/
1867
1868 /*-------------------------------------------------------------------------*/
1869
1870 /* De-allocate all resources.. */
1871
1872 static void hc_release_ohci(ohci_t *ohci)
1873 {
1874         dbg("USB HC release ohci usb-%s", ohci->slot_name);
1875
1876         if (!ohci->disabled)
1877                 hc_reset(ohci);
1878 }
1879
1880 /*-------------------------------------------------------------------------*/
1881
1882 /*
1883  * low level initalisation routine, called from usb.c
1884  */
1885 static char ohci_inited = 0;
1886
1887 int usb_lowlevel_init(void)
1888 {
1889 #ifdef CONFIG_PCI_OHCI
1890         pci_dev_t pdev;
1891 #endif
1892
1893 #ifdef CFG_USB_OHCI_CPU_INIT
1894         /* cpu dependant init */
1895         if (usb_cpu_init())
1896                 return -1;
1897 #endif
1898
1899 #ifdef CFG_USB_OHCI_BOARD_INIT
1900         /*  board dependant init */
1901         if (usb_board_init())
1902                 return -1;
1903 #endif
1904         memset(&gohci, 0, sizeof(ohci_t));
1905
1906         /* align the storage */
1907         if ((__u32)&ghcca[0] & 0xff) {
1908                 err("HCCA not aligned!!");
1909                 return -1;
1910         }
1911         phcca = &ghcca[0];
1912         info("aligned ghcca %p", phcca);
1913         memset(&ohci_dev, 0, sizeof(struct ohci_device));
1914         if ((__u32)&ohci_dev.ed[0] & 0x7) {
1915                 err("EDs not aligned!!");
1916                 return -1;
1917         }
1918         memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1919         if ((__u32)gtd & 0x7) {
1920                 err("TDs not aligned!!");
1921                 return -1;
1922         }
1923         ptd = gtd;
1924         gohci.hcca = phcca;
1925         memset(phcca, 0, sizeof(struct ohci_hcca));
1926
1927         gohci.disabled = 1;
1928         gohci.sleeping = 0;
1929         gohci.irq = -1;
1930 #ifdef CONFIG_PCI_OHCI
1931         pdev = pci_find_devices(ohci_pci_ids, CONFIG_PCI_OHCI_DEVNO);
1932
1933         if (pdev != -1) {
1934                 u16 vid, did;
1935                 u32 base;
1936                 pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
1937                 pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
1938                 printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
1939                                 vid, did, (pdev >> 16) & 0xff,
1940                                 (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
1941                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1942                 printf("OHCI regs address 0x%08x\n", base);
1943                 gohci.regs = (struct ohci_regs *)base;
1944         } else
1945                 return -1;
1946 #else
1947         gohci.regs = (struct ohci_regs *)CFG_USB_OHCI_REGS_BASE;
1948 #endif
1949
1950         gohci.flags = 0;
1951         gohci.slot_name = CFG_USB_OHCI_SLOT_NAME;
1952
1953         if (hc_reset(&gohci) < 0) {
1954                 hc_release_ohci(&gohci);
1955                 err("can't reset usb-%s", gohci.slot_name);
1956 #ifdef CFG_USB_OHCI_BOARD_INIT
1957                 /* board dependant cleanup */
1958                 usb_board_init_fail();
1959 #endif
1960
1961 #ifdef CFG_USB_OHCI_CPU_INIT
1962                 /* cpu dependant cleanup */
1963                 usb_cpu_init_fail();
1964 #endif
1965                 return -1;
1966         }
1967
1968         if (hc_start(&gohci) < 0) {
1969                 err("can't start usb-%s", gohci.slot_name);
1970                 hc_release_ohci(&gohci);
1971                 /* Initialization failed */
1972 #ifdef CFG_USB_OHCI_BOARD_INIT
1973                 /* board dependant cleanup */
1974                 usb_board_stop();
1975 #endif
1976
1977 #ifdef CFG_USB_OHCI_CPU_INIT
1978                 /* cpu dependant cleanup */
1979                 usb_cpu_stop();
1980 #endif
1981                 return -1;
1982         }
1983
1984 #ifdef  DEBUG
1985         ohci_dump(&gohci, 1);
1986 #else
1987         wait_ms(1);
1988 #endif
1989         ohci_inited = 1;
1990         return 0;
1991 }
1992
1993 int usb_lowlevel_stop(void)
1994 {
1995         /* this gets called really early - before the controller has */
1996         /* even been initialized! */
1997         if (!ohci_inited)
1998                 return 0;
1999         /* TODO release any interrupts, etc. */
2000         /* call hc_release_ohci() here ? */
2001         hc_reset(&gohci);
2002
2003 #ifdef CFG_USB_OHCI_BOARD_INIT
2004         /* board dependant cleanup */
2005         if (usb_board_stop())
2006                 return -1;
2007 #endif
2008
2009 #ifdef CFG_USB_OHCI_CPU_INIT
2010         /* cpu dependant cleanup */
2011         if (usb_cpu_stop())
2012                 return -1;
2013 #endif
2014         /* This driver is no longer initialised. It needs a new low-level
2015          * init (board/cpu) before it can be used again. */
2016         ohci_inited = 0;
2017         return 0;
2018 }
2019 #endif /* CONFIG_USB_OHCI_NEW */