2 * Copyright (C) 2012 Samsung Electronics
4 * Author: InKi Dae <inki.dae@samsung.com>
5 * Author: Donghwa Lee <dh09.lee@samsung.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #include <asm/arch/dsim.h>
25 #include <asm/arch/mipi_dsim.h>
26 #include <asm/arch/power.h>
27 #include <asm/arch/cpu.h>
29 #include "exynos_mipi_dsi_lowlevel.h"
30 #include "exynos_mipi_dsi_common.h"
32 void exynos_mipi_dsi_func_reset(struct mipi_dsim_device *dsim)
36 struct exynos_mipi_dsim *mipi_dsim =
37 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
39 reg = readl(&mipi_dsim->swrst);
43 writel(reg, &mipi_dsim->swrst);
46 void exynos_mipi_dsi_sw_reset(struct mipi_dsim_device *dsim)
50 struct exynos_mipi_dsim *mipi_dsim =
51 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
53 reg = readl(&mipi_dsim->swrst);
58 writel(reg, &mipi_dsim->swrst);
61 void exynos_mipi_dsi_sw_release(struct mipi_dsim_device *dsim)
63 struct exynos_mipi_dsim *mipi_dsim =
64 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
65 unsigned int reg = readl(&mipi_dsim->intsrc);
67 reg |= INTSRC_SWRST_RELEASE;
69 writel(reg, &mipi_dsim->intsrc);
72 void exynos_mipi_dsi_set_interrupt_mask(struct mipi_dsim_device *dsim,
73 unsigned int mode, unsigned int mask)
75 struct exynos_mipi_dsim *mipi_dsim =
76 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
77 unsigned int reg = readl(&mipi_dsim->intmsk);
84 writel(reg, &mipi_dsim->intmsk);
87 void exynos_mipi_dsi_init_fifo_pointer(struct mipi_dsim_device *dsim,
91 struct exynos_mipi_dsim *mipi_dsim =
92 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
94 reg = readl(&mipi_dsim->fifoctrl);
96 writel(reg & ~(cfg), &mipi_dsim->fifoctrl);
100 writel(reg, &mipi_dsim->fifoctrl);
104 * this function set PLL P, M and S value in D-PHY
106 void exynos_mipi_dsi_set_phy_tunning(struct mipi_dsim_device *dsim,
109 struct exynos_mipi_dsim *mipi_dsim =
110 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
112 writel(DSIM_AFC_CTL(value), &mipi_dsim->phyacchr);
115 void exynos_mipi_dsi_set_main_disp_resol(struct mipi_dsim_device *dsim,
116 unsigned int width_resol, unsigned int height_resol)
119 struct exynos_mipi_dsim *mipi_dsim =
120 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
122 /* standby should be set after configuration so set to not ready*/
123 reg = (readl(&mipi_dsim->mdresol)) & ~(DSIM_MAIN_STAND_BY);
124 writel(reg, &mipi_dsim->mdresol);
126 /* reset resolution */
127 reg &= ~(DSIM_MAIN_VRESOL(0x7ff) | DSIM_MAIN_HRESOL(0x7ff));
128 reg |= DSIM_MAIN_VRESOL(height_resol) | DSIM_MAIN_HRESOL(width_resol);
130 reg |= DSIM_MAIN_STAND_BY;
131 writel(reg, &mipi_dsim->mdresol);
134 void exynos_mipi_dsi_set_main_disp_vporch(struct mipi_dsim_device *dsim,
135 unsigned int cmd_allow, unsigned int vfront, unsigned int vback)
138 struct exynos_mipi_dsim *mipi_dsim =
139 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
141 reg = (readl(&mipi_dsim->mvporch)) &
142 ~((DSIM_CMD_ALLOW_MASK) | (DSIM_STABLE_VFP_MASK) |
143 (DSIM_MAIN_VBP_MASK));
145 reg |= ((cmd_allow & 0xf) << DSIM_CMD_ALLOW_SHIFT) |
146 ((vfront & 0x7ff) << DSIM_STABLE_VFP_SHIFT) |
147 ((vback & 0x7ff) << DSIM_MAIN_VBP_SHIFT);
149 writel(reg, &mipi_dsim->mvporch);
152 void exynos_mipi_dsi_set_main_disp_hporch(struct mipi_dsim_device *dsim,
153 unsigned int front, unsigned int back)
156 struct exynos_mipi_dsim *mipi_dsim =
157 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
159 reg = (readl(&mipi_dsim->mhporch)) &
160 ~((DSIM_MAIN_HFP_MASK) | (DSIM_MAIN_HBP_MASK));
162 reg |= (front << DSIM_MAIN_HFP_SHIFT) | (back << DSIM_MAIN_HBP_SHIFT);
164 writel(reg, &mipi_dsim->mhporch);
167 void exynos_mipi_dsi_set_main_disp_sync_area(struct mipi_dsim_device *dsim,
168 unsigned int vert, unsigned int hori)
171 struct exynos_mipi_dsim *mipi_dsim =
172 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
174 reg = (readl(&mipi_dsim->msync)) &
175 ~((DSIM_MAIN_VSA_MASK) | (DSIM_MAIN_HSA_MASK));
177 reg |= ((vert & 0x3ff) << DSIM_MAIN_VSA_SHIFT) |
178 (hori << DSIM_MAIN_HSA_SHIFT);
180 writel(reg, &mipi_dsim->msync);
183 void exynos_mipi_dsi_set_sub_disp_resol(struct mipi_dsim_device *dsim,
184 unsigned int vert, unsigned int hori)
187 struct exynos_mipi_dsim *mipi_dsim =
188 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
190 reg = (readl(&mipi_dsim->sdresol)) &
191 ~(DSIM_SUB_STANDY_MASK);
193 writel(reg, &mipi_dsim->sdresol);
195 reg &= ~(DSIM_SUB_VRESOL_MASK) | ~(DSIM_SUB_HRESOL_MASK);
196 reg |= ((vert & 0x7ff) << DSIM_SUB_VRESOL_SHIFT) |
197 ((hori & 0x7ff) << DSIM_SUB_HRESOL_SHIFT);
198 writel(reg, &mipi_dsim->sdresol);
201 reg |= (1 << DSIM_SUB_STANDY_SHIFT);
202 writel(reg, &mipi_dsim->sdresol);
205 void exynos_mipi_dsi_init_config(struct mipi_dsim_device *dsim)
207 struct mipi_dsim_config *dsim_config = dsim->dsim_config;
208 struct exynos_mipi_dsim *mipi_dsim =
209 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
210 unsigned int cfg = (readl(&mipi_dsim->config)) &
211 ~((1 << DSIM_EOT_PACKET_SHIFT) |
212 (0x1f << DSIM_HSA_MODE_SHIFT) |
213 (0x3 << DSIM_NUM_OF_DATALANE_SHIFT));
215 cfg |= (dsim_config->auto_flush << DSIM_AUTO_FLUSH_SHIFT) |
216 (dsim_config->eot_disable << DSIM_EOT_PACKET_SHIFT) |
217 (dsim_config->auto_vertical_cnt << DSIM_AUTO_MODE_SHIFT) |
218 (dsim_config->hse << DSIM_HSE_MODE_SHIFT) |
219 (dsim_config->hfp << DSIM_HFP_MODE_SHIFT) |
220 (dsim_config->hbp << DSIM_HBP_MODE_SHIFT) |
221 (dsim_config->hsa << DSIM_HSA_MODE_SHIFT) |
222 (dsim_config->e_no_data_lane << DSIM_NUM_OF_DATALANE_SHIFT);
224 writel(cfg, &mipi_dsim->config);
227 void exynos_mipi_dsi_display_config(struct mipi_dsim_device *dsim,
228 struct mipi_dsim_config *dsim_config)
230 struct exynos_mipi_dsim *mipi_dsim =
231 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
233 u32 reg = (readl(&mipi_dsim->config)) &
234 ~((0x3 << DSIM_BURST_MODE_SHIFT) | (1 << DSIM_VIDEO_MODE_SHIFT)
235 | (0x3 << DSIM_MAINVC_SHIFT) | (0x7 << DSIM_MAINPIX_SHIFT)
236 | (0x3 << DSIM_SUBVC_SHIFT) | (0x7 << DSIM_SUBPIX_SHIFT));
238 if (dsim_config->e_interface == DSIM_VIDEO)
239 reg |= (1 << DSIM_VIDEO_MODE_SHIFT);
240 else if (dsim_config->e_interface == DSIM_COMMAND)
241 reg &= ~(1 << DSIM_VIDEO_MODE_SHIFT);
243 printf("unknown lcd type.\n");
248 reg |= ((u8) (dsim_config->e_burst_mode) & 0x3) << DSIM_BURST_MODE_SHIFT
249 | ((u8) (dsim_config->e_virtual_ch) & 0x3) << DSIM_MAINVC_SHIFT
250 | ((u8) (dsim_config->e_pixel_format) & 0x7) << DSIM_MAINPIX_SHIFT;
252 writel(reg, &mipi_dsim->config);
255 void exynos_mipi_dsi_enable_lane(struct mipi_dsim_device *dsim,
256 unsigned int lane, unsigned int enable)
259 struct exynos_mipi_dsim *mipi_dsim =
260 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
262 reg = readl(&mipi_dsim->config);
265 reg |= DSIM_LANE_ENx(lane);
267 reg &= ~DSIM_LANE_ENx(lane);
269 writel(reg, &mipi_dsim->config);
272 void exynos_mipi_dsi_set_data_lane_number(struct mipi_dsim_device *dsim,
276 struct exynos_mipi_dsim *mipi_dsim =
277 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
279 /* get the data lane number. */
280 cfg = DSIM_NUM_OF_DATA_LANE(count);
282 writel(cfg, &mipi_dsim->config);
285 void exynos_mipi_dsi_enable_afc(struct mipi_dsim_device *dsim,
286 unsigned int enable, unsigned int afc_code)
288 struct exynos_mipi_dsim *mipi_dsim =
289 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
290 unsigned int reg = readl(&mipi_dsim->phyacchr);
296 reg &= ~(0x7 << DSIM_AFC_CTL_SHIFT);
297 reg |= DSIM_AFC_CTL(afc_code);
301 writel(reg, &mipi_dsim->phyacchr);
304 void exynos_mipi_dsi_enable_pll_bypass(struct mipi_dsim_device *dsim,
307 struct exynos_mipi_dsim *mipi_dsim =
308 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
309 unsigned int reg = (readl(&mipi_dsim->clkctrl)) &
310 ~(DSIM_PLL_BYPASS_EXTERNAL);
312 reg |= enable << DSIM_PLL_BYPASS_SHIFT;
314 writel(reg, &mipi_dsim->clkctrl);
317 void exynos_mipi_dsi_pll_freq_band(struct mipi_dsim_device *dsim,
318 unsigned int freq_band)
320 struct exynos_mipi_dsim *mipi_dsim =
321 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
322 unsigned int reg = (readl(&mipi_dsim->pllctrl)) &
323 ~(0x1f << DSIM_FREQ_BAND_SHIFT);
325 reg |= ((freq_band & 0x1f) << DSIM_FREQ_BAND_SHIFT);
327 writel(reg, &mipi_dsim->pllctrl);
330 void exynos_mipi_dsi_pll_freq(struct mipi_dsim_device *dsim,
331 unsigned int pre_divider, unsigned int main_divider,
334 struct exynos_mipi_dsim *mipi_dsim =
335 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
336 unsigned int reg = (readl(&mipi_dsim->pllctrl)) &
339 reg |= ((pre_divider & 0x3f) << DSIM_PREDIV_SHIFT) |
340 ((main_divider & 0x1ff) << DSIM_MAIN_SHIFT) |
341 ((scaler & 0x7) << DSIM_SCALER_SHIFT);
343 writel(reg, &mipi_dsim->pllctrl);
346 void exynos_mipi_dsi_pll_stable_time(struct mipi_dsim_device *dsim,
347 unsigned int lock_time)
349 struct exynos_mipi_dsim *mipi_dsim =
350 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
352 writel(lock_time, &mipi_dsim->plltmr);
355 void exynos_mipi_dsi_enable_pll(struct mipi_dsim_device *dsim,
358 struct exynos_mipi_dsim *mipi_dsim =
359 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
360 unsigned int reg = (readl(&mipi_dsim->pllctrl)) &
361 ~(0x1 << DSIM_PLL_EN_SHIFT);
363 reg |= ((enable & 0x1) << DSIM_PLL_EN_SHIFT);
365 writel(reg, &mipi_dsim->pllctrl);
368 void exynos_mipi_dsi_set_byte_clock_src(struct mipi_dsim_device *dsim,
371 struct exynos_mipi_dsim *mipi_dsim =
372 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
373 unsigned int reg = (readl(&mipi_dsim->clkctrl)) &
374 ~(0x3 << DSIM_BYTE_CLK_SRC_SHIFT);
376 reg |= ((unsigned int) src) << DSIM_BYTE_CLK_SRC_SHIFT;
378 writel(reg, &mipi_dsim->clkctrl);
381 void exynos_mipi_dsi_enable_byte_clock(struct mipi_dsim_device *dsim,
384 struct exynos_mipi_dsim *mipi_dsim =
385 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
386 unsigned int reg = (readl(&mipi_dsim->clkctrl)) &
387 ~(1 << DSIM_BYTE_CLKEN_SHIFT);
389 reg |= enable << DSIM_BYTE_CLKEN_SHIFT;
391 writel(reg, &mipi_dsim->clkctrl);
394 void exynos_mipi_dsi_set_esc_clk_prs(struct mipi_dsim_device *dsim,
395 unsigned int enable, unsigned int prs_val)
397 struct exynos_mipi_dsim *mipi_dsim =
398 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
399 unsigned int reg = (readl(&mipi_dsim->clkctrl)) &
400 ~((1 << DSIM_ESC_CLKEN_SHIFT) | (0xffff));
402 reg |= enable << DSIM_ESC_CLKEN_SHIFT;
406 writel(reg, &mipi_dsim->clkctrl);
409 void exynos_mipi_dsi_enable_esc_clk_on_lane(struct mipi_dsim_device *dsim,
410 unsigned int lane_sel, unsigned int enable)
412 struct exynos_mipi_dsim *mipi_dsim =
413 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
414 unsigned int reg = readl(&mipi_dsim->clkctrl);
417 reg |= DSIM_LANE_ESC_CLKEN(lane_sel);
419 reg &= ~DSIM_LANE_ESC_CLKEN(lane_sel);
421 writel(reg, &mipi_dsim->clkctrl);
424 void exynos_mipi_dsi_force_dphy_stop_state(struct mipi_dsim_device *dsim,
427 struct exynos_mipi_dsim *mipi_dsim =
428 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
429 unsigned int reg = (readl(&mipi_dsim->escmode)) &
430 ~(0x1 << DSIM_FORCE_STOP_STATE_SHIFT);
432 reg |= ((enable & 0x1) << DSIM_FORCE_STOP_STATE_SHIFT);
434 writel(reg, &mipi_dsim->escmode);
437 unsigned int exynos_mipi_dsi_is_lane_state(struct mipi_dsim_device *dsim)
439 struct exynos_mipi_dsim *mipi_dsim =
440 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
441 unsigned int reg = readl(&mipi_dsim->status);
444 * check clock and data lane states.
445 * if MIPI-DSI controller was enabled at bootloader then
446 * TX_READY_HS_CLK is enabled otherwise STOP_STATE_CLK.
447 * so it should be checked for two case.
449 if ((reg & DSIM_STOP_STATE_DAT(0xf)) &&
450 ((reg & DSIM_STOP_STATE_CLK) ||
451 (reg & DSIM_TX_READY_HS_CLK)))
457 void exynos_mipi_dsi_set_stop_state_counter(struct mipi_dsim_device *dsim,
458 unsigned int cnt_val)
460 struct exynos_mipi_dsim *mipi_dsim =
461 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
462 unsigned int reg = (readl(&mipi_dsim->escmode)) &
463 ~(0x7ff << DSIM_STOP_STATE_CNT_SHIFT);
465 reg |= ((cnt_val & 0x7ff) << DSIM_STOP_STATE_CNT_SHIFT);
467 writel(reg, &mipi_dsim->escmode);
470 void exynos_mipi_dsi_set_bta_timeout(struct mipi_dsim_device *dsim,
471 unsigned int timeout)
473 struct exynos_mipi_dsim *mipi_dsim =
474 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
475 unsigned int reg = (readl(&mipi_dsim->timeout)) &
476 ~(0xff << DSIM_BTA_TOUT_SHIFT);
478 reg |= (timeout << DSIM_BTA_TOUT_SHIFT);
480 writel(reg, &mipi_dsim->timeout);
483 void exynos_mipi_dsi_set_lpdr_timeout(struct mipi_dsim_device *dsim,
484 unsigned int timeout)
486 struct exynos_mipi_dsim *mipi_dsim =
487 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
488 unsigned int reg = (readl(&mipi_dsim->timeout)) &
489 ~(0xffff << DSIM_LPDR_TOUT_SHIFT);
491 reg |= (timeout << DSIM_LPDR_TOUT_SHIFT);
493 writel(reg, &mipi_dsim->timeout);
496 void exynos_mipi_dsi_set_cpu_transfer_mode(struct mipi_dsim_device *dsim,
499 struct exynos_mipi_dsim *mipi_dsim =
500 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
501 unsigned int reg = readl(&mipi_dsim->escmode);
503 reg &= ~DSIM_CMD_LPDT_LP;
506 reg |= DSIM_CMD_LPDT_LP;
508 writel(reg, &mipi_dsim->escmode);
511 void exynos_mipi_dsi_set_lcdc_transfer_mode(struct mipi_dsim_device *dsim,
514 struct exynos_mipi_dsim *mipi_dsim =
515 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
516 unsigned int reg = readl(&mipi_dsim->escmode);
518 reg &= ~DSIM_TX_LPDT_LP;
521 reg |= DSIM_TX_LPDT_LP;
523 writel(reg, &mipi_dsim->escmode);
526 void exynos_mipi_dsi_enable_hs_clock(struct mipi_dsim_device *dsim,
529 struct exynos_mipi_dsim *mipi_dsim =
530 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
531 unsigned int reg = (readl(&mipi_dsim->clkctrl)) &
532 ~(1 << DSIM_TX_REQUEST_HSCLK_SHIFT);
534 reg |= enable << DSIM_TX_REQUEST_HSCLK_SHIFT;
536 writel(reg, &mipi_dsim->clkctrl);
539 void exynos_mipi_dsi_dp_dn_swap(struct mipi_dsim_device *dsim,
540 unsigned int swap_en)
542 struct exynos_mipi_dsim *mipi_dsim =
543 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
544 unsigned int reg = readl(&mipi_dsim->phyacchr1);
546 reg &= ~(0x3 << DSIM_DPDN_SWAP_DATA_SHIFT);
547 reg |= (swap_en & 0x3) << DSIM_DPDN_SWAP_DATA_SHIFT;
549 writel(reg, &mipi_dsim->phyacchr1);
552 void exynos_mipi_dsi_hs_zero_ctrl(struct mipi_dsim_device *dsim,
553 unsigned int hs_zero)
555 struct exynos_mipi_dsim *mipi_dsim =
556 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
557 unsigned int reg = (readl(&mipi_dsim->pllctrl)) &
558 ~(0xf << DSIM_ZEROCTRL_SHIFT);
560 reg |= ((hs_zero & 0xf) << DSIM_ZEROCTRL_SHIFT);
562 writel(reg, &mipi_dsim->pllctrl);
565 void exynos_mipi_dsi_prep_ctrl(struct mipi_dsim_device *dsim, unsigned int prep)
567 struct exynos_mipi_dsim *mipi_dsim =
568 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
569 unsigned int reg = (readl(&mipi_dsim->pllctrl)) &
570 ~(0x7 << DSIM_PRECTRL_SHIFT);
572 reg |= ((prep & 0x7) << DSIM_PRECTRL_SHIFT);
574 writel(reg, &mipi_dsim->pllctrl);
577 void exynos_mipi_dsi_clear_interrupt(struct mipi_dsim_device *dsim)
579 struct exynos_mipi_dsim *mipi_dsim =
580 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
581 unsigned int reg = readl(&mipi_dsim->intsrc);
583 reg |= INTSRC_PLL_STABLE;
585 writel(reg, &mipi_dsim->intsrc);
588 void exynos_mipi_dsi_clear_all_interrupt(struct mipi_dsim_device *dsim)
590 struct exynos_mipi_dsim *mipi_dsim =
591 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
593 writel(0xffffffff, &mipi_dsim->intsrc);
596 unsigned int exynos_mipi_dsi_is_pll_stable(struct mipi_dsim_device *dsim)
599 struct exynos_mipi_dsim *mipi_dsim =
600 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
602 reg = readl(&mipi_dsim->status);
604 return reg & DSIM_PLL_STABLE ? 1 : 0;
607 unsigned int exynos_mipi_dsi_get_fifo_state(struct mipi_dsim_device *dsim)
609 struct exynos_mipi_dsim *mipi_dsim =
610 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
612 return readl(&mipi_dsim->fifoctrl) & ~(0x1f);
615 void exynos_mipi_dsi_wr_tx_header(struct mipi_dsim_device *dsim,
616 unsigned int di, unsigned int data0, unsigned int data1)
618 struct exynos_mipi_dsim *mipi_dsim =
619 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
620 unsigned int reg = (DSIM_PKTHDR_DAT1(data1) | DSIM_PKTHDR_DAT0(data0) |
623 writel(reg, &mipi_dsim->pkthdr);
626 unsigned int _exynos_mipi_dsi_get_frame_done_status(struct mipi_dsim_device
629 struct exynos_mipi_dsim *mipi_dsim =
630 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
631 unsigned int reg = readl(&mipi_dsim->intsrc);
633 return (reg & INTSRC_FRAME_DONE) ? 1 : 0;
636 void _exynos_mipi_dsi_clear_frame_done(struct mipi_dsim_device *dsim)
638 struct exynos_mipi_dsim *mipi_dsim =
639 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
640 unsigned int reg = readl(&mipi_dsim->intsrc);
642 writel(reg | INTSRC_FRAME_DONE, &mipi_dsim->intsrc);
645 void exynos_mipi_dsi_wr_tx_data(struct mipi_dsim_device *dsim,
646 unsigned int tx_data)
648 struct exynos_mipi_dsim *mipi_dsim =
649 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
651 writel(tx_data, &mipi_dsim->payload);