git.sur5r.net Git - u-boot/blob - drivers/video/mpc8xx_lcd.c

   1 /*
   2  * (C) Copyright 2001-2002
   3  * Wolfgang Denk, DENX Software Engineering -- wd@denx.de
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 /************************************************************************/
   9 /* ** HEADER FILES                                                      */
  10 /************************************************************************/
  11
  12 /* #define DEBUG */
  13
  14 #include <config.h>
  15 #include <common.h>
  16 #include <command.h>
  17 #include <watchdog.h>
  18 #include <stdarg.h>
  19 #include <lcdvideo.h>
  20 #include <linux/types.h>
  21 #include <stdio_dev.h>
  22 #if defined(CONFIG_POST)
  23 #include <post.h>
  24 #endif
  25 #include <lcd.h>
  26
  27 #ifdef CONFIG_LCD
  28
  29 /************************************************************************/
  30 /* ** CONFIG STUFF -- should be moved to board config file              */
  31 /************************************************************************/
  32 #ifndef CONFIG_LCD_INFO
  33 #define CONFIG_LCD_INFO         /* Display Logo, (C) and system info    */
  34 #endif
  35
  36 /*----------------------------------------------------------------------*/
  37 #ifdef CONFIG_KYOCERA_KCS057QV1AJ
  38 /*
  39  *  Kyocera KCS057QV1AJ-G23. Passive, color, single scan.
  40  */
  41 #define LCD_BPP LCD_COLOR4
  42
  43 vidinfo_t panel_info = {
  44     640, 480, 132, 99, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH,
  45     LCD_BPP, 1, 0, 1, 0,  5, 0, 0, 0
  46                 /* wbl, vpw, lcdac, wbf */
  47 };
  48 #endif /* CONFIG_KYOCERA_KCS057QV1AJ */
  49 /*----------------------------------------------------------------------*/
  50
  51 /*----------------------------------------------------------------------*/
  52 #ifdef CONFIG_HITACHI_SP19X001_Z1A
  53 /*
  54  *  Hitachi SP19X001-. Active, color, single scan.
  55  */
  56 vidinfo_t panel_info = {
  57     640, 480, 154, 116, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH,
  58     LCD_COLOR8, 1, 0, 1, 0, 0, 0, 0, 0
  59                 /* wbl, vpw, lcdac, wbf */
  60 };
  61 #endif /* CONFIG_HITACHI_SP19X001_Z1A */
  62 /*----------------------------------------------------------------------*/
  63
  64 /*----------------------------------------------------------------------*/
  65 #ifdef CONFIG_NEC_NL6448AC33
  66 /*
  67  *  NEC NL6448AC33-18. Active, color, single scan.
  68  */
  69 vidinfo_t panel_info = {
  70     640, 480, 132, 99, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_LOW, CONFIG_SYS_LOW, CONFIG_SYS_HIGH,
  71     3, 0, 0, 1, 1, 144, 2, 0, 33
  72                 /* wbl, vpw, lcdac, wbf */
  73 };
  74 #endif /* CONFIG_NEC_NL6448AC33 */
  75 /*----------------------------------------------------------------------*/
  76
  77 #ifdef CONFIG_NEC_NL6448BC20
  78 /*
  79  *  NEC NL6448BC20-08.  6.5", 640x480. Active, color, single scan.
  80  */
  81 vidinfo_t panel_info = {
  82     640, 480, 132, 99, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_LOW, CONFIG_SYS_LOW, CONFIG_SYS_HIGH,
  83     3, 0, 0, 1, 1, 144, 2, 0, 33
  84                 /* wbl, vpw, lcdac, wbf */
  85 };
  86 #endif /* CONFIG_NEC_NL6448BC20 */
  87 /*----------------------------------------------------------------------*/
  88
  89 #ifdef CONFIG_NEC_NL6448BC33_54
  90 /*
  91  *  NEC NL6448BC33-54. 10.4", 640x480. Active, color, single scan.
  92  */
  93 vidinfo_t panel_info = {
  94     640, 480, 212, 158, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_LOW, CONFIG_SYS_LOW, CONFIG_SYS_HIGH,
  95     3, 0, 0, 1, 1, 144, 2, 0, 33
  96                 /* wbl, vpw, lcdac, wbf */
  97 };
  98 #endif /* CONFIG_NEC_NL6448BC33_54 */
  99 /*----------------------------------------------------------------------*/
 100
 101 #ifdef CONFIG_SHARP_LQ104V7DS01
 102 /*
 103  *  SHARP LQ104V7DS01. 6.5", 640x480. Active, color, single scan.
 104  */
 105 vidinfo_t panel_info = {
 106     640, 480, 132, 99, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_LOW, CONFIG_SYS_LOW, CONFIG_SYS_LOW,
 107     3, 0, 0, 1, 1, 25, 1, 0, 33
 108                 /* wbl, vpw, lcdac, wbf */
 109 };
 110 #endif /* CONFIG_SHARP_LQ104V7DS01 */
 111 /*----------------------------------------------------------------------*/
 112
 113 #ifdef CONFIG_SHARP_16x9
 114 /*
 115  * Sharp 320x240. Active, color, single scan.  It isn't 16x9, and I am
 116  * not sure what it is.......
 117  */
 118 vidinfo_t panel_info = {
 119     320, 240, 0, 0, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH,
 120     3, 0, 0, 1, 1, 15, 4, 0, 3
 121 };
 122 #endif /* CONFIG_SHARP_16x9 */
 123 /*----------------------------------------------------------------------*/
 124
 125 #ifdef CONFIG_SHARP_LQ057Q3DC02
 126 /*
 127  * Sharp LQ057Q3DC02 display. Active, color, single scan.
 128  */
 129 #undef LCD_DF
 130 #define LCD_DF 12
 131
 132 vidinfo_t panel_info = {
 133     320, 240, 0, 0, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_LOW, CONFIG_SYS_LOW, CONFIG_SYS_HIGH,
 134     3, 0, 0, 1, 1, 15, 4, 0, 3
 135                 /* wbl, vpw, lcdac, wbf */
 136 };
 137 #define CONFIG_LCD_INFO_BELOW_LOGO
 138 #endif /* CONFIG_SHARP_LQ057Q3DC02 */
 139 /*----------------------------------------------------------------------*/
 140
 141 #ifdef CONFIG_SHARP_LQ64D341
 142 /*
 143  * Sharp LQ64D341 display, 640x480. Active, color, single scan.
 144  */
 145 vidinfo_t panel_info = {
 146     640, 480, 0, 0, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_LOW, CONFIG_SYS_LOW, CONFIG_SYS_HIGH,
 147     3, 0, 0, 1, 1, 128, 16, 0, 32
 148                 /* wbl, vpw, lcdac, wbf */
 149 };
 150 #endif /* CONFIG_SHARP_LQ64D341 */
 151
 152 #ifdef CONFIG_SHARP_LQ065T9DR51U
 153 /*
 154  * Sharp LQ065T9DR51U display, 400x240. Active, color, single scan.
 155  */
 156 vidinfo_t panel_info = {
 157     400, 240, 143, 79, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH,
 158     3, 0, 0, 1, 1, 248, 4, 0, 35
 159                 /* wbl, vpw, lcdac, wbf */
 160 };
 161 #define CONFIG_LCD_INFO_BELOW_LOGO
 162 #endif /* CONFIG_SHARP_LQ065T9DR51U */
 163
 164 #ifdef CONFIG_SHARP_LQ084V1DG21
 165 /*
 166  * Sharp LQ084V1DG21 display, 640x480. Active, color, single scan.
 167  */
 168 vidinfo_t panel_info = {
 169     640, 480, 171, 129, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_LOW, CONFIG_SYS_LOW, CONFIG_SYS_LOW,
 170     3, 0, 0, 1, 1, 160, 3, 0, 48
 171                 /* wbl, vpw, lcdac, wbf */
 172 };
 173 #endif /* CONFIG_SHARP_LQ084V1DG21 */
 174
 175 /*----------------------------------------------------------------------*/
 176
 177 #ifdef CONFIG_HLD1045
 178 /*
 179  * HLD1045 display, 640x480. Active, color, single scan.
 180  */
 181 vidinfo_t panel_info = {
 182     640, 480, 0, 0, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_LOW, CONFIG_SYS_LOW, CONFIG_SYS_HIGH,
 183     3, 0, 0, 1, 1, 160, 3, 0, 48
 184                 /* wbl, vpw, lcdac, wbf */
 185 };
 186 #endif /* CONFIG_HLD1045 */
 187 /*----------------------------------------------------------------------*/
 188
 189 #ifdef CONFIG_PRIMEVIEW_V16C6448AC
 190 /*
 191  * Prime View V16C6448AC
 192  */
 193 vidinfo_t panel_info = {
 194     640, 480, 130, 98, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_LOW, CONFIG_SYS_LOW, CONFIG_SYS_HIGH,
 195     3, 0, 0, 1, 1, 144, 2, 0, 35
 196                 /* wbl, vpw, lcdac, wbf */
 197 };
 198 #endif /* CONFIG_PRIMEVIEW_V16C6448AC */
 199
 200 /*----------------------------------------------------------------------*/
 201
 202 #ifdef CONFIG_OPTREX_BW
 203 /*
 204  * Optrex   CBL50840-2 NF-FW 99 22 M5
 205  * or
 206  * Hitachi  LMG6912RPFC-00T
 207  * or
 208  * Hitachi  SP14Q002
 209  *
 210  * 320x240. Black & white.
 211  */
 212 #define OPTREX_BPP      0       /* 0 - monochrome,     1 bpp */
 213                                 /* 1 -  4 grey levels, 2 bpp */
 214                                 /* 2 - 16 grey levels, 4 bpp */
 215 vidinfo_t panel_info = {
 216     320, 240, 0, 0, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_HIGH, CONFIG_SYS_LOW,
 217     OPTREX_BPP, 0, 0, 0, 0, 0, 0, 0, 0, 4
 218 };
 219 #endif /* CONFIG_OPTREX_BW */
 220
 221 /************************************************************************/
 222 /* ----------------- chipset specific functions ----------------------- */
 223 /************************************************************************/
 224
 225 /*
 226  * Calculate fb size for VIDEOLFB_ATAG.
 227  */
 228 ulong calc_fbsize (void)
 229 {
 230         ulong size;
 231         int line_length = (panel_info.vl_col * NBITS (panel_info.vl_bpix)) / 8;
 232
 233         size = line_length * panel_info.vl_row;
 234
 235         return size;
 236 }
 237
 238 void lcd_ctrl_init (void *lcdbase)
 239 {
 240         volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
 241         volatile lcd823_t *lcdp = &immr->im_lcd;
 242
 243         uint lccrtmp;
 244         uint lchcr_hpc_tmp;
 245
 246         /* Initialize the LCD control register according to the LCD
 247          * parameters defined.  We do everything here but enable
 248          * the controller.
 249          */
 250
 251         lccrtmp  = LCDBIT (LCCR_BNUM_BIT,
 252                    (((panel_info.vl_row * panel_info.vl_col) * (1 << LCD_BPP)) / 128));
 253
 254         lccrtmp |= LCDBIT (LCCR_CLKP_BIT, panel_info.vl_clkp)   |
 255                    LCDBIT (LCCR_OEP_BIT,  panel_info.vl_oep)    |
 256                    LCDBIT (LCCR_HSP_BIT,  panel_info.vl_hsp)    |
 257                    LCDBIT (LCCR_VSP_BIT,  panel_info.vl_vsp)    |
 258                    LCDBIT (LCCR_DP_BIT,   panel_info.vl_dp)     |
 259                    LCDBIT (LCCR_BPIX_BIT, panel_info.vl_bpix)   |
 260                    LCDBIT (LCCR_LBW_BIT,  panel_info.vl_lbw)    |
 261                    LCDBIT (LCCR_SPLT_BIT, panel_info.vl_splt)   |
 262                    LCDBIT (LCCR_CLOR_BIT, panel_info.vl_clor)   |
 263                    LCDBIT (LCCR_TFT_BIT,  panel_info.vl_tft);
 264
 265 #if 0
 266         lccrtmp |= ((SIU_LEVEL5 / 2) << 12);
 267         lccrtmp |= LCCR_EIEN;
 268 #endif
 269
 270         lcdp->lcd_lccr = lccrtmp;
 271         lcdp->lcd_lcsr = 0xFF;          /* Clear pending interrupts */
 272
 273         /* Initialize LCD controller bus priorities.
 274          */
 275         immr->im_siu_conf.sc_sdcr &= ~0x0f;     /* RAID = LAID = 0 */
 276
 277         /* set SHFT/CLOCK division factor 4
 278          * This needs to be set based upon display type and processor
 279          * speed.  The TFT displays run about 20 to 30 MHz.
 280          * I was running 64 MHz processor speed.
 281          * The value for this divider must be chosen so the result is
 282          * an integer of the processor speed (i.e., divide by 3 with
 283          * 64 MHz would be bad).
 284          */
 285         immr->im_clkrst.car_sccr &= ~0x1F;
 286         immr->im_clkrst.car_sccr |= LCD_DF;     /* was 8 */
 287
 288         /* Enable LCD on port D.
 289          */
 290         immr->im_ioport.iop_pdpar |= 0x1FFF;
 291         immr->im_ioport.iop_pddir |= 0x1FFF;
 292
 293         /* Enable LCD_A/B/C on port B.
 294          */
 295         immr->im_cpm.cp_pbpar |= 0x00005001;
 296         immr->im_cpm.cp_pbdir |= 0x00005001;
 297
 298         /* Load the physical address of the linear frame buffer
 299          * into the LCD controller.
 300          * BIG NOTE:  This has to be modified to load A and B depending
 301          * upon the split mode of the LCD.
 302          */
 303         lcdp->lcd_lcfaa = (ulong)lcdbase;
 304         lcdp->lcd_lcfba = (ulong)lcdbase;
 305
 306         /* MORE HACKS...This must be updated according to 823 manual
 307          * for different panels.
 308          * Udi Finkelstein - done - see below:
 309          * Note: You better not try unsupported combinations such as
 310          * 4-bit wide passive dual scan LCD at 4/8 Bit color.
 311          */
 312         lchcr_hpc_tmp =
 313                 (panel_info.vl_col *
 314                  (panel_info.vl_tft ? 8 :
 315                         (((2 - panel_info.vl_lbw) << /* 4 bit=2, 8-bit = 1 */
 316                          /* use << to mult by: single scan = 1, dual scan = 2 */
 317                           panel_info.vl_splt) *
 318                          (panel_info.vl_bpix | 1)))) >> 3; /* 2/4 BPP = 1, 8/16 BPP = 3 */
 319
 320         lcdp->lcd_lchcr = LCHCR_BO |
 321                           LCDBIT (LCHCR_AT_BIT, 4) |
 322                           LCDBIT (LCHCR_HPC_BIT, lchcr_hpc_tmp) |
 323                           panel_info.vl_wbl;
 324
 325         lcdp->lcd_lcvcr = LCDBIT (LCVCR_VPW_BIT, panel_info.vl_vpw) |
 326                           LCDBIT (LCVCR_LCD_AC_BIT, panel_info.vl_lcdac) |
 327                           LCDBIT (LCVCR_VPC_BIT, panel_info.vl_row) |
 328                           panel_info.vl_wbf;
 329
 330 }
 331
 332 /*----------------------------------------------------------------------*/
 333
 334 #if LCD_BPP == LCD_COLOR8
 335 void
 336 lcd_setcolreg (ushort regno, ushort red, ushort green, ushort blue)
 337 {
 338         volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
 339         volatile cpm8xx_t *cp = &(immr->im_cpm);
 340         unsigned short colreg, *cmap_ptr;
 341
 342         cmap_ptr = (unsigned short *)&cp->lcd_cmap[regno * 2];
 343
 344         colreg = ((red   & 0x0F) << 8) |
 345                  ((green & 0x0F) << 4) |
 346                   (blue  & 0x0F) ;
 347
 348         *cmap_ptr = colreg;
 349
 350         debug ("setcolreg: reg %2d @ %p: R=%02X G=%02X B=%02X => %02X%02X\n",
 351                 regno, &(cp->lcd_cmap[regno * 2]),
 352                 red, green, blue,
 353                 cp->lcd_cmap[ regno * 2 ], cp->lcd_cmap[(regno * 2) + 1]);
 354 }
 355 #endif  /* LCD_COLOR8 */
 356
 357 /*----------------------------------------------------------------------*/
 358
 359 ushort *configuration_get_cmap(void)
 360 {
 361         immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
 362         cpm8xx_t *cp = &(immr->im_cpm);
 363         return (ushort *)&(cp->lcd_cmap[255 * sizeof(ushort)]);
 364 }
 365
 366 #if defined(CONFIG_MPC823)
 367 void fb_put_byte(uchar **fb, uchar **from)
 368 {
 369         *(*fb)++ = (255 - *(*from)++);
 370 }
 371 #endif
 372
 373 #ifdef CONFIG_LCD_LOGO
 374 #include <bmp_logo.h>
 375 void lcd_logo_set_cmap(void)
 376 {
 377         int i;
 378         ushort *cmap;
 379         immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
 380         cpm8xx_t *cp = &(immr->im_cpm);
 381         cmap = (ushort *)&(cp->lcd_cmap[BMP_LOGO_OFFSET * sizeof(ushort)]);
 382
 383         for (i = 0; i < BMP_LOGO_COLORS; ++i)
 384                 *cmap++ = bmp_logo_palette[i];
 385 }
 386 #endif
 387
 388 void lcd_enable (void)
 389 {
 390         volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
 391         volatile lcd823_t *lcdp = &immr->im_lcd;
 392
 393         /* Enable the LCD panel */
 394         immr->im_siu_conf.sc_sdcr |= (1 << (31 - 25));          /* LAM = 1 */
 395         lcdp->lcd_lccr |= LCCR_PON;
 396 }
 397
 398 /************************************************************************/
 399
 400 #endif /* CONFIG_LCD */