2 * U-boot - blackfin_local.h
4 * Copyright (c) 2005-2007 Analog Devices Inc.
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
25 #ifndef __BLACKFIN_LOCAL_H__
26 #define __BLACKFIN_LOCAL_H__
28 #define LO(con32) ((con32) & 0xFFFF)
29 #define lo(con32) ((con32) & 0xFFFF)
30 #define HI(con32) (((con32) >> 16) & 0xFFFF)
31 #define hi(con32) (((con32) >> 16) & 0xFFFF)
33 #define OFFSET_(x) (x & 0x0000FFFF)
34 #define MK_BMSK_(x) (1 << x)
36 /* Ideally this should be USEC not MSEC, but the USEC multiplication
37 * likes to overflow 32bit quantities which is all our assembler
38 * currently supports ;(
40 #define USEC_PER_MSEC 1000
41 #define MSEC_PER_SEC 1000
42 #define BFIN_SCLK (100000000)
43 #define SCLK_TO_MSEC(sclk) ((MSEC_PER_SEC * ((sclk) / USEC_PER_MSEC)) / (BFIN_SCLK / USEC_PER_MSEC))
44 #define MSEC_TO_SCLK(msec) ((((BFIN_SCLK / USEC_PER_MSEC) * (msec)) / MSEC_PER_SEC) * USEC_PER_MSEC)
46 #define L1_CACHE_SHIFT 5
47 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
49 #include <asm/linkage.h>
52 # ifdef SHARED_RESOURCES
53 # include <asm/shared_resources.h>
56 # include <linux/types.h>
58 extern u_long get_vco(void);
59 extern u_long get_cclk(void);
60 extern u_long get_sclk(void);
62 # define bfin_revid() (*pCHIPID >> 28)
64 extern void blackfin_icache_flush_range(const void *, const void *);
65 extern void blackfin_dcache_flush_range(const void *, const void *);
66 extern void blackfin_icache_dcache_flush_range(const void *, const void *);
67 extern void blackfin_dcache_flush_invalidate_range(const void *, const void *);
69 /* Use DMA to move data from on chip to external memory. While this is
70 * required for only L1 instruction (it is not directly readable by the
71 * core via data loads), it isn't a huge performance issue for other
72 * regions (it's probably even faster than core load/stores). However,
73 * the DMA engine does not have access to the L1 scratchpad, and we
74 * cannot use DMA inside of the MMR space.
76 # define addr_bfin_on_chip_mem(addr) \
77 (((unsigned long)(addr) >= 0xef000000 && (unsigned long)addr < SYSMMR_BASE) && \
78 !((unsigned long)(addr) >= L1_SRAM_SCRATCH && \
79 (unsigned long)(addr) < L1_SRAM_SCRATCH_END))
81 # include <asm/system.h>
84 # define NOP_PAD_ANOMALY_05000198 "nop;"
86 # define NOP_PAD_ANOMALY_05000198
89 #define bfin_read8(addr) ({ \
91 __asm__ __volatile__( \
92 NOP_PAD_ANOMALY_05000198 \
99 #define bfin_read16(addr) ({ \
101 __asm__ __volatile__( \
102 NOP_PAD_ANOMALY_05000198 \
109 #define bfin_read32(addr) ({ \
111 __asm__ __volatile__( \
112 NOP_PAD_ANOMALY_05000198 \
119 #define bfin_readPTR(addr) bfin_read32(addr)
121 #define bfin_write8(addr, val) \
122 __asm__ __volatile__( \
123 NOP_PAD_ANOMALY_05000198 \
126 : "a" (addr), "d" (val) \
130 #define bfin_write16(addr, val) \
131 __asm__ __volatile__( \
132 NOP_PAD_ANOMALY_05000198 \
135 : "a" (addr), "d" (val) \
139 #define bfin_write32(addr, val) \
140 __asm__ __volatile__( \
141 NOP_PAD_ANOMALY_05000198 \
144 : "a" (addr), "d" (val) \
148 #define bfin_writePTR(addr, val) bfin_write32(addr, val)
150 /* SSYNC implementation for C file */
151 static inline void SSYNC(void)
154 if (ANOMALY_05000312)
155 __asm__ __volatile__(
163 else if (ANOMALY_05000244)
164 __asm__ __volatile__(
171 __asm__ __volatile__("ssync;");
174 /* CSYNC implementation for C file */
175 static inline void CSYNC(void)
178 if (ANOMALY_05000312)
179 __asm__ __volatile__(
187 else if (ANOMALY_05000244)
188 __asm__ __volatile__(
195 __asm__ __volatile__("csync;");
198 #else /* __ASSEMBLY__ */
200 /* SSYNC & CSYNC implementations for assembly files */
202 #define ssync(x) SSYNC(x)
203 #define csync(x) CSYNC(x)
206 #define SSYNC(scratch) cli scratch; nop; nop; SSYNC; sti scratch;
207 #define CSYNC(scratch) cli scratch; nop; nop; CSYNC; sti scratch;
209 #elif ANOMALY_05000244
210 #define SSYNC(scratch) nop; nop; nop; SSYNC;
211 #define CSYNC(scratch) nop; nop; nop; CSYNC;
214 #define SSYNC(scratch) SSYNC;
215 #define CSYNC(scratch) CSYNC;
217 #endif /* ANOMALY_05000312 & ANOMALY_05000244 handling */
219 #endif /* __ASSEMBLY__ */