5 #ifndef __BFIN_PERIPHERAL_UART__
6 #define __BFIN_PERIPHERAL_UART__
9 #define WLS 0x03 /* Word Length Select */
10 #define WLS_5 0x00 /* 5 bit word */
11 #define WLS_6 0x01 /* 6 bit word */
12 #define WLS_7 0x02 /* 7 bit word */
13 #define WLS_8 0x03 /* 8 bit word */
14 #define STB 0x04 /* Stop Bits */
15 #define PEN 0x08 /* Parity Enable */
16 #define EPS 0x10 /* Even Parity Select */
17 #define STP 0x20 /* Stick Parity */
18 #define SB 0x40 /* Set Break */
19 #define DLAB 0x80 /* Divisor Latch Access */
31 #define XOFF 0x01 /* Transmitter off */
32 #define MRTS 0x02 /* Manual Request to Send */
33 #define RFIT 0x04 /* Receive FIFO IRQ Threshold */
34 #define RFRT 0x08 /* Receive FIFO RTS Threshold */
35 #define LOOP_ENA 0x10 /* Loopback Mode Enable */
36 #define FCPOL 0x20 /* Flow Control Pin Polarity */
37 #define ARTS 0x40 /* Auto RTS generation for RX handshake */
38 #define ACTS 0x80 /* Auto CTS operation for TX handshake */
50 #define DR 0x01 /* Data Ready */
51 #define OE 0x02 /* Overrun Error */
52 #define PE 0x04 /* Parity Error */
53 #define FE 0x08 /* Framing Error */
54 #define BI 0x10 /* Break Interrupt */
55 #define THRE 0x20 /* THR Empty */
56 #define TEMT 0x40 /* TSR and UART_THR Empty */
67 #define ERBFI 0x01 /* Enable Receive Buffer Full Interrupt */
68 #define ETBEI 0x02 /* Enable Transmit Buffer Empty Interrupt */
69 #define ELSI 0x04 /* Enable RX Status Interrupt */
76 #define NINT 0x01 /* Pending Interrupt */
77 #define STATUS 0x06 /* Highest Priority Pending Interrupt */
80 #define STATUS_P0 0x01
81 #define STATUS_P1 0x02
83 /* UARTx_GCTL Masks */
84 #define UCEN 0x01 /* Enable UARTx Clocks */
85 #define IREN 0x02 /* Enable IrDA Mode */
86 #define TPOLC 0x04 /* IrDA TX Polarity Change */
87 #define RPOLC 0x08 /* IrDA RX Polarity Change */
88 #define FPE 0x10 /* Force Parity Error On Transmit */
89 #define FFE 0x20 /* Force Framing Error On Transmit */