2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1994 Waldorf GMBH
7 * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
8 * Copyright (C) 1996 Paul M. Antoine
9 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
11 #ifndef _ASM_PROCESSOR_H
12 #define _ASM_PROCESSOR_H
14 #include <linux/config.h>
16 #include <asm/isadep.h>
18 #include <asm/cachectl.h>
19 #include <asm/mipsregs.h>
21 #include <asm/system.h>
24 * Return current * instruction pointer ("program counter").
26 #define current_text_addr() ({ __label__ _l; _l: &&_l;})
29 * System setup and hardware flags..
31 extern void (*cpu_wait)(void);
33 extern unsigned int vced_count, vcei_count;
35 #define NUM_FPU_REGS 32
37 typedef __u64 fpureg_t;
40 * It would be nice to add some more fields for emulator statistics, but there
41 * are a number of fixed offsets in offset.h and elsewhere that would have to
42 * be recalculated by hand. So the additional information will be private to
43 * the FPU emulator for now. See asm-mips/fpu_emulator.h.
46 struct mips_fpu_struct {
47 fpureg_t fpr[NUM_FPU_REGS];
51 #define NUM_DSP_REGS 6
53 typedef __u32 dspreg_t;
55 struct mips_dsp_state {
56 dspreg_t dspr[NUM_DSP_REGS];
57 unsigned int dspcontrol;
64 #define ARCH_MIN_TASKALIGN 8
69 * If you change thread_struct remember to change the #defines below too!
71 struct thread_struct {
72 /* Saved main processor registers. */
74 unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;
75 unsigned long reg29, reg30, reg31;
77 /* Saved cp0 stuff. */
78 unsigned long cp0_status;
80 /* Saved fpu/fpu emulator stuff. */
81 struct mips_fpu_struct fpu;
82 #ifdef CONFIG_MIPS_MT_FPAFF
83 /* Emulated instruction count */
84 unsigned long emulated_fp;
85 /* Saved per-thread scheduler affinity mask */
86 cpumask_t user_cpus_allowed;
87 #endif /* CONFIG_MIPS_MT_FPAFF */
89 /* Saved state of the DSP ASE, if available. */
90 struct mips_dsp_state dsp;
92 /* Other stuff associated with the thread. */
93 unsigned long cp0_badvaddr; /* Last user fault */
94 unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */
95 unsigned long error_code;
96 unsigned long trap_no;
97 unsigned long irix_trampoline; /* Wheee... */
98 unsigned long irix_oldctx;
104 /* Free all resources held by a thread. */
105 #define release_thread(thread) do { } while(0)
107 /* Prepare to copy thread state - unlazy all lazy status */
108 #define prepare_to_copy(tsk) do { } while (0)
110 #define cpu_relax() barrier()
113 * Return_address is a replacement for __builtin_return_address(count)
114 * which on certain architectures cannot reasonably be implemented in GCC
115 * (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386).
116 * Note that __builtin_return_address(x>=1) is forbidden because GCC
117 * aborts compilation on some CPUs. It's simply not possible to unwind
118 * some CPU's stackframes.
120 * __builtin_return_address works only for non-leaf functions. We avoid the
121 * overhead of a function call by forcing the compiler to save the return
122 * address register on the stack.
124 #define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})
126 #ifdef CONFIG_CPU_HAS_PREFETCH
128 #define ARCH_HAS_PREFETCH
130 static inline void prefetch(const void *addr)
132 __asm__ __volatile__(
137 : "i" (Pref_Load), "r" (addr));
142 #endif /* _ASM_PROCESSOR_H */