2 * Configuation settings for the Freescale MCF5208EVBe.
4 * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * High Level Configuration Options
33 #define CONFIG_MCF520x /* define processor family */
34 #define CONFIG_M5208 /* define processor type */
36 #define CONFIG_MCFUART
37 #define CONFIG_SYS_UART_PORT (0)
38 #define CONFIG_BAUDRATE 115200
39 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
41 #undef CONFIG_WATCHDOG
42 #define CONFIG_WATCHDOG_TIMEOUT 5000
44 /* Command line configuration */
45 #include <config_cmd_default.h>
47 #define CONFIG_CMD_CACHE
48 #define CONFIG_CMD_ELF
49 #define CONFIG_CMD_FLASH
51 #define CONFIG_CMD_MEMORY
52 #define CONFIG_CMD_MISC
53 #define CONFIG_CMD_MII
54 #define CONFIG_CMD_NET
55 #define CONFIG_CMD_PING
56 #define CONFIG_CMD_REGINFO
61 # define CONFIG_MII_INIT 1
62 # define CONFIG_SYS_DISCOVER_PHY
63 # define CONFIG_SYS_RX_ETH_BUFFER 8
64 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
65 # define CONFIG_HAS_ETH1
67 # define CONFIG_SYS_FEC0_PINMUX 0
68 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
69 # define MCFFEC_TOUT_LOOP 50000
70 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
71 # ifndef CONFIG_SYS_DISCOVER_PHY
72 # define FECDUPLEX FULL
73 # define FECSPEED _100BASET
75 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
76 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
78 # endif /* CONFIG_SYS_DISCOVER_PHY */
86 #define CONFIG_FSL_I2C
87 #define CONFIG_HARD_I2C /* I2C with hw support */
88 #undef CONFIG_SOFT_I2C /* I2C bit-banged */
89 #define CONFIG_SYS_I2C_SPEED 80000
90 #define CONFIG_SYS_I2C_SLAVE 0x7F
91 #define CONFIG_SYS_I2C_OFFSET 0x58000
92 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
94 #define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */
95 #define CONFIG_UDP_CHECKSUM
98 # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
99 # define CONFIG_IPADDR 192.162.1.2
100 # define CONFIG_NETMASK 255.255.255.0
101 # define CONFIG_SERVERIP 192.162.1.1
102 # define CONFIG_GATEWAYIP 192.162.1.1
103 # define CONFIG_OVERWRITE_ETHADDR_ONCE
104 #endif /* CONFIG_MCFFEC */
106 #define CONFIG_HOSTNAME M5208EVBe
107 #define CONFIG_EXTRA_ENV_SETTINGS \
109 "loadaddr=40010000\0" \
110 "u-boot=u-boot.bin\0" \
111 "load=tftp ${loadaddr) ${u-boot}\0" \
112 "upd=run load; run prog\0" \
113 "prog=prot off 0 3ffff;" \
115 "cp.b ${loadaddr} 0 ${filesize};" \
119 #define CONFIG_PRAM 512 /* 512 KB */
120 #define CONFIG_SYS_PROMPT "-> "
121 #define CONFIG_SYS_LONGHELP /* undef to save memory */
123 #ifdef CONFIG_CMD_KGDB
124 # define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
126 # define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
129 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
130 #define CONFIG_SYS_MAXARGS 16 /* max number of cmd args */
131 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buf Sz */
132 #define CONFIG_SYS_LOAD_ADDR 0x40010000
134 #define CONFIG_SYS_HZ 1000
135 #define CONFIG_SYS_CLK 166666666 /* CPU Core Clock */
136 #define CONFIG_SYS_PLL_ODR 0x36
137 #define CONFIG_SYS_PLL_FDR 0x7D
139 #define CONFIG_SYS_MBAR 0xFC000000
142 * Low Level Configuration Settings
143 * (address mappings, register initial values, etc.)
144 * You should know what you are doing if you make changes here.
146 /* Definitions for initial stack pointer and data area (in DPRAM) */
147 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
148 #define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in internal SRAM */
149 #define CONFIG_SYS_INIT_RAM_CTRL 0x221
150 #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10)
151 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
154 * Start addresses for the final memory configuration
155 * (Set up by the startup code)
156 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
158 #define CONFIG_SYS_SDRAM_BASE 0x40000000
159 #define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */
160 #define CONFIG_SYS_SDRAM_CFG1 0x43711630
161 #define CONFIG_SYS_SDRAM_CFG2 0x56670000
162 #define CONFIG_SYS_SDRAM_CTRL 0xE1002000
163 #define CONFIG_SYS_SDRAM_EMOD 0x80010000
164 #define CONFIG_SYS_SDRAM_MODE 0x00CD0000
166 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400
167 #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
169 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
170 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
172 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
173 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
176 * For booting Linux, the board info and command line data
177 * have to be in the first 8 MB of memory, since this is
178 * the maximum mapped by the Linux kernel during initialization ??
180 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
181 #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
183 /* FLASH organization */
184 #define CONFIG_SYS_FLASH_CFI
185 #ifdef CONFIG_SYS_FLASH_CFI
186 # define CONFIG_FLASH_CFI_DRIVER 1
187 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */
188 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
189 # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
190 # define CONFIG_SYS_MAX_FLASH_SECT 254 /* max number of sectors on one chip */
191 # define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
194 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
197 * Configuration for environment
198 * Environment is embedded in u-boot in the second sector of the flash
200 #define CONFIG_ENV_OFFSET 0x2000
201 #define CONFIG_ENV_SIZE 0x1000
202 #define CONFIG_ENV_SECT_SIZE 0x2000
203 #define CONFIG_ENV_IS_IN_FLASH 1
205 /* Cache Configuration */
206 #define CONFIG_SYS_CACHELINE_SIZE 16
208 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
209 CONFIG_SYS_INIT_RAM_SIZE - 8)
210 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
211 CONFIG_SYS_INIT_RAM_SIZE - 4)
212 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
213 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
214 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
215 CF_ACR_EN | CF_ACR_SM_ALL)
216 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
217 CF_CACR_DISD | CF_CACR_INVI | \
218 CF_CACR_CEIB | CF_CACR_DCM | \
221 /* Chipselect bank definitions */
230 #define CONFIG_SYS_CS0_BASE 0
231 #define CONFIG_SYS_CS0_MASK 0x007F0001
232 #define CONFIG_SYS_CS0_CTRL 0x00001FA0
234 #endif /* _M5208EVBE_H */