2 * Configuation settings for the Freescale MCF5329 FireEngine board.
4 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
7 * SPDX-License-Identifier: GPL-2.0+
11 * board/config.h - configuration options, board specific
18 * High Level Configuration Options
21 #define CONFIG_MCF523x /* define processor family */
22 #define CONFIG_M5235 /* define processor type */
24 #define CONFIG_MCFUART
25 #define CONFIG_SYS_UART_PORT (0)
26 #define CONFIG_BAUDRATE 115200
28 #undef CONFIG_WATCHDOG
29 #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
34 #define CONFIG_BOOTP_BOOTFILESIZE
35 #define CONFIG_BOOTP_BOOTPATH
36 #define CONFIG_BOOTP_GATEWAY
37 #define CONFIG_BOOTP_HOSTNAME
39 /* Command line configuration */
40 #include <config_cmd_default.h>
42 #define CONFIG_CMD_BOOTD
43 #define CONFIG_CMD_CACHE
44 #define CONFIG_CMD_DHCP
45 #define CONFIG_CMD_ELF
46 #define CONFIG_CMD_FLASH
47 #define CONFIG_CMD_I2C
48 #define CONFIG_CMD_MEMORY
49 #define CONFIG_CMD_MISC
50 #define CONFIG_CMD_MII
51 #define CONFIG_CMD_NET
52 #define CONFIG_CMD_PCI
53 #define CONFIG_CMD_PING
54 #define CONFIG_CMD_REGINFO
56 #undef CONFIG_CMD_LOADB
57 #undef CONFIG_CMD_LOADS
62 # define CONFIG_MII_INIT 1
63 # define CONFIG_SYS_DISCOVER_PHY
64 # define CONFIG_SYS_RX_ETH_BUFFER 8
65 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
67 # define CONFIG_SYS_FEC0_PINMUX 0
68 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
69 # define MCFFEC_TOUT_LOOP 50000
70 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
71 # ifndef CONFIG_SYS_DISCOVER_PHY
72 # define FECDUPLEX FULL
73 # define FECSPEED _100BASET
75 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
76 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
78 # endif /* CONFIG_SYS_DISCOVER_PHY */
86 #define CONFIG_FSL_I2C
87 #define CONFIG_HARD_I2C /* I2C with hw support */
88 #undef CONFIG_SOFT_I2C /* I2C bit-banged */
89 #define CONFIG_SYS_I2C_SPEED 80000
90 #define CONFIG_SYS_I2C_SLAVE 0x7F
91 #define CONFIG_SYS_I2C_OFFSET 0x00000300
92 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
93 #define CONFIG_SYS_I2C_PINMUX_REG (gpio->par_qspi)
94 #define CONFIG_SYS_I2C_PINMUX_CLR ~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK)
95 #define CONFIG_SYS_I2C_PINMUX_SET (GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA)
97 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
98 #define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */
99 #define CONFIG_BOOTFILE "u-boot.bin"
101 # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
102 # define CONFIG_IPADDR 192.162.1.2
103 # define CONFIG_NETMASK 255.255.255.0
104 # define CONFIG_SERVERIP 192.162.1.1
105 # define CONFIG_GATEWAYIP 192.162.1.1
106 # define CONFIG_OVERWRITE_ETHADDR_ONCE
107 #endif /* FEC_ENET */
109 #define CONFIG_HOSTNAME M5235EVB
110 #define CONFIG_EXTRA_ENV_SETTINGS \
113 "u-boot=u-boot.bin\0" \
114 "load=tftp ${loadaddr) ${u-boot}\0" \
115 "upd=run load; run prog\0" \
116 "prog=prot off ffe00000 ffe3ffff;" \
117 "era ffe00000 ffe3ffff;" \
118 "cp.b ${loadaddr} ffe00000 ${filesize};"\
122 #define CONFIG_PRAM 512 /* 512 KB */
123 #define CONFIG_SYS_PROMPT "-> "
124 #define CONFIG_SYS_LONGHELP /* undef to save memory */
126 #if defined(CONFIG_KGDB)
127 # define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
129 # define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
132 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
133 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
134 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
135 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE+0x20000)
137 #define CONFIG_SYS_HZ 1000
138 #define CONFIG_SYS_CLK 75000000
139 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2
141 #define CONFIG_SYS_MBAR 0x40000000
144 * Low Level Configuration Settings
145 * (address mappings, register initial values, etc.)
146 * You should know what you are doing if you make changes here.
148 /*-----------------------------------------------------------------------
149 * Definitions for initial stack pointer and data area (in DPRAM)
151 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
152 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
153 #define CONFIG_SYS_INIT_RAM_CTRL 0x21
154 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE - 0x10)
155 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
157 /*-----------------------------------------------------------------------
158 * Start addresses for the final memory configuration
159 * (Set up by the startup code)
160 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
162 #define CONFIG_SYS_SDRAM_BASE 0x00000000
163 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
165 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400
166 #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
168 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
169 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
171 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
172 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
175 * For booting Linux, the board info and command line data
176 * have to be in the first 8 MB of memory, since this is
177 * the maximum mapped by the Linux kernel during initialization ??
179 /* Initial Memory map for Linux */
180 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
181 #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
183 /*-----------------------------------------------------------------------
186 #define CONFIG_SYS_FLASH_CFI
187 #ifdef CONFIG_SYS_FLASH_CFI
188 # define CONFIG_FLASH_CFI_DRIVER 1
189 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */
190 #ifdef NORFLASH_PS32BIT
191 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
193 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
195 # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
196 # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
197 # define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
200 #define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE)
202 /* Configuration for environment
203 * Environment is embedded in u-boot in the second sector of the flash
205 #define CONFIG_ENV_IS_IN_FLASH 1
206 #ifdef NORFLASH_PS32BIT
207 # define CONFIG_ENV_OFFSET (0x8000)
208 # define CONFIG_ENV_SIZE 0x4000
209 # define CONFIG_ENV_SECT_SIZE 0x4000
211 # define CONFIG_ENV_OFFSET (0x4000)
212 # define CONFIG_ENV_SIZE 0x2000
213 # define CONFIG_ENV_SECT_SIZE 0x2000
216 /*-----------------------------------------------------------------------
217 * Cache Configuration
219 #define CONFIG_SYS_CACHELINE_SIZE 16
221 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
222 CONFIG_SYS_INIT_RAM_SIZE - 8)
223 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
224 CONFIG_SYS_INIT_RAM_SIZE - 4)
225 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV)
226 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
227 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
228 CF_ACR_EN | CF_ACR_SM_ALL)
229 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \
230 CF_CACR_CEIB | CF_CACR_DCM | \
233 /*-----------------------------------------------------------------------
234 * Chipselect bank definitions
237 * CS0 - NOR Flash 1, 2, 4, or 8MB
246 #ifdef NORFLASH_PS32BIT
247 # define CONFIG_SYS_CS0_BASE 0xFFC00000
248 # define CONFIG_SYS_CS0_MASK 0x003f0001
249 # define CONFIG_SYS_CS0_CTRL 0x00001D00
251 # define CONFIG_SYS_CS0_BASE 0xFFE00000
252 # define CONFIG_SYS_CS0_MASK 0x001f0001
253 # define CONFIG_SYS_CS0_CTRL 0x00001D80
256 #endif /* _M5329EVB_H */