2 * Configuation settings for the Renesas Solutions Migo-R board
4 * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 * SPDX-License-Identifier: GPL-2.0+
12 #define CONFIG_CPU_SH7722 1
13 #define CONFIG_MIGO_R 1
15 #define CONFIG_DISPLAY_BOARDINFO
16 #undef CONFIG_SHOW_BOOT_PROGRESS
19 #define CONFIG_SMC91111
20 #define CONFIG_SMC91111_BASE (0xB0000000)
23 #define MIGO_R_SDRAM_BASE (0x8C000000)
24 #define MIGO_R_FLASH_BASE_1 (0xA0000000)
25 #define MIGO_R_FLASH_BANK_SIZE (64 * 1024 * 1024)
27 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000
28 #define CONFIG_SYS_LONGHELP /* undef to save memory */
29 #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
30 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */
33 #define CONFIG_CONS_SCIF0 1
35 #define CONFIG_SYS_MEMTEST_START (MIGO_R_SDRAM_BASE)
36 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
38 /* Enable alternate, more extensive, memory test */
39 #undef CONFIG_SYS_ALT_MEMTEST
40 /* Scratch address used by the alternate memory test */
41 #undef CONFIG_SYS_MEMTEST_SCRATCH
43 /* Enable temporary baudrate change while serial download */
44 #undef CONFIG_SYS_LOADS_BAUD_CHANGE
46 #define CONFIG_SYS_SDRAM_BASE (MIGO_R_SDRAM_BASE)
47 /* maybe more, but if so u-boot doesn't know about it... */
48 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
49 /* default load address for scripts ?!? */
50 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
52 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
53 #define CONFIG_SYS_MONITOR_BASE (MIGO_R_FLASH_BASE_1)
55 #define CONFIG_SYS_MONITOR_LEN (128 * 1024)
56 /* Size of DRAM reserved for malloc() use */
57 #define CONFIG_SYS_MALLOC_LEN (256 * 1024)
58 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
61 #define CONFIG_SYS_FLASH_CFI
62 #define CONFIG_FLASH_CFI_DRIVER
63 #undef CONFIG_SYS_FLASH_QUIET_TEST
64 /* print 'E' for empty sector on flinfo */
65 #define CONFIG_SYS_FLASH_EMPTY_INFO
66 /* Physical start address of Flash memory */
67 #define CONFIG_SYS_FLASH_BASE (MIGO_R_FLASH_BASE_1)
68 /* Max number of sectors on each Flash chip */
69 #define CONFIG_SYS_MAX_FLASH_SECT 512
71 /* if you use all NOR Flash , you change dip-switch. Please see MIGO_R01 Manual. */
72 #define CONFIG_SYS_MAX_FLASH_BANKS 1
73 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * MIGO_R_FLASH_BANK_SIZE) }
75 /* Timeout for Flash erase operations (in ms) */
76 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
77 /* Timeout for Flash write operations (in ms) */
78 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
79 /* Timeout for Flash set sector lock bit operations (in ms) */
80 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
81 /* Timeout for Flash clear lock bit operations (in ms) */
82 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
84 /* Use hardware flash sectors protection instead of U-Boot software protection */
85 #undef CONFIG_SYS_FLASH_PROTECTION
86 #undef CONFIG_SYS_DIRECT_FLASH_TFTP
89 #define CONFIG_ENV_OVERWRITE 1
90 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
91 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
92 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
93 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
94 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
95 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
98 #define CONFIG_SYS_CLK_FREQ 33333333
99 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
100 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
101 #define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
103 #endif /* __MIGO_R_H */