2 * (C) Copyright 2003-2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * (C) Copyright 2004-2006
6 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * High Level Configuration Options
35 #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
36 #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
37 #define CONFIG_TQM5200 1 /* ... on TQM5200 module */
38 #undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
40 /* On a Cameron or on a FO300 board or ... */
41 #if !defined(CONFIG_CAM5200) && !defined(CONFIG_FO300)
42 #define CONFIG_STK52XX 1 /* ... on a STK52XX board */
45 #define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
47 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
48 #define BOOTFLAG_WARM 0x02 /* Software reboot */
50 #define CONFIG_HIGH_BATS 1 /* High BATs supported */
53 * Serial console configuration
55 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
56 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
57 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
58 #define CONFIG_BOOTCOUNT_LIMIT 1
61 #define CFG_DEVICE_NULLDEV 1 /* enable null device */
62 #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
63 #define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
64 #define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
66 #define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
67 /* switch is closed */
70 #undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
72 #endif /* CONFIG_FO300 */
75 #define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
76 #define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
77 #define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
78 #define CONFIG_PS2MULT_DELAY (CFG_HZ/2) /* Initial delay */
79 #define CONFIG_BOARD_EARLY_INIT_R
80 #endif /* CONFIG_STK52XX */
84 * 0x40000000 - 0x4fffffff - PCI Memory
85 * 0x50000000 - 0x50ffffff - PCI IO Space
89 #define CONFIG_PCI_PNP 1
90 /* #define CONFIG_PCI_SCAN_SHOW 1 */
92 #define CONFIG_PCI_MEM_BUS 0x40000000
93 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
94 #define CONFIG_PCI_MEM_SIZE 0x10000000
96 #define CONFIG_PCI_IO_BUS 0x50000000
97 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
98 #define CONFIG_PCI_IO_SIZE 0x01000000
100 #define CONFIG_NET_MULTI 1
101 #define CONFIG_EEPRO100 1
102 #define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
103 #define CONFIG_NS8382X 1
104 #endif /* CONFIG_STK52XX */
109 #ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
111 #define CONFIG_VIDEO_SM501
112 #define CONFIG_VIDEO_SM501_32BPP
113 #define CONFIG_CFB_CONSOLE
114 #define CONFIG_VIDEO_LOGO
117 #define CONFIG_CONSOLE_EXTRA_INFO
119 #define CONFIG_VIDEO_BMP_LOGO
122 #define CONFIG_VGA_AS_SINGLE_DEVICE
123 #define CONFIG_VIDEO_SW_CURSOR
124 #define CONFIG_SPLASH_SCREEN
125 #define CFG_CONSOLE_IS_IN_ENV
126 #endif /* #ifndef CONFIG_TQM5200S */
130 #define CONFIG_MAC_PARTITION
131 #define CONFIG_DOS_PARTITION
132 #define CONFIG_ISO_PARTITION
135 #if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
136 #define CONFIG_USB_OHCI_NEW
137 #define CFG_OHCI_BE_CONTROLLER
138 #define CONFIG_USB_STORAGE
139 #define CONFIG_CMD_FAT
140 #define CONFIG_CMD_USB
142 #undef CFG_USB_OHCI_BOARD_INIT
143 #define CFG_USB_OHCI_CPU_INIT
144 #define CFG_USB_OHCI_REGS_BASE MPC5XXX_USB
145 #define CFG_USB_OHCI_SLOT_NAME "mpc5200"
146 #define CFG_USB_OHCI_MAX_ROOT_PORTS 15
150 #ifndef CONFIG_CAM5200
152 #define CONFIG_POST (CFG_POST_MEMORY | \
158 /* preserve space for the post_word at end of on-chip SRAM */
159 #define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
166 #define CONFIG_BOOTP_BOOTFILESIZE
167 #define CONFIG_BOOTP_BOOTPATH
168 #define CONFIG_BOOTP_GATEWAY
169 #define CONFIG_BOOTP_HOSTNAME
173 * Command line configuration.
175 #include <config_cmd_default.h>
177 #define CONFIG_CMD_ASKENV
178 #define CONFIG_CMD_DATE
179 #define CONFIG_CMD_DHCP
180 #define CONFIG_CMD_EEPROM
181 #define CONFIG_CMD_I2C
182 #define CONFIG_CMD_JFFS2
183 #define CONFIG_CMD_MII
184 #define CONFIG_CMD_NFS
185 #define CONFIG_CMD_PING
186 #define CONFIG_CMD_REGINFO
187 #define CONFIG_CMD_SNTP
188 #define CONFIG_CMD_BSP
191 #define CONFIG_CMD_BMP
195 #define CONFIG_CMD_PCI
196 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
199 #if defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
200 #define CONFIG_CMD_IDE
201 #define CONFIG_CMD_FAT
202 #define CONFIG_CMD_EXT2
205 #if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
206 #define CONFIG_CFG_USB
207 #define CONFIG_CFG_FAT
211 #define CONFIG_CMD_DIAG
215 #define CONFIG_TIMESTAMP /* display image timestamps */
217 #if (TEXT_BASE != 0xFFF00000)
218 # define CFG_LOWBOOT 1 /* Boot low */
224 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
226 #define CONFIG_PREBOOT "echo;" \
227 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
230 #undef CONFIG_BOOTARGS
232 #if defined(CONFIG_TQM5200_B) && !defined(CFG_LOWBOOT)
234 "update=protect off FFF00000 +${filesize};" \
235 "erase FFF00000 +${filesize};" \
236 "cp.b 200000 FFF00000 ${filesize};" \
237 "protect on FFF00000 +${filesize}\0"
238 #else /* default lowboot configuration */
240 "update=protect off FC000000 +${filesize};" \
241 "erase FC000000 +${filesize};" \
242 "cp.b 200000 FC000000 ${filesize};" \
243 "protect on FC000000 +${filesize}\0"
246 #if defined(CONFIG_TQM5200)
247 #define CUSTOM_ENV_SETTINGS \
248 "hostname=tqm5200\0" \
249 "bootfile=/tftpboot/tqm5200/uImage\0" \
250 "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \
251 "u-boot=/tftpboot/tqm5200/u-boot.bin\0"
252 #elif defined(CONFIG_CAM5200)
253 #define CUSTOM_ENV_SETTINGS \
254 "bootfile=cam5200/uImage\0" \
255 "u-boot=cam5200/u-boot.bin\0" \
256 "setup=tftp 200000 cam5200/setup.img; autoscr 200000\0"
259 #if defined(CONFIG_TQM5200_B)
260 #define ENV_FLASH_LAYOUT \
261 "fdt_addr=FC100000\0" \
262 "kernel_addr=FC140000\0" \
263 "ramdisk_addr=FC600000\0"
264 #else /* !CONFIG_TQM5200_B */
265 #define ENV_FLASH_LAYOUT \
266 "fdt_addr=FC0A0000\0" \
267 "kernel_addr=FC0C0000\0" \
268 "ramdisk_addr=FC300000\0"
271 #define CONFIG_EXTRA_ENV_SETTINGS \
273 "console=ttyPSC0\0" \
275 "kernel_addr_r=400000\0" \
276 "fdt_addr_r=600000\0" \
277 "rootpath=/opt/eldk/ppc_6xx\0" \
278 "ramargs=setenv bootargs root=/dev/ram rw\0" \
279 "nfsargs=setenv bootargs root=/dev/nfs rw " \
280 "nfsroot=${serverip}:${rootpath}\0" \
281 "addip=setenv bootargs ${bootargs} " \
282 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
283 ":${hostname}:${netdev}:off panic=1\0" \
284 "addcons=setenv bootargs ${bootargs} " \
285 "console=${console},${baudrate}\0" \
286 "flash_self_old=sete console ttyS0; run ramargs addip addcons;" \
287 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
288 "flash_self=run ramargs addip addcons;" \
289 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
290 "flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \
291 "bootm ${kernel_addr}\0" \
292 "flash_nfs=run nfsargs addip addcons;" \
293 "bootm ${kernel_addr} - ${fdt_addr}\0" \
294 "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
295 "sete console ttyS0; run nfsargs addip addcons;bootm\0" \
296 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
297 "tftp ${fdt_addr_r} ${fdt_file}; " \
298 "run nfsargs addip addcons; " \
299 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
300 CUSTOM_ENV_SETTINGS \
301 "load=tftp 200000 ${u-boot}\0" \
305 #define CONFIG_BOOTCOMMAND "run net_nfs"
308 * IPB Bus clocking configuration.
310 #define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
312 #if defined(CFG_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
314 * PCI Bus clocking configuration
316 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
317 * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
318 * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
320 #define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
326 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
327 #ifdef CONFIG_TQM5200_REV100
328 #define CFG_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
330 #define CFG_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
334 * I2C clock frequency
336 * Please notice, that the resulting clock frequency could differ from the
337 * configured value. This is because the I2C clock is derived from system
338 * clock over a frequency divider with only a few divider values. U-boot
339 * calculates the best approximation for CFG_I2C_SPEED. However the calculated
340 * approximation allways lies below the configured value, never above.
342 #define CFG_I2C_SPEED 100000 /* 100 kHz */
343 #define CFG_I2C_SLAVE 0x7F
346 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
347 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
348 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
349 * same configuration could be used.
351 #define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
352 #define CFG_I2C_EEPROM_ADDR_LEN 2
353 #define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
354 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
357 * HW-Monitor configuration on Mini-FAP
359 #if defined (CONFIG_MINIFAP)
360 #define CFG_I2C_HWMON_ADDR 0x2C
363 /* List of I2C addresses to be verified by POST */
364 #if defined (CONFIG_MINIFAP)
366 #define I2C_ADDR_LIST { CFG_I2C_EEPROM_ADDR, \
367 CFG_I2C_HWMON_ADDR, \
372 * Flash configuration
374 #define CFG_FLASH_BASE 0xFC000000
376 #if defined(CONFIG_CAM5200) && defined(CONFIG_CAM5200_NIOSFLASH)
377 #define CFG_MAX_FLASH_BANKS 2 /* max num of flash banks
379 #define CFG_FLASH_WORD_SIZE unsigned int /* main flash device with */
380 #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
381 #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
383 #define CFG_FLASH_ADDR0 0x555
384 #define CFG_FLASH_ADDR1 0x2AA
385 #define CFG_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
386 #define CFG_MAX_FLASH_SECT 128
388 /* use CFI flash driver */
389 #define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
390 #define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
391 #define CFG_FLASH_BANKS_LIST { CFG_BOOTCS_START }
392 #define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks
394 #define CFG_MAX_FLASH_SECT 512 /* max num of sects on one chip */
397 #define CFG_FLASH_EMPTY_INFO
398 #define CFG_FLASH_SIZE 0x04000000 /* 64 MByte */
399 #define CFG_FLASH_USE_BUFFER_WRITE 1
401 #if defined (CONFIG_CAM5200)
402 # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00040000)
403 #elif defined(CONFIG_TQM5200_B)
404 # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00080000)
406 # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00060000)
409 /* Dynamic MTD partition support */
410 #define CONFIG_JFFS2_CMDLINE
411 #define MTDIDS_DEFAULT "nor0=TQM5200-0"
413 #ifdef CONFIG_STK52XX
414 # if defined(CONFIG_TQM5200_B)
415 # if defined(CFG_LOWBOOT)
416 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:1m(firmware)," \
423 # else /* highboot */
424 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:2560k(kernel)," \
430 # endif /* CFG_LOWBOOT */
431 # else /* !CONFIG_TQM5200_B */
432 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
439 # endif /* CONFIG_TQM5200_B */
440 #elif defined (CONFIG_CAM5200)
441 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:768k(firmware)," \
445 #elif defined (CONFIG_FO300)
446 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
453 # error "Unknown Carrier Board"
454 #endif /* CONFIG_STK52XX */
457 * Environment settings
459 #define CFG_ENV_IS_IN_FLASH 1
460 #define CFG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
461 #if defined(CONFIG_TQM5200_B) || defined (CONFIG_CAM5200)
462 #define CFG_ENV_SECT_SIZE 0x40000
464 #define CFG_ENV_SECT_SIZE 0x20000
465 #endif /* CONFIG_TQM5200_B */
466 #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
467 #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
472 #define CFG_MBAR 0xF0000000
473 #define CFG_SDRAM_BASE 0x00000000
474 #define CFG_DEFAULT_MBAR 0x80000000
476 /* Use ON-Chip SRAM until RAM will be available */
477 #define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
479 /* preserve space for the post_word at end of on-chip SRAM */
480 #define CFG_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
482 #define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
486 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
487 #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
488 #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
490 #define CFG_MONITOR_BASE TEXT_BASE
491 #if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
492 # define CFG_RAMBOOT 1
495 #if defined (CONFIG_CAM5200)
496 # define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
497 #elif defined(CONFIG_TQM5200_B)
498 # define CFG_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
500 # define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
503 #define CFG_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
504 #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
507 * Ethernet configuration
509 #define CONFIG_MPC5xxx_FEC 1
511 * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
513 /* #define CONFIG_FEC_10MBIT 1 */
514 #define CONFIG_PHY_ADDR 0x00
519 * use CS1: Bit 0 (mask: 0x80000000):
520 * 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
521 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
522 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
523 * SPI on PSC3 according to PSC3 setting. Use for CAM5200.
524 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
525 * Use for REV200 STK52XX boards and FO300 boards. Do not use
526 * with REV100 modules (because, there I2C1 is used as I2C bus).
527 * use ATA: Bits 6-7 (mask 0x03000000):
528 * 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
529 * Use for CAM5200 board.
530 * 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
531 * use PSC6: Bits 9-11 (mask 0x00700000):
532 * 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
533 * UART, CODEC or IrDA.
534 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to
535 * enable extended POST tests.
536 * Use for MINI-FAP and TQM5200_IB boards.
537 * 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
538 * Extended POST test is not available.
539 * Use for STK52xx, FO300 and CAM5200 boards.
540 * use PCI_DIS: Bit 16 (mask 0x00008000):
541 * 1 -> disable PCI controller (on CAM5200 board).
542 * use USB: Bits 18-19 (mask 0x00003000):
543 * 10 -> two UARTs (on FO300 and CAM5200).
544 * use PSC3: Bits 20-23 (mask: 0x00000f00):
545 * 0000 -> All PSC3 pins are GPIOs.
546 * 1100 -> UART/SPI (on FO300 board).
547 * 0100 -> UART (on CAM5200 board).
548 * use PSC2: Bits 25:27 (mask: 0x00000030):
549 * 000 -> All PSC2 pins are GPIOs.
550 * 100 -> UART (on CAM5200 board).
551 * 001 -> CAN1/2 on PSC2 pins.
552 * Use for REV100 STK52xx boards
553 * 01x -> Use AC97 (on FO300 board).
554 * use PSC1: Bits 29-31 (mask: 0x00000007):
555 * 100 -> UART (on all boards).
557 #if defined (CONFIG_MINIFAP)
558 # define CFG_GPS_PORT_CONFIG 0x91000004
559 #elif defined (CONFIG_STK52XX)
560 # if defined (CONFIG_STK52XX_REV100)
561 # define CFG_GPS_PORT_CONFIG 0x81500014
562 # else /* STK52xx REV200 and above */
563 # if defined (CONFIG_TQM5200_REV100)
564 # error TQM5200 REV100 not supported on STK52XX REV200 or above
565 # else/* TQM5200 REV200 and above */
566 # define CFG_GPS_PORT_CONFIG 0x91500404
569 #elif defined (CONFIG_FO300)
570 # define CFG_GPS_PORT_CONFIG 0x91502c24
571 #elif defined (CONFIG_CAM5200)
572 # define CFG_GPS_PORT_CONFIG 0x8050A444
573 #else /* TMQ5200 Inbetriebnahme-Board */
574 # define CFG_GPS_PORT_CONFIG 0x81000004
580 #if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
581 # define CONFIG_RTC_M41T11 1
582 # define CFG_I2C_RTC_ADDR 0x68
583 # define CFG_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
586 # define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
590 * Miscellaneous configurable options
592 #define CFG_LONGHELP /* undef to save memory */
593 #define CFG_PROMPT "=> " /* Monitor Command Prompt */
595 #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
596 #define CFG_HUSH_PARSER 1 /* use "hush" command parser */
597 #define CFG_PROMPT_HUSH_PS2 "> "
599 #define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
600 #if defined(CONFIG_CMD_KGDB)
601 #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
604 #if defined(CONFIG_CMD_KGDB)
605 #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
607 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
609 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
610 #define CFG_MAXARGS 16 /* max number of command args */
611 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
613 /* Enable an alternate, more extensive memory test */
614 #define CFG_ALT_MEMTEST
616 #define CFG_MEMTEST_START 0x00100000 /* memtest works on */
617 #define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
619 #define CFG_LOAD_ADDR 0x100000 /* default load address */
621 #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
624 * Enable loopw command.
629 * Various low-level settings
631 #if defined(CONFIG_MPC5200)
632 #define CFG_HID0_INIT HID0_ICE | HID0_ICFI
633 #define CFG_HID0_FINAL HID0_ICE
635 #define CFG_HID0_INIT 0
636 #define CFG_HID0_FINAL 0
639 #define CFG_BOOTCS_START CFG_FLASH_BASE
640 #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
641 #ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
642 #define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
644 #define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
646 #define CFG_CS0_START CFG_FLASH_BASE
647 #define CFG_CS0_SIZE CFG_FLASH_SIZE
649 #define CONFIG_LAST_STAGE_INIT
652 * SRAM - Do not map below 2 GB in address space, because this area is used
653 * for SDRAM autosizing.
655 #define CFG_CS2_START 0xE5000000
656 #define CFG_CS2_SIZE 0x100000 /* 1 MByte */
657 #define CFG_CS2_CFG 0x0004D930
660 * Grafic controller - Do not map below 2 GB in address space, because this
661 * area is used for SDRAM autosizing.
663 #define SM501_FB_BASE 0xE0000000
664 #define CFG_CS1_START (SM501_FB_BASE)
665 #define CFG_CS1_SIZE 0x4000000 /* 64 MByte */
666 #define CFG_CS1_CFG 0x8F48FF70
667 #define SM501_MMIO_BASE CFG_CS1_START + 0x03E00000
669 #define CFG_CS_BURST 0x00000000
670 #define CFG_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
672 #if defined(CONFIG_CAM5200)
673 #define CFG_CS4_START 0xB0000000
674 #define CFG_CS4_SIZE 0x00010000
675 #define CFG_CS4_CFG 0x01019C10
677 #define CFG_CS5_START 0xD0000000
678 #define CFG_CS5_SIZE 0x01208000
679 #define CFG_CS5_CFG 0x1414BF10
682 #define CFG_RESET_ADDRESS 0xff000000
684 /*-----------------------------------------------------------------------
686 *-----------------------------------------------------------------------
688 #define CONFIG_USB_CLOCK 0x0001BBBB
689 #define CONFIG_USB_CONFIG 0x00001000
691 /*-----------------------------------------------------------------------
692 * IDE/ATA stuff Supports IDE harddisk
693 *-----------------------------------------------------------------------
696 #undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
698 #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
699 #undef CONFIG_IDE_LED /* LED for ide not supported */
701 #define CONFIG_IDE_RESET /* reset for ide supported */
702 #define CONFIG_IDE_PREINIT
704 #define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
705 #define CFG_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
707 #define CFG_ATA_IDE0_OFFSET 0x0000
709 #define CFG_ATA_BASE_ADDR MPC5XXX_ATA
711 /* Offset for data I/O */
712 #define CFG_ATA_DATA_OFFSET (0x0060)
714 /* Offset for normal register accesses */
715 #define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET)
717 /* Offset for alternate registers */
718 #define CFG_ATA_ALT_OFFSET (0x005C)
720 /* Interval between registers */
721 #define CFG_ATA_STRIDE 4
723 /*-----------------------------------------------------------------------
724 * Open firmware flat tree support
725 *-----------------------------------------------------------------------
727 #define CONFIG_OF_LIBFDT 1
728 #define CONFIG_OF_BOARD_SETUP 1
730 #define OF_CPU "PowerPC,5200@0"
731 #define OF_SOC "soc5200@f0000000"
732 #define OF_TBCLK (bd->bi_busfreq / 4)
733 #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
735 #endif /* __CONFIG_H */