2 * (C) Copyright 2003-2014
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * (C) Copyright 2004-2006
6 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
8 * SPDX-License-Identifier: GPL-2.0+
15 * High Level Configuration Options
19 #define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
20 #define CONFIG_TQM5200 1 /* ... on TQM5200 module */
21 #undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
24 * Valid values for CONFIG_SYS_TEXT_BASE are:
25 * 0xFC000000 boot low (standard configuration with room for
26 * max 64 MByte Flash ROM)
27 * 0xFFF00000 boot high (for a backup copy of U-Boot)
28 * 0x00100000 boot from RAM (for testing only)
30 #ifndef CONFIG_SYS_TEXT_BASE
31 #define CONFIG_SYS_TEXT_BASE 0xFC000000
34 /* On a Cameron or on a FO300 board or ... */
35 #if !defined(CONFIG_CAM5200) && !defined(CONFIG_CHARON) \
36 && !defined(CONFIG_FO300)
37 #define CONFIG_STK52XX 1 /* ... on a STK52XX board */
40 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
42 #define CONFIG_HIGH_BATS 1 /* High BATs supported */
45 * Serial console configuration
47 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
48 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
49 #define CONFIG_BOOTCOUNT_LIMIT 1
52 #define CONFIG_SYS_DEVICE_NULLDEV 1 /* enable null device */
53 #define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
55 #define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
56 /* switch is closed */
59 #undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
61 #endif /* CONFIG_FO300 */
63 #if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
64 #define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
65 #define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
66 #define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
67 #define CONFIG_PS2MULT_DELAY (CONFIG_SYS_HZ/2) /* Initial delay */
68 #define CONFIG_BOARD_EARLY_INIT_R
69 #endif /* CONFIG_STK52XX */
73 * 0x40000000 - 0x4fffffff - PCI Memory
74 * 0x50000000 - 0x50ffffff - PCI IO Space
76 #if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
77 /* #define CONFIG_PCI_SCAN_SHOW 1 */
79 #define CONFIG_PCI_MEM_BUS 0x40000000
80 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
81 #define CONFIG_PCI_MEM_SIZE 0x10000000
83 #define CONFIG_PCI_IO_BUS 0x50000000
84 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
85 #define CONFIG_PCI_IO_SIZE 0x01000000
87 #define CONFIG_EEPRO100 1
88 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
89 #define CONFIG_NS8382X 1
90 #endif /* CONFIG_STK52XX */
95 #ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
96 #define CONFIG_VIDEO_SM501
97 #define CONFIG_VIDEO_SM501_32BPP
98 #define CONFIG_VIDEO_LOGO
102 #define CONFIG_VIDEO_BMP_LOGO
105 #define CONFIG_SPLASH_SCREEN
106 #endif /* #ifndef CONFIG_TQM5200S */
111 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
112 defined(CONFIG_STK52XX)
113 #define CONFIG_USB_OHCI_NEW
114 #define CONFIG_SYS_OHCI_BE_CONTROLLER
116 #undef CONFIG_SYS_USB_OHCI_BOARD_INIT
117 #define CONFIG_SYS_USB_OHCI_CPU_INIT
118 #define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB
119 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200"
120 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
124 #ifndef CONFIG_CAM5200
126 #define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \
131 /* preserve space for the post_word at end of on-chip SRAM */
132 #define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
138 #define CONFIG_BOOTP_BOOTFILESIZE
139 #define CONFIG_BOOTP_BOOTPATH
140 #define CONFIG_BOOTP_GATEWAY
141 #define CONFIG_BOOTP_HOSTNAME
144 * Command line configuration.
146 #define CONFIG_CMD_JFFS2
147 #define CONFIG_CMD_REGINFO
150 #define CONFIG_CMD_PCI
151 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
154 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
155 defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX)
156 #define CONFIG_CMD_IDE
159 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
160 defined(CONFIG_STK52XX)
161 #define CONFIG_CFG_USB
162 #define CONFIG_CFG_FAT
165 #define CONFIG_TIMESTAMP /* display image timestamps */
167 #if (CONFIG_SYS_TEXT_BASE != 0xFFF00000)
168 # define CONFIG_SYS_LOWBOOT 1 /* Boot low */
175 #define CONFIG_PREBOOT "echo;" \
176 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
179 #undef CONFIG_BOOTARGS
181 #if defined(CONFIG_TQM5200_B) && !defined(CONFIG_SYS_LOWBOOT)
183 "update=protect off FFF00000 +${filesize};" \
184 "erase FFF00000 +${filesize};" \
185 "cp.b 200000 FFF00000 ${filesize};" \
186 "protect on FFF00000 +${filesize}\0"
187 #else /* default lowboot configuration */
189 "update=protect off FC000000 +${filesize};" \
190 "erase FC000000 +${filesize};" \
191 "cp.b 200000 FC000000 ${filesize};" \
192 "protect on FC000000 +${filesize}\0"
195 #if defined(CONFIG_TQM5200)
196 #define CUSTOM_ENV_SETTINGS \
197 "hostname=tqm5200\0" \
198 "bootfile=/tftpboot/tqm5200/uImage\0" \
199 "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \
200 "u-boot=/tftpboot/tqm5200/u-boot.bin\0"
201 #elif defined(CONFIG_CAM5200)
202 #define CUSTOM_ENV_SETTINGS \
203 "bootfile=cam5200/uImage\0" \
204 "u-boot=cam5200/u-boot.bin\0" \
205 "setup=tftp 200000 cam5200/setup.img; source 200000\0"
208 #if defined(CONFIG_TQM5200_B)
209 #define ENV_FLASH_LAYOUT \
210 "fdt_addr=FC100000\0" \
211 "kernel_addr=FC140000\0" \
212 "ramdisk_addr=FC600000\0"
213 #elif defined(CONFIG_CHARON)
214 #define ENV_FLASH_LAYOUT \
215 "fdt_addr=FDFC0000\0" \
216 "kernel_addr=FC0A0000\0" \
217 "ramdisk_addr=FC200000\0"
218 #else /* !CONFIG_TQM5200_B */
219 #define ENV_FLASH_LAYOUT \
220 "fdt_addr=FC0A0000\0" \
221 "kernel_addr=FC0C0000\0" \
222 "ramdisk_addr=FC300000\0"
225 #define CONFIG_EXTRA_ENV_SETTINGS \
227 "console=ttyPSC0\0" \
229 "kernel_addr_r=400000\0" \
230 "fdt_addr_r=600000\0" \
231 "rootpath=/opt/eldk/ppc_6xx\0" \
232 "ramargs=setenv bootargs root=/dev/ram rw\0" \
233 "nfsargs=setenv bootargs root=/dev/nfs rw " \
234 "nfsroot=${serverip}:${rootpath}\0" \
235 "addip=setenv bootargs ${bootargs} " \
236 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
237 ":${hostname}:${netdev}:off panic=1\0" \
238 "addcons=setenv bootargs ${bootargs} " \
239 "console=${console},${baudrate}\0" \
240 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
241 "flash_self_old=sete console ttyS0; " \
242 "run ramargs addip addcons addmtd; " \
243 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
244 "flash_self=run ramargs addip addcons;" \
245 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
246 "flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \
247 "bootm ${kernel_addr}\0" \
248 "flash_nfs=run nfsargs addip addcons;" \
249 "bootm ${kernel_addr} - ${fdt_addr}\0" \
250 "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
251 "sete console ttyS0; run nfsargs addip addcons;bootm\0" \
252 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
253 "tftp ${fdt_addr_r} ${fdt_file}; " \
254 "run nfsargs addip addcons addmtd; " \
255 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
256 CUSTOM_ENV_SETTINGS \
257 "load=tftp 200000 ${u-boot}\0" \
261 #define CONFIG_BOOTCOMMAND "run net_nfs"
264 * IPB Bus clocking configuration.
266 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
268 #if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
270 * PCI Bus clocking configuration
272 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
273 * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
274 * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
276 #define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
280 * Flash configuration
282 #define CONFIG_SYS_FLASH_BASE 0xFC000000
284 #if defined(CONFIG_CAM5200) && defined(CONFIG_CAM5200_NIOSFLASH)
285 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max num of flash banks
287 #define CONFIG_SYS_FLASH_WORD_SIZE unsigned int /* main flash device with */
288 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
289 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
291 #define CONFIG_SYS_FLASH_ADDR0 0x555
292 #define CONFIG_SYS_FLASH_ADDR1 0x2AA
293 #define CONFIG_SYS_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
294 #define CONFIG_SYS_MAX_FLASH_SECT 128
296 /* use CFI flash driver */
297 #define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
298 #define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
299 #define CONFIG_FLASH_CFI_MTD /* with MTD support */
300 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_BOOTCS_START }
301 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks
303 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */
306 #define CONFIG_SYS_FLASH_EMPTY_INFO
307 #define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MByte */
308 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
310 #if defined (CONFIG_CAM5200)
311 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000)
312 #elif defined(CONFIG_TQM5200_B)
313 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00080000)
315 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000)
318 /* Dynamic MTD partition support */
319 #define CONFIG_CMD_MTDPARTS
320 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
321 #define MTDIDS_DEFAULT "nor0=fc000000.flash"
323 #if defined(CONFIG_STK52XX)
324 # if defined(CONFIG_TQM5200_B)
325 # if defined(CONFIG_SYS_LOWBOOT)
326 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:1m(firmware)," \
333 # else /* highboot */
334 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:2560k(kernel),"\
340 # endif /* CONFIG_SYS_LOWBOOT */
341 # else /* !CONFIG_TQM5200_B */
342 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
349 # endif /* CONFIG_TQM5200_B */
350 #elif defined (CONFIG_CAM5200)
351 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:768k(firmware),"\
355 #elif defined (CONFIG_CHARON)
356 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
362 #elif defined (CONFIG_FO300)
363 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
370 # error "Unknown Carrier Board"
371 #endif /* CONFIG_STK52XX */
374 * Environment settings
376 #define CONFIG_ENV_IS_IN_FLASH 1
377 #define CONFIG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
378 #if defined(CONFIG_TQM5200_B) || defined (CONFIG_CAM5200)
379 #define CONFIG_ENV_SECT_SIZE 0x40000
381 #define CONFIG_ENV_SECT_SIZE 0x20000
382 #endif /* CONFIG_TQM5200_B */
383 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
384 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
389 #define CONFIG_SYS_MBAR 0xF0000000
390 #define CONFIG_SYS_SDRAM_BASE 0x00000000
391 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
393 /* Use ON-Chip SRAM until RAM will be available */
394 #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
396 /* preserve space for the post_word at end of on-chip SRAM */
397 #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_POST_SIZE
399 #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
402 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
403 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
405 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
406 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
407 # define CONFIG_SYS_RAMBOOT 1
410 #if defined (CONFIG_CAM5200)
411 # define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
412 #elif defined(CONFIG_TQM5200_B)
413 # define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
415 # define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
418 #define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
419 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
422 * Ethernet configuration
424 #define CONFIG_MPC5xxx_FEC 1
425 #define CONFIG_MPC5xxx_FEC_MII100
427 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
429 /* #define CONFIG_MPC5xxx_FEC_MII10 */
430 #define CONFIG_PHY_ADDR 0x00
435 * use CS1: Bit 0 (mask: 0x80000000):
436 * 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
437 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
438 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
439 * SPI on PSC3 according to PSC3 setting. Use for CAM5200.
440 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
441 * Use for REV200 STK52XX boards and FO300 boards. Do not use
442 * with REV100 modules (because, there I2C1 is used as I2C bus).
443 * use ATA: Bits 6-7 (mask 0x03000000):
444 * 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
445 * Use for CAM5200 board.
446 * 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
447 * use PSC6: Bits 9-11 (mask 0x00700000):
448 * 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
449 * UART, CODEC or IrDA.
450 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to
451 * enable extended POST tests.
452 * Use for MINI-FAP and TQM5200_IB boards.
453 * 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
454 * Extended POST test is not available.
455 * Use for STK52xx, FO300 and CAM5200 boards.
456 * WARNING: When the extended POST is enabled, these bits will
457 * be overridden by this code as GPIOs!
458 * use PCI_DIS: Bit 16 (mask 0x00008000):
459 * 1 -> disable PCI controller (on CAM5200 board).
460 * use USB: Bits 18-19 (mask 0x00003000):
461 * 10 -> two UARTs (on FO300 and CAM5200).
462 * use PSC3: Bits 20-23 (mask: 0x00000f00):
463 * 0000 -> All PSC3 pins are GPIOs.
464 * 1100 -> UART/SPI (on FO300 board).
465 * 0100 -> UART (on CAM5200 board).
466 * use PSC2: Bits 25:27 (mask: 0x00000030):
467 * 000 -> All PSC2 pins are GPIOs.
468 * 100 -> UART (on CAM5200 board).
469 * 001 -> CAN1/2 on PSC2 pins.
470 * Use for REV100 STK52xx boards
471 * 01x -> Use AC97 (on FO300 board).
472 * use PSC1: Bits 29-31 (mask: 0x00000007):
473 * 100 -> UART (on all boards).
475 #if !defined(CONFIG_SYS_GPS_PORT_CONFIG)
476 #if defined (CONFIG_MINIFAP)
477 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91000004
478 #elif defined (CONFIG_STK52XX)
479 # if defined (CONFIG_STK52XX_REV100)
480 # define CONFIG_SYS_GPS_PORT_CONFIG 0x81500014
481 # else /* STK52xx REV200 and above */
482 # if defined (CONFIG_TQM5200_REV100)
483 # error TQM5200 REV100 not supported on STK52XX REV200 or above
484 # else/* TQM5200 REV200 and above */
485 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91500404
488 #elif defined (CONFIG_FO300)
489 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91502c24
490 #elif defined (CONFIG_CAM5200)
491 # define CONFIG_SYS_GPS_PORT_CONFIG 0x8050A444
492 #else /* TMQ5200 Inbetriebnahme-Board */
493 # define CONFIG_SYS_GPS_PORT_CONFIG 0x81000004
498 * Miscellaneous configurable options
500 #define CONFIG_SYS_LONGHELP /* undef to save memory */
502 #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
504 #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
505 #if defined(CONFIG_CMD_KGDB)
506 #define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
509 #if defined(CONFIG_CMD_KGDB)
510 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
512 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
514 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
515 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
516 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
518 /* Enable an alternate, more extensive memory test */
519 #define CONFIG_SYS_ALT_MEMTEST
521 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
522 #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
524 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
527 * Various low-level settings
529 #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
530 #define CONFIG_SYS_HID0_FINAL HID0_ICE
532 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
533 #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
534 #ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
535 #define CONFIG_SYS_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
537 #define CONFIG_SYS_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
539 #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
540 #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
542 #define CONFIG_LAST_STAGE_INIT
545 * SRAM - Do not map below 2 GB in address space, because this area is used
546 * for SDRAM autosizing.
548 #define CONFIG_SYS_CS2_START 0xE5000000
549 #define CONFIG_SYS_CS2_SIZE 0x100000 /* 1 MByte */
550 #define CONFIG_SYS_CS2_CFG 0x0004D930
553 * Grafic controller - Do not map below 2 GB in address space, because this
554 * area is used for SDRAM autosizing.
556 #define SM501_FB_BASE 0xE0000000
557 #define CONFIG_SYS_CS1_START (SM501_FB_BASE)
558 #define CONFIG_SYS_CS1_SIZE 0x4000000 /* 64 MByte */
559 #define CONFIG_SYS_CS1_CFG 0x8F48FF70
560 #define SM501_MMIO_BASE CONFIG_SYS_CS1_START + 0x03E00000
562 #define CONFIG_SYS_CS_BURST 0x00000000
563 #define CONFIG_SYS_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
565 #if defined(CONFIG_CAM5200)
566 #define CONFIG_SYS_CS4_START 0xB0000000
567 #define CONFIG_SYS_CS4_SIZE 0x00010000
568 #define CONFIG_SYS_CS4_CFG 0x01019C10
570 #define CONFIG_SYS_CS5_START 0xD0000000
571 #define CONFIG_SYS_CS5_SIZE 0x01208000
572 #define CONFIG_SYS_CS5_CFG 0x1414BF10
575 #define CONFIG_SYS_RESET_ADDRESS 0xff000000
577 /*-----------------------------------------------------------------------
579 *-----------------------------------------------------------------------
581 #define CONFIG_USB_CLOCK 0x0001BBBB
582 #define CONFIG_USB_CONFIG 0x00001000
584 /*-----------------------------------------------------------------------
585 * IDE/ATA stuff Supports IDE harddisk
586 *-----------------------------------------------------------------------
589 #undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
591 #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
592 #undef CONFIG_IDE_LED /* LED for ide not supported */
594 #define CONFIG_IDE_RESET /* reset for ide supported */
595 #define CONFIG_IDE_PREINIT
597 #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
598 #define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
600 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
602 #define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
604 /* Offset for data I/O */
605 #define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
607 /* Offset for normal register accesses */
608 #define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
610 /* Offset for alternate registers */
611 #define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
613 /* Interval between registers */
614 #define CONFIG_SYS_ATA_STRIDE 4
616 /* Support ATAPI devices */
617 #define CONFIG_ATAPI 1
619 /*-----------------------------------------------------------------------
620 * Open firmware flat tree support
621 *-----------------------------------------------------------------------
623 #define OF_CPU "PowerPC,5200@0"
624 #define OF_SOC "soc5200@f0000000"
625 #define OF_TBCLK (bd->bi_busfreq / 4)
626 #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
628 #endif /* __CONFIG_H */