2 * (C) Copyright 2003-2014
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * (C) Copyright 2004-2006
6 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
8 * SPDX-License-Identifier: GPL-2.0+
15 * High Level Configuration Options
19 #define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
20 #define CONFIG_TQM5200 1 /* ... on TQM5200 module */
21 #undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
24 * Valid values for CONFIG_SYS_TEXT_BASE are:
25 * 0xFC000000 boot low (standard configuration with room for
26 * max 64 MByte Flash ROM)
27 * 0xFFF00000 boot high (for a backup copy of U-Boot)
28 * 0x00100000 boot from RAM (for testing only)
30 #ifndef CONFIG_SYS_TEXT_BASE
31 #define CONFIG_SYS_TEXT_BASE 0xFC000000
34 /* On a Cameron or on a FO300 board or ... */
35 #if !defined(CONFIG_CAM5200) && !defined(CONFIG_CHARON) \
36 && !defined(CONFIG_FO300)
37 #define CONFIG_STK52XX 1 /* ... on a STK52XX board */
40 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
42 #define CONFIG_HIGH_BATS 1 /* High BATs supported */
45 * Serial console configuration
47 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
48 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
49 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
50 #define CONFIG_BOOTCOUNT_LIMIT 1
53 #define CONFIG_SYS_DEVICE_NULLDEV 1 /* enable null device */
54 #define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
55 #define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
57 #define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
58 /* switch is closed */
61 #undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
63 #endif /* CONFIG_FO300 */
65 #if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
66 #define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
67 #define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
68 #define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
69 #define CONFIG_PS2MULT_DELAY (CONFIG_SYS_HZ/2) /* Initial delay */
70 #define CONFIG_BOARD_EARLY_INIT_R
71 #endif /* CONFIG_STK52XX */
75 * 0x40000000 - 0x4fffffff - PCI Memory
76 * 0x50000000 - 0x50ffffff - PCI IO Space
78 #if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
80 #define CONFIG_PCI_PNP 1
81 /* #define CONFIG_PCI_SCAN_SHOW 1 */
83 #define CONFIG_PCI_MEM_BUS 0x40000000
84 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
85 #define CONFIG_PCI_MEM_SIZE 0x10000000
87 #define CONFIG_PCI_IO_BUS 0x50000000
88 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
89 #define CONFIG_PCI_IO_SIZE 0x01000000
91 #define CONFIG_EEPRO100 1
92 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
93 #define CONFIG_NS8382X 1
94 #endif /* CONFIG_STK52XX */
99 #ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
101 #define CONFIG_VIDEO_SM501
102 #define CONFIG_VIDEO_SM501_32BPP
103 #define CONFIG_CFB_CONSOLE
104 #define CONFIG_VIDEO_LOGO
107 #define CONFIG_CONSOLE_EXTRA_INFO
109 #define CONFIG_VIDEO_BMP_LOGO
112 #define CONFIG_VGA_AS_SINGLE_DEVICE
113 #define CONFIG_VIDEO_SW_CURSOR
114 #define CONFIG_SPLASH_SCREEN
115 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
116 #endif /* #ifndef CONFIG_TQM5200S */
119 #define CONFIG_MAC_PARTITION
120 #define CONFIG_DOS_PARTITION
121 #define CONFIG_ISO_PARTITION
124 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
125 defined(CONFIG_STK52XX)
126 #define CONFIG_USB_OHCI_NEW
127 #define CONFIG_SYS_OHCI_BE_CONTROLLER
129 #undef CONFIG_SYS_USB_OHCI_BOARD_INIT
130 #define CONFIG_SYS_USB_OHCI_CPU_INIT
131 #define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB
132 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200"
133 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
137 #ifndef CONFIG_CAM5200
139 #define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \
140 CONFIG_SYS_POST_CPU | \
145 /* preserve space for the post_word at end of on-chip SRAM */
146 #define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
152 #define CONFIG_BOOTP_BOOTFILESIZE
153 #define CONFIG_BOOTP_BOOTPATH
154 #define CONFIG_BOOTP_GATEWAY
155 #define CONFIG_BOOTP_HOSTNAME
158 * Command line configuration.
160 #define CONFIG_CMD_DATE
161 #define CONFIG_CMD_EEPROM
162 #define CONFIG_CMD_JFFS2
163 #define CONFIG_CMD_REGINFO
164 #define CONFIG_CMD_BSP
167 #define CONFIG_CMD_BMP
171 #define CONFIG_CMD_PCI
172 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
175 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
176 defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX)
177 #define CONFIG_CMD_IDE
180 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
181 defined(CONFIG_STK52XX)
182 #define CONFIG_CFG_USB
183 #define CONFIG_CFG_FAT
187 #define CONFIG_CMD_DIAG
190 #define CONFIG_TIMESTAMP /* display image timestamps */
192 #if (CONFIG_SYS_TEXT_BASE != 0xFFF00000)
193 # define CONFIG_SYS_LOWBOOT 1 /* Boot low */
200 #define CONFIG_PREBOOT "echo;" \
201 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
204 #undef CONFIG_BOOTARGS
206 #if defined(CONFIG_TQM5200_B) && !defined(CONFIG_SYS_LOWBOOT)
208 "update=protect off FFF00000 +${filesize};" \
209 "erase FFF00000 +${filesize};" \
210 "cp.b 200000 FFF00000 ${filesize};" \
211 "protect on FFF00000 +${filesize}\0"
212 #else /* default lowboot configuration */
214 "update=protect off FC000000 +${filesize};" \
215 "erase FC000000 +${filesize};" \
216 "cp.b 200000 FC000000 ${filesize};" \
217 "protect on FC000000 +${filesize}\0"
220 #if defined(CONFIG_TQM5200)
221 #define CUSTOM_ENV_SETTINGS \
222 "hostname=tqm5200\0" \
223 "bootfile=/tftpboot/tqm5200/uImage\0" \
224 "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \
225 "u-boot=/tftpboot/tqm5200/u-boot.bin\0"
226 #elif defined(CONFIG_CAM5200)
227 #define CUSTOM_ENV_SETTINGS \
228 "bootfile=cam5200/uImage\0" \
229 "u-boot=cam5200/u-boot.bin\0" \
230 "setup=tftp 200000 cam5200/setup.img; source 200000\0"
233 #if defined(CONFIG_TQM5200_B)
234 #define ENV_FLASH_LAYOUT \
235 "fdt_addr=FC100000\0" \
236 "kernel_addr=FC140000\0" \
237 "ramdisk_addr=FC600000\0"
238 #elif defined(CONFIG_CHARON)
239 #define ENV_FLASH_LAYOUT \
240 "fdt_addr=FDFC0000\0" \
241 "kernel_addr=FC0A0000\0" \
242 "ramdisk_addr=FC200000\0"
243 #else /* !CONFIG_TQM5200_B */
244 #define ENV_FLASH_LAYOUT \
245 "fdt_addr=FC0A0000\0" \
246 "kernel_addr=FC0C0000\0" \
247 "ramdisk_addr=FC300000\0"
250 #define CONFIG_EXTRA_ENV_SETTINGS \
252 "console=ttyPSC0\0" \
254 "kernel_addr_r=400000\0" \
255 "fdt_addr_r=600000\0" \
256 "rootpath=/opt/eldk/ppc_6xx\0" \
257 "ramargs=setenv bootargs root=/dev/ram rw\0" \
258 "nfsargs=setenv bootargs root=/dev/nfs rw " \
259 "nfsroot=${serverip}:${rootpath}\0" \
260 "addip=setenv bootargs ${bootargs} " \
261 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
262 ":${hostname}:${netdev}:off panic=1\0" \
263 "addcons=setenv bootargs ${bootargs} " \
264 "console=${console},${baudrate}\0" \
265 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
266 "flash_self_old=sete console ttyS0; " \
267 "run ramargs addip addcons addmtd; " \
268 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
269 "flash_self=run ramargs addip addcons;" \
270 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
271 "flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \
272 "bootm ${kernel_addr}\0" \
273 "flash_nfs=run nfsargs addip addcons;" \
274 "bootm ${kernel_addr} - ${fdt_addr}\0" \
275 "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
276 "sete console ttyS0; run nfsargs addip addcons;bootm\0" \
277 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
278 "tftp ${fdt_addr_r} ${fdt_file}; " \
279 "run nfsargs addip addcons addmtd; " \
280 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
281 CUSTOM_ENV_SETTINGS \
282 "load=tftp 200000 ${u-boot}\0" \
286 #define CONFIG_BOOTCOMMAND "run net_nfs"
289 * IPB Bus clocking configuration.
291 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
293 #if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
295 * PCI Bus clocking configuration
297 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
298 * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
299 * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
301 #define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
307 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
308 #ifdef CONFIG_TQM5200_REV100
309 #define CONFIG_SYS_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
311 #define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
315 * I2C clock frequency
317 * Please notice, that the resulting clock frequency could differ from the
318 * configured value. This is because the I2C clock is derived from system
319 * clock over a frequency divider with only a few divider values. U-Boot
320 * calculates the best approximation for CONFIG_SYS_I2C_SPEED. However the calculated
321 * approximation allways lies below the configured value, never above.
323 #define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
324 #define CONFIG_SYS_I2C_SLAVE 0x7F
327 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
328 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
329 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
330 * same configuration could be used.
332 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
333 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
334 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
335 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
338 * HW-Monitor configuration on Mini-FAP
340 #if defined (CONFIG_MINIFAP)
341 #define CONFIG_SYS_I2C_HWMON_ADDR 0x2C
344 /* List of I2C addresses to be verified by POST */
345 #if defined (CONFIG_MINIFAP)
346 #undef CONFIG_SYS_POST_I2C_ADDRS
347 #define CONFIG_SYS_POST_I2C_ADDRS {CONFIG_SYS_I2C_EEPROM_ADDR, \
348 CONFIG_SYS_I2C_HWMON_ADDR, \
349 CONFIG_SYS_I2C_SLAVE}
353 * Flash configuration
355 #define CONFIG_SYS_FLASH_BASE 0xFC000000
357 #if defined(CONFIG_CAM5200) && defined(CONFIG_CAM5200_NIOSFLASH)
358 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max num of flash banks
360 #define CONFIG_SYS_FLASH_WORD_SIZE unsigned int /* main flash device with */
361 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
362 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
364 #define CONFIG_SYS_FLASH_ADDR0 0x555
365 #define CONFIG_SYS_FLASH_ADDR1 0x2AA
366 #define CONFIG_SYS_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
367 #define CONFIG_SYS_MAX_FLASH_SECT 128
369 /* use CFI flash driver */
370 #define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
371 #define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
372 #define CONFIG_FLASH_CFI_MTD /* with MTD support */
373 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_BOOTCS_START }
374 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks
376 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */
379 #define CONFIG_SYS_FLASH_EMPTY_INFO
380 #define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MByte */
381 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
383 #if defined (CONFIG_CAM5200)
384 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000)
385 #elif defined(CONFIG_TQM5200_B)
386 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00080000)
388 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000)
391 /* Dynamic MTD partition support */
392 #define CONFIG_CMD_MTDPARTS
393 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
394 #define MTDIDS_DEFAULT "nor0=fc000000.flash"
396 #if defined(CONFIG_STK52XX)
397 # if defined(CONFIG_TQM5200_B)
398 # if defined(CONFIG_SYS_LOWBOOT)
399 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:1m(firmware)," \
406 # else /* highboot */
407 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:2560k(kernel),"\
413 # endif /* CONFIG_SYS_LOWBOOT */
414 # else /* !CONFIG_TQM5200_B */
415 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
422 # endif /* CONFIG_TQM5200_B */
423 #elif defined (CONFIG_CAM5200)
424 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:768k(firmware),"\
428 #elif defined (CONFIG_CHARON)
429 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
435 #elif defined (CONFIG_FO300)
436 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
443 # error "Unknown Carrier Board"
444 #endif /* CONFIG_STK52XX */
447 * Environment settings
449 #define CONFIG_ENV_IS_IN_FLASH 1
450 #define CONFIG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
451 #if defined(CONFIG_TQM5200_B) || defined (CONFIG_CAM5200)
452 #define CONFIG_ENV_SECT_SIZE 0x40000
454 #define CONFIG_ENV_SECT_SIZE 0x20000
455 #endif /* CONFIG_TQM5200_B */
456 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
457 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
462 #define CONFIG_SYS_MBAR 0xF0000000
463 #define CONFIG_SYS_SDRAM_BASE 0x00000000
464 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
466 /* Use ON-Chip SRAM until RAM will be available */
467 #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
469 /* preserve space for the post_word at end of on-chip SRAM */
470 #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_POST_SIZE
472 #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
475 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
476 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
478 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
479 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
480 # define CONFIG_SYS_RAMBOOT 1
483 #if defined (CONFIG_CAM5200)
484 # define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
485 #elif defined(CONFIG_TQM5200_B)
486 # define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
488 # define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
491 #define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
492 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
495 * Ethernet configuration
497 #define CONFIG_MPC5xxx_FEC 1
498 #define CONFIG_MPC5xxx_FEC_MII100
500 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
502 /* #define CONFIG_MPC5xxx_FEC_MII10 */
503 #define CONFIG_PHY_ADDR 0x00
508 * use CS1: Bit 0 (mask: 0x80000000):
509 * 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
510 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
511 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
512 * SPI on PSC3 according to PSC3 setting. Use for CAM5200.
513 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
514 * Use for REV200 STK52XX boards and FO300 boards. Do not use
515 * with REV100 modules (because, there I2C1 is used as I2C bus).
516 * use ATA: Bits 6-7 (mask 0x03000000):
517 * 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
518 * Use for CAM5200 board.
519 * 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
520 * use PSC6: Bits 9-11 (mask 0x00700000):
521 * 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
522 * UART, CODEC or IrDA.
523 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to
524 * enable extended POST tests.
525 * Use for MINI-FAP and TQM5200_IB boards.
526 * 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
527 * Extended POST test is not available.
528 * Use for STK52xx, FO300 and CAM5200 boards.
529 * WARNING: When the extended POST is enabled, these bits will
530 * be overridden by this code as GPIOs!
531 * use PCI_DIS: Bit 16 (mask 0x00008000):
532 * 1 -> disable PCI controller (on CAM5200 board).
533 * use USB: Bits 18-19 (mask 0x00003000):
534 * 10 -> two UARTs (on FO300 and CAM5200).
535 * use PSC3: Bits 20-23 (mask: 0x00000f00):
536 * 0000 -> All PSC3 pins are GPIOs.
537 * 1100 -> UART/SPI (on FO300 board).
538 * 0100 -> UART (on CAM5200 board).
539 * use PSC2: Bits 25:27 (mask: 0x00000030):
540 * 000 -> All PSC2 pins are GPIOs.
541 * 100 -> UART (on CAM5200 board).
542 * 001 -> CAN1/2 on PSC2 pins.
543 * Use for REV100 STK52xx boards
544 * 01x -> Use AC97 (on FO300 board).
545 * use PSC1: Bits 29-31 (mask: 0x00000007):
546 * 100 -> UART (on all boards).
548 #if !defined(CONFIG_SYS_GPS_PORT_CONFIG)
549 #if defined (CONFIG_MINIFAP)
550 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91000004
551 #elif defined (CONFIG_STK52XX)
552 # if defined (CONFIG_STK52XX_REV100)
553 # define CONFIG_SYS_GPS_PORT_CONFIG 0x81500014
554 # else /* STK52xx REV200 and above */
555 # if defined (CONFIG_TQM5200_REV100)
556 # error TQM5200 REV100 not supported on STK52XX REV200 or above
557 # else/* TQM5200 REV200 and above */
558 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91500404
561 #elif defined (CONFIG_FO300)
562 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91502c24
563 #elif defined (CONFIG_CAM5200)
564 # define CONFIG_SYS_GPS_PORT_CONFIG 0x8050A444
565 #else /* TMQ5200 Inbetriebnahme-Board */
566 # define CONFIG_SYS_GPS_PORT_CONFIG 0x81000004
573 #if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
574 # define CONFIG_RTC_M41T11 1
575 # define CONFIG_SYS_I2C_RTC_ADDR 0x68
576 # define CONFIG_SYS_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
579 # define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
583 * Miscellaneous configurable options
585 #define CONFIG_SYS_LONGHELP /* undef to save memory */
587 #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
589 #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
590 #if defined(CONFIG_CMD_KGDB)
591 #define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
594 #if defined(CONFIG_CMD_KGDB)
595 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
597 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
599 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
600 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
601 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
603 /* Enable an alternate, more extensive memory test */
604 #define CONFIG_SYS_ALT_MEMTEST
606 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
607 #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
609 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
612 * Various low-level settings
614 #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
615 #define CONFIG_SYS_HID0_FINAL HID0_ICE
617 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
618 #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
619 #ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
620 #define CONFIG_SYS_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
622 #define CONFIG_SYS_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
624 #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
625 #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
627 #define CONFIG_LAST_STAGE_INIT
630 * SRAM - Do not map below 2 GB in address space, because this area is used
631 * for SDRAM autosizing.
633 #define CONFIG_SYS_CS2_START 0xE5000000
634 #define CONFIG_SYS_CS2_SIZE 0x100000 /* 1 MByte */
635 #define CONFIG_SYS_CS2_CFG 0x0004D930
638 * Grafic controller - Do not map below 2 GB in address space, because this
639 * area is used for SDRAM autosizing.
641 #define SM501_FB_BASE 0xE0000000
642 #define CONFIG_SYS_CS1_START (SM501_FB_BASE)
643 #define CONFIG_SYS_CS1_SIZE 0x4000000 /* 64 MByte */
644 #define CONFIG_SYS_CS1_CFG 0x8F48FF70
645 #define SM501_MMIO_BASE CONFIG_SYS_CS1_START + 0x03E00000
647 #define CONFIG_SYS_CS_BURST 0x00000000
648 #define CONFIG_SYS_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
650 #if defined(CONFIG_CAM5200)
651 #define CONFIG_SYS_CS4_START 0xB0000000
652 #define CONFIG_SYS_CS4_SIZE 0x00010000
653 #define CONFIG_SYS_CS4_CFG 0x01019C10
655 #define CONFIG_SYS_CS5_START 0xD0000000
656 #define CONFIG_SYS_CS5_SIZE 0x01208000
657 #define CONFIG_SYS_CS5_CFG 0x1414BF10
660 #define CONFIG_SYS_RESET_ADDRESS 0xff000000
662 /*-----------------------------------------------------------------------
664 *-----------------------------------------------------------------------
666 #define CONFIG_USB_CLOCK 0x0001BBBB
667 #define CONFIG_USB_CONFIG 0x00001000
669 /*-----------------------------------------------------------------------
670 * IDE/ATA stuff Supports IDE harddisk
671 *-----------------------------------------------------------------------
674 #undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
676 #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
677 #undef CONFIG_IDE_LED /* LED for ide not supported */
679 #define CONFIG_IDE_RESET /* reset for ide supported */
680 #define CONFIG_IDE_PREINIT
682 #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
683 #define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
685 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
687 #define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
689 /* Offset for data I/O */
690 #define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
692 /* Offset for normal register accesses */
693 #define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
695 /* Offset for alternate registers */
696 #define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
698 /* Interval between registers */
699 #define CONFIG_SYS_ATA_STRIDE 4
701 /* Support ATAPI devices */
702 #define CONFIG_ATAPI 1
704 /*-----------------------------------------------------------------------
705 * Open firmware flat tree support
706 *-----------------------------------------------------------------------
708 #define OF_CPU "PowerPC,5200@0"
709 #define OF_SOC "soc5200@f0000000"
710 #define OF_TBCLK (bd->bi_busfreq / 4)
711 #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
713 #endif /* __CONFIG_H */