2 * (C) Copyright 2003-2014
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * (C) Copyright 2004-2006
6 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
8 * SPDX-License-Identifier: GPL-2.0+
15 * High Level Configuration Options
19 #define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
20 #define CONFIG_TQM5200 1 /* ... on TQM5200 module */
21 #undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
24 * Valid values for CONFIG_SYS_TEXT_BASE are:
25 * 0xFC000000 boot low (standard configuration with room for
26 * max 64 MByte Flash ROM)
27 * 0xFFF00000 boot high (for a backup copy of U-Boot)
28 * 0x00100000 boot from RAM (for testing only)
30 #ifndef CONFIG_SYS_TEXT_BASE
31 #define CONFIG_SYS_TEXT_BASE 0xFC000000
34 /* On a Cameron or on a FO300 board or ... */
35 #if !defined(CONFIG_CAM5200) && !defined(CONFIG_CHARON) \
36 && !defined(CONFIG_FO300)
37 #define CONFIG_STK52XX 1 /* ... on a STK52XX board */
40 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
42 #define CONFIG_HIGH_BATS 1 /* High BATs supported */
45 * Serial console configuration
47 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
48 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
49 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
50 #define CONFIG_BOOTCOUNT_LIMIT 1
53 #define CONFIG_SYS_DEVICE_NULLDEV 1 /* enable null device */
54 #define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
55 #define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
57 #define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
58 /* switch is closed */
61 #undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
63 #endif /* CONFIG_FO300 */
65 #if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
66 #define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
67 #define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
68 #define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
69 #define CONFIG_PS2MULT_DELAY (CONFIG_SYS_HZ/2) /* Initial delay */
70 #define CONFIG_BOARD_EARLY_INIT_R
71 #endif /* CONFIG_STK52XX */
75 * 0x40000000 - 0x4fffffff - PCI Memory
76 * 0x50000000 - 0x50ffffff - PCI IO Space
78 #if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
79 /* #define CONFIG_PCI_SCAN_SHOW 1 */
81 #define CONFIG_PCI_MEM_BUS 0x40000000
82 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
83 #define CONFIG_PCI_MEM_SIZE 0x10000000
85 #define CONFIG_PCI_IO_BUS 0x50000000
86 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
87 #define CONFIG_PCI_IO_SIZE 0x01000000
89 #define CONFIG_EEPRO100 1
90 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
91 #define CONFIG_NS8382X 1
92 #endif /* CONFIG_STK52XX */
97 #ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
98 #define CONFIG_VIDEO_SM501
99 #define CONFIG_VIDEO_SM501_32BPP
100 #define CONFIG_VIDEO_LOGO
104 #define CONFIG_VIDEO_BMP_LOGO
107 #define CONFIG_SPLASH_SCREEN
108 #endif /* #ifndef CONFIG_TQM5200S */
111 #define CONFIG_MAC_PARTITION
112 #define CONFIG_DOS_PARTITION
113 #define CONFIG_ISO_PARTITION
116 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
117 defined(CONFIG_STK52XX)
118 #define CONFIG_USB_OHCI_NEW
119 #define CONFIG_SYS_OHCI_BE_CONTROLLER
121 #undef CONFIG_SYS_USB_OHCI_BOARD_INIT
122 #define CONFIG_SYS_USB_OHCI_CPU_INIT
123 #define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB
124 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200"
125 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
129 #ifndef CONFIG_CAM5200
131 #define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \
132 CONFIG_SYS_POST_CPU | \
137 /* preserve space for the post_word at end of on-chip SRAM */
138 #define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
144 #define CONFIG_BOOTP_BOOTFILESIZE
145 #define CONFIG_BOOTP_BOOTPATH
146 #define CONFIG_BOOTP_GATEWAY
147 #define CONFIG_BOOTP_HOSTNAME
150 * Command line configuration.
152 #define CONFIG_CMD_DATE
153 #define CONFIG_CMD_EEPROM
154 #define CONFIG_CMD_JFFS2
155 #define CONFIG_CMD_REGINFO
156 #define CONFIG_CMD_BSP
159 #define CONFIG_CMD_BMP
163 #define CONFIG_CMD_PCI
164 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
167 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
168 defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX)
169 #define CONFIG_CMD_IDE
172 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
173 defined(CONFIG_STK52XX)
174 #define CONFIG_CFG_USB
175 #define CONFIG_CFG_FAT
179 #define CONFIG_CMD_DIAG
182 #define CONFIG_TIMESTAMP /* display image timestamps */
184 #if (CONFIG_SYS_TEXT_BASE != 0xFFF00000)
185 # define CONFIG_SYS_LOWBOOT 1 /* Boot low */
192 #define CONFIG_PREBOOT "echo;" \
193 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
196 #undef CONFIG_BOOTARGS
198 #if defined(CONFIG_TQM5200_B) && !defined(CONFIG_SYS_LOWBOOT)
200 "update=protect off FFF00000 +${filesize};" \
201 "erase FFF00000 +${filesize};" \
202 "cp.b 200000 FFF00000 ${filesize};" \
203 "protect on FFF00000 +${filesize}\0"
204 #else /* default lowboot configuration */
206 "update=protect off FC000000 +${filesize};" \
207 "erase FC000000 +${filesize};" \
208 "cp.b 200000 FC000000 ${filesize};" \
209 "protect on FC000000 +${filesize}\0"
212 #if defined(CONFIG_TQM5200)
213 #define CUSTOM_ENV_SETTINGS \
214 "hostname=tqm5200\0" \
215 "bootfile=/tftpboot/tqm5200/uImage\0" \
216 "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \
217 "u-boot=/tftpboot/tqm5200/u-boot.bin\0"
218 #elif defined(CONFIG_CAM5200)
219 #define CUSTOM_ENV_SETTINGS \
220 "bootfile=cam5200/uImage\0" \
221 "u-boot=cam5200/u-boot.bin\0" \
222 "setup=tftp 200000 cam5200/setup.img; source 200000\0"
225 #if defined(CONFIG_TQM5200_B)
226 #define ENV_FLASH_LAYOUT \
227 "fdt_addr=FC100000\0" \
228 "kernel_addr=FC140000\0" \
229 "ramdisk_addr=FC600000\0"
230 #elif defined(CONFIG_CHARON)
231 #define ENV_FLASH_LAYOUT \
232 "fdt_addr=FDFC0000\0" \
233 "kernel_addr=FC0A0000\0" \
234 "ramdisk_addr=FC200000\0"
235 #else /* !CONFIG_TQM5200_B */
236 #define ENV_FLASH_LAYOUT \
237 "fdt_addr=FC0A0000\0" \
238 "kernel_addr=FC0C0000\0" \
239 "ramdisk_addr=FC300000\0"
242 #define CONFIG_EXTRA_ENV_SETTINGS \
244 "console=ttyPSC0\0" \
246 "kernel_addr_r=400000\0" \
247 "fdt_addr_r=600000\0" \
248 "rootpath=/opt/eldk/ppc_6xx\0" \
249 "ramargs=setenv bootargs root=/dev/ram rw\0" \
250 "nfsargs=setenv bootargs root=/dev/nfs rw " \
251 "nfsroot=${serverip}:${rootpath}\0" \
252 "addip=setenv bootargs ${bootargs} " \
253 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
254 ":${hostname}:${netdev}:off panic=1\0" \
255 "addcons=setenv bootargs ${bootargs} " \
256 "console=${console},${baudrate}\0" \
257 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
258 "flash_self_old=sete console ttyS0; " \
259 "run ramargs addip addcons addmtd; " \
260 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
261 "flash_self=run ramargs addip addcons;" \
262 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
263 "flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \
264 "bootm ${kernel_addr}\0" \
265 "flash_nfs=run nfsargs addip addcons;" \
266 "bootm ${kernel_addr} - ${fdt_addr}\0" \
267 "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
268 "sete console ttyS0; run nfsargs addip addcons;bootm\0" \
269 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
270 "tftp ${fdt_addr_r} ${fdt_file}; " \
271 "run nfsargs addip addcons addmtd; " \
272 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
273 CUSTOM_ENV_SETTINGS \
274 "load=tftp 200000 ${u-boot}\0" \
278 #define CONFIG_BOOTCOMMAND "run net_nfs"
281 * IPB Bus clocking configuration.
283 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
285 #if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
287 * PCI Bus clocking configuration
289 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
290 * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
291 * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
293 #define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
299 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
300 #ifdef CONFIG_TQM5200_REV100
301 #define CONFIG_SYS_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
303 #define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
307 * I2C clock frequency
309 * Please notice, that the resulting clock frequency could differ from the
310 * configured value. This is because the I2C clock is derived from system
311 * clock over a frequency divider with only a few divider values. U-Boot
312 * calculates the best approximation for CONFIG_SYS_I2C_SPEED. However the calculated
313 * approximation allways lies below the configured value, never above.
315 #define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
316 #define CONFIG_SYS_I2C_SLAVE 0x7F
319 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
320 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
321 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
322 * same configuration could be used.
324 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
325 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
326 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
327 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
330 * HW-Monitor configuration on Mini-FAP
332 #if defined (CONFIG_MINIFAP)
333 #define CONFIG_SYS_I2C_HWMON_ADDR 0x2C
336 /* List of I2C addresses to be verified by POST */
337 #if defined (CONFIG_MINIFAP)
338 #undef CONFIG_SYS_POST_I2C_ADDRS
339 #define CONFIG_SYS_POST_I2C_ADDRS {CONFIG_SYS_I2C_EEPROM_ADDR, \
340 CONFIG_SYS_I2C_HWMON_ADDR, \
341 CONFIG_SYS_I2C_SLAVE}
345 * Flash configuration
347 #define CONFIG_SYS_FLASH_BASE 0xFC000000
349 #if defined(CONFIG_CAM5200) && defined(CONFIG_CAM5200_NIOSFLASH)
350 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max num of flash banks
352 #define CONFIG_SYS_FLASH_WORD_SIZE unsigned int /* main flash device with */
353 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
354 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
356 #define CONFIG_SYS_FLASH_ADDR0 0x555
357 #define CONFIG_SYS_FLASH_ADDR1 0x2AA
358 #define CONFIG_SYS_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
359 #define CONFIG_SYS_MAX_FLASH_SECT 128
361 /* use CFI flash driver */
362 #define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
363 #define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
364 #define CONFIG_FLASH_CFI_MTD /* with MTD support */
365 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_BOOTCS_START }
366 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks
368 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */
371 #define CONFIG_SYS_FLASH_EMPTY_INFO
372 #define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MByte */
373 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
375 #if defined (CONFIG_CAM5200)
376 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000)
377 #elif defined(CONFIG_TQM5200_B)
378 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00080000)
380 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000)
383 /* Dynamic MTD partition support */
384 #define CONFIG_CMD_MTDPARTS
385 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
386 #define MTDIDS_DEFAULT "nor0=fc000000.flash"
388 #if defined(CONFIG_STK52XX)
389 # if defined(CONFIG_TQM5200_B)
390 # if defined(CONFIG_SYS_LOWBOOT)
391 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:1m(firmware)," \
398 # else /* highboot */
399 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:2560k(kernel),"\
405 # endif /* CONFIG_SYS_LOWBOOT */
406 # else /* !CONFIG_TQM5200_B */
407 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
414 # endif /* CONFIG_TQM5200_B */
415 #elif defined (CONFIG_CAM5200)
416 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:768k(firmware),"\
420 #elif defined (CONFIG_CHARON)
421 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
427 #elif defined (CONFIG_FO300)
428 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
435 # error "Unknown Carrier Board"
436 #endif /* CONFIG_STK52XX */
439 * Environment settings
441 #define CONFIG_ENV_IS_IN_FLASH 1
442 #define CONFIG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
443 #if defined(CONFIG_TQM5200_B) || defined (CONFIG_CAM5200)
444 #define CONFIG_ENV_SECT_SIZE 0x40000
446 #define CONFIG_ENV_SECT_SIZE 0x20000
447 #endif /* CONFIG_TQM5200_B */
448 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
449 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
454 #define CONFIG_SYS_MBAR 0xF0000000
455 #define CONFIG_SYS_SDRAM_BASE 0x00000000
456 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
458 /* Use ON-Chip SRAM until RAM will be available */
459 #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
461 /* preserve space for the post_word at end of on-chip SRAM */
462 #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_POST_SIZE
464 #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
467 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
468 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
470 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
471 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
472 # define CONFIG_SYS_RAMBOOT 1
475 #if defined (CONFIG_CAM5200)
476 # define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
477 #elif defined(CONFIG_TQM5200_B)
478 # define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
480 # define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
483 #define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
484 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
487 * Ethernet configuration
489 #define CONFIG_MPC5xxx_FEC 1
490 #define CONFIG_MPC5xxx_FEC_MII100
492 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
494 /* #define CONFIG_MPC5xxx_FEC_MII10 */
495 #define CONFIG_PHY_ADDR 0x00
500 * use CS1: Bit 0 (mask: 0x80000000):
501 * 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
502 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
503 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
504 * SPI on PSC3 according to PSC3 setting. Use for CAM5200.
505 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
506 * Use for REV200 STK52XX boards and FO300 boards. Do not use
507 * with REV100 modules (because, there I2C1 is used as I2C bus).
508 * use ATA: Bits 6-7 (mask 0x03000000):
509 * 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
510 * Use for CAM5200 board.
511 * 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
512 * use PSC6: Bits 9-11 (mask 0x00700000):
513 * 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
514 * UART, CODEC or IrDA.
515 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to
516 * enable extended POST tests.
517 * Use for MINI-FAP and TQM5200_IB boards.
518 * 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
519 * Extended POST test is not available.
520 * Use for STK52xx, FO300 and CAM5200 boards.
521 * WARNING: When the extended POST is enabled, these bits will
522 * be overridden by this code as GPIOs!
523 * use PCI_DIS: Bit 16 (mask 0x00008000):
524 * 1 -> disable PCI controller (on CAM5200 board).
525 * use USB: Bits 18-19 (mask 0x00003000):
526 * 10 -> two UARTs (on FO300 and CAM5200).
527 * use PSC3: Bits 20-23 (mask: 0x00000f00):
528 * 0000 -> All PSC3 pins are GPIOs.
529 * 1100 -> UART/SPI (on FO300 board).
530 * 0100 -> UART (on CAM5200 board).
531 * use PSC2: Bits 25:27 (mask: 0x00000030):
532 * 000 -> All PSC2 pins are GPIOs.
533 * 100 -> UART (on CAM5200 board).
534 * 001 -> CAN1/2 on PSC2 pins.
535 * Use for REV100 STK52xx boards
536 * 01x -> Use AC97 (on FO300 board).
537 * use PSC1: Bits 29-31 (mask: 0x00000007):
538 * 100 -> UART (on all boards).
540 #if !defined(CONFIG_SYS_GPS_PORT_CONFIG)
541 #if defined (CONFIG_MINIFAP)
542 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91000004
543 #elif defined (CONFIG_STK52XX)
544 # if defined (CONFIG_STK52XX_REV100)
545 # define CONFIG_SYS_GPS_PORT_CONFIG 0x81500014
546 # else /* STK52xx REV200 and above */
547 # if defined (CONFIG_TQM5200_REV100)
548 # error TQM5200 REV100 not supported on STK52XX REV200 or above
549 # else/* TQM5200 REV200 and above */
550 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91500404
553 #elif defined (CONFIG_FO300)
554 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91502c24
555 #elif defined (CONFIG_CAM5200)
556 # define CONFIG_SYS_GPS_PORT_CONFIG 0x8050A444
557 #else /* TMQ5200 Inbetriebnahme-Board */
558 # define CONFIG_SYS_GPS_PORT_CONFIG 0x81000004
565 #if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
566 # define CONFIG_RTC_M41T11 1
567 # define CONFIG_SYS_I2C_RTC_ADDR 0x68
568 # define CONFIG_SYS_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
571 # define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
575 * Miscellaneous configurable options
577 #define CONFIG_SYS_LONGHELP /* undef to save memory */
579 #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
581 #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
582 #if defined(CONFIG_CMD_KGDB)
583 #define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
586 #if defined(CONFIG_CMD_KGDB)
587 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
589 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
591 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
592 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
593 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
595 /* Enable an alternate, more extensive memory test */
596 #define CONFIG_SYS_ALT_MEMTEST
598 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
599 #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
601 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
604 * Various low-level settings
606 #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
607 #define CONFIG_SYS_HID0_FINAL HID0_ICE
609 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
610 #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
611 #ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
612 #define CONFIG_SYS_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
614 #define CONFIG_SYS_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
616 #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
617 #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
619 #define CONFIG_LAST_STAGE_INIT
622 * SRAM - Do not map below 2 GB in address space, because this area is used
623 * for SDRAM autosizing.
625 #define CONFIG_SYS_CS2_START 0xE5000000
626 #define CONFIG_SYS_CS2_SIZE 0x100000 /* 1 MByte */
627 #define CONFIG_SYS_CS2_CFG 0x0004D930
630 * Grafic controller - Do not map below 2 GB in address space, because this
631 * area is used for SDRAM autosizing.
633 #define SM501_FB_BASE 0xE0000000
634 #define CONFIG_SYS_CS1_START (SM501_FB_BASE)
635 #define CONFIG_SYS_CS1_SIZE 0x4000000 /* 64 MByte */
636 #define CONFIG_SYS_CS1_CFG 0x8F48FF70
637 #define SM501_MMIO_BASE CONFIG_SYS_CS1_START + 0x03E00000
639 #define CONFIG_SYS_CS_BURST 0x00000000
640 #define CONFIG_SYS_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
642 #if defined(CONFIG_CAM5200)
643 #define CONFIG_SYS_CS4_START 0xB0000000
644 #define CONFIG_SYS_CS4_SIZE 0x00010000
645 #define CONFIG_SYS_CS4_CFG 0x01019C10
647 #define CONFIG_SYS_CS5_START 0xD0000000
648 #define CONFIG_SYS_CS5_SIZE 0x01208000
649 #define CONFIG_SYS_CS5_CFG 0x1414BF10
652 #define CONFIG_SYS_RESET_ADDRESS 0xff000000
654 /*-----------------------------------------------------------------------
656 *-----------------------------------------------------------------------
658 #define CONFIG_USB_CLOCK 0x0001BBBB
659 #define CONFIG_USB_CONFIG 0x00001000
661 /*-----------------------------------------------------------------------
662 * IDE/ATA stuff Supports IDE harddisk
663 *-----------------------------------------------------------------------
666 #undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
668 #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
669 #undef CONFIG_IDE_LED /* LED for ide not supported */
671 #define CONFIG_IDE_RESET /* reset for ide supported */
672 #define CONFIG_IDE_PREINIT
674 #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
675 #define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
677 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
679 #define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
681 /* Offset for data I/O */
682 #define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
684 /* Offset for normal register accesses */
685 #define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
687 /* Offset for alternate registers */
688 #define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
690 /* Interval between registers */
691 #define CONFIG_SYS_ATA_STRIDE 4
693 /* Support ATAPI devices */
694 #define CONFIG_ATAPI 1
696 /*-----------------------------------------------------------------------
697 * Open firmware flat tree support
698 *-----------------------------------------------------------------------
700 #define OF_CPU "PowerPC,5200@0"
701 #define OF_SOC "soc5200@f0000000"
702 #define OF_TBCLK (bd->bi_busfreq / 4)
703 #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
705 #endif /* __CONFIG_H */