2 * Copyright (C) 2016 Timesys Corporation
3 * Copyright (C) 2016 Advantech Corporation
4 * Copyright (C) 2012 Freescale Semiconductor, Inc.
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef __ADVANTECH_DMSBA16_CONFIG_H
10 #define __ADVANTECH_DMSBA16_CONFIG_H
12 #include <asm/arch/imx-regs.h>
13 #include <asm/imx-common/gpio.h>
15 #define CONFIG_BOARD_NAME "Advantech DMS-BA16"
17 #define CONFIG_MXC_UART_BASE UART4_BASE
18 #define CONSOLE_DEV "ttymxc3"
19 #define CONFIG_EXTRA_BOOTARGS "panic=10"
21 #define CONFIG_BOOT_DIR ""
22 #define CONFIG_LOADCMD "fatload"
23 #define CONFIG_RFSPART "2"
25 #define CONFIG_SUPPORT_EMMC_BOOT
27 #include "mx6_common.h"
28 #include <linux/sizes.h>
30 #define CONFIG_CMDLINE_TAG
31 #define CONFIG_SETUP_MEMORY_TAGS
32 #define CONFIG_INITRD_TAG
33 #define CONFIG_REVISION_TAG
34 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
36 #define CONFIG_MXC_GPIO
37 #define CONFIG_MXC_UART
39 #define CONFIG_CMD_FUSE
40 #define CONFIG_MXC_OCOTP
43 #define CONFIG_CMD_SATA
44 #define CONFIG_DWC_AHSATA
45 #define CONFIG_SYS_SATA_MAX_DEVICE 1
46 #define CONFIG_DWC_AHSATA_PORT_ID 0
47 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
52 #define CONFIG_FSL_ESDHC
53 #define CONFIG_FSL_USDHC
54 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
55 #define CONFIG_BOUNCE_BUFFER
58 #define CONFIG_USB_EHCI
59 #define CONFIG_USB_EHCI_MX6
60 #define CONFIG_USB_STORAGE
61 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
62 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
63 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
64 #define CONFIG_MXC_USB_FLAGS 0
65 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
67 #define CONFIG_USBD_HS
68 #define CONFIG_USB_FUNCTION_MASS_STORAGE
69 #define CONFIG_USB_GADGET_VBUS_DRAW 2
71 /* Networking Configs */
72 #define CONFIG_FEC_MXC
74 #define IMX_FEC_BASE ENET_BASE_ADDR
75 #define CONFIG_FEC_XCV_TYPE RGMII
76 #define CONFIG_ETHPRIME "FEC"
77 #define CONFIG_FEC_MXC_PHYADDR 4
79 #define CONFIG_PHY_ATHEROS
83 #define CONFIG_MXC_SPI
84 #define CONFIG_SF_DEFAULT_BUS 0
85 #define CONFIG_SF_DEFAULT_CS 0
86 #define CONFIG_SF_DEFAULT_SPEED 20000000
87 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
90 /* allow to overwrite serial and ethaddr */
91 #define CONFIG_ENV_OVERWRITE
92 #define CONFIG_CONS_INDEX 1
94 /* Command definition */
95 #define CONFIG_CMD_BMODE
97 #define CONFIG_LOADADDR 0x12000000
98 #define CONFIG_SYS_TEXT_BASE 0x17800000
100 #define CONFIG_EXTRA_ENV_SETTINGS \
101 "script=boot.scr\0" \
102 "image=" CONFIG_BOOT_DIR "/uImage\0" \
103 "uboot=u-boot.imx\0" \
104 "fdt_file=" CONFIG_BOOT_DIR "/" CONFIG_DEFAULT_FDT_FILE "\0" \
105 "fdt_addr=0x18000000\0" \
108 "console=" CONSOLE_DEV "\0" \
109 "fdt_high=0xffffffff\0" \
110 "initrd_high=0xffffffff\0" \
114 "loadcmd=" CONFIG_LOADCMD "\0" \
115 "rfspart=" CONFIG_RFSPART "\0" \
116 "update_sd_firmware=" \
117 "if test ${ip_dyn} = yes; then " \
118 "setenv get_cmd dhcp; " \
120 "setenv get_cmd tftp; " \
122 "if mmc dev ${mmcdev}; then " \
123 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
124 "setexpr fw_sz ${filesize} / 0x200; " \
125 "setexpr fw_sz ${fw_sz} + 1; " \
126 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
130 "if tftp $loadaddr $uboot; then " \
132 "sf erase 0 0xC0000; " \
133 "sf write $loadaddr 0x400 $filesize; " \
134 "echo 'U-Boot upgraded. Please reset'; " \
136 "setargs=setenv bootargs console=${console},${baudrate} " \
137 "root=/dev/${rootdev} rw rootwait " CONFIG_EXTRA_BOOTARGS "\0" \
139 "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
140 "bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
143 "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
144 "loadfdt=${loadcmd} ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
146 "if run loadbootscript; then " \
149 "if run loadimage; then " \
153 "doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
155 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
156 "if run loadfdt; then " \
157 "bootm ${loadaddr} - ${fdt_addr}; " \
159 "if test ${boot_fdt} = try; then " \
162 "echo WARN: Cannot load the DT; " \
168 "netargs=setenv bootargs console=${console},${baudrate} " \
170 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
171 "netboot=echo Booting from net ...; " \
173 "if test ${ip_dyn} = yes; then " \
174 "setenv get_cmd dhcp; " \
176 "setenv get_cmd tftp; " \
178 "${get_cmd} ${image}; " \
179 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
180 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
181 "bootm ${loadaddr} - ${fdt_addr}; " \
183 "if test ${boot_fdt} = try; then " \
186 "echo WARN: Cannot load the DT; " \
193 #define CONFIG_BOOTCOMMAND \
196 "setenv devnum 0; " \
197 "setenv rootdev sda${rfspart}; " \
201 "setenv rootdev mmcblk0p${rfspart}; " \
203 "setenv devnum ${sddev}; " \
204 "if mmc dev ${devnum}; then " \
208 "setenv devnum ${emmcdev}; " \
209 "setenv rootdev mmcblk${emmcdev}p${rfspart}; " \
210 "if mmc dev ${devnum}; then " \
216 #define CONFIG_ARP_TIMEOUT 200UL
218 /* Miscellaneous configurable options */
219 #define CONFIG_SYS_LONGHELP
220 #define CONFIG_AUTO_COMPLETE
222 /* Print Buffer Size */
223 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
224 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
226 #define CONFIG_SYS_MEMTEST_START 0x10000000
227 #define CONFIG_SYS_MEMTEST_END 0x10010000
228 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
230 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
232 #define CONFIG_CMDLINE_EDITING
234 /* Physical Memory Map */
235 #define CONFIG_NR_DRAM_BANKS 1
236 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
238 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
239 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
240 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
242 #define CONFIG_SYS_INIT_SP_OFFSET \
243 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
244 #define CONFIG_SYS_INIT_SP_ADDR \
245 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
247 /* FLASH and environment organization */
249 #define CONFIG_ENV_IS_IN_SPI_FLASH
250 #define CONFIG_ENV_SIZE (8 * 1024)
251 #define CONFIG_ENV_OFFSET (768 * 1024)
252 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
253 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
254 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
255 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
256 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
258 #ifndef CONFIG_SYS_DCACHE_OFF
261 #define CONFIG_SYS_FSL_USDHC_NUM 3
265 #define CONFIG_VIDEO_IPUV3
266 #define CONFIG_VIDEO_BMP_RLE8
267 #define CONFIG_SPLASH_SCREEN
268 #define CONFIG_SPLASH_SCREEN_ALIGN
269 #define CONFIG_BMP_16BPP
270 #define CONFIG_VIDEO_LOGO
271 #define CONFIG_VIDEO_BMP_LOGO
272 #define CONFIG_IPUV3_CLK 260000000
273 #define CONFIG_IMX_HDMI
274 #define CONFIG_IMX_VIDEO_SKIP
277 #define CONFIG_PWM_IMX
278 #define CONFIG_IMX6_PWM_PER_CLK 66000000
280 #undef CONFIG_CMD_PCI
281 #ifdef CONFIG_CMD_PCI
282 #define CONFIG_PCI_SCAN_SHOW
283 #define CONFIG_PCIE_IMX
284 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
285 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5)
289 #define CONFIG_SYS_I2C
290 #define CONFIG_SYS_I2C_MXC
291 #define CONFIG_SYS_I2C_SPEED 100000
292 #define CONFIG_SYS_I2C_MXC_I2C1
293 #define CONFIG_SYS_I2C_MXC_I2C2
294 #define CONFIG_SYS_I2C_MXC_I2C3
296 #endif /* __ADVANTECH_DMSBA16_CONFIG_H */