2 * Configuation settings for the Alpha Project AP-SH4A-4A board
4 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
6 * SPDX-License-Identifier: GPL-2.0+
10 #define __AP_SH4A_4A_H
12 #define CONFIG_CPU_SH7734 1
13 #define CONFIG_400MHZ_MODE 1
15 #define CONFIG_DISPLAY_BOARDINFO
16 #undef CONFIG_SHOW_BOOT_PROGRESS
19 #define CONFIG_SH_ETHER_USE_PORT (0)
20 #define CONFIG_SH_ETHER_PHY_ADDR (0x0)
21 #define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII)
22 #define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */
23 #define CONFIG_BITBANGMII
24 #define CONFIG_BITBANGMII_MULTI
26 /* undef to save memory */
27 /* Monitor Command Prompt */
28 /* Buffer size for Console output */
29 #define CONFIG_SYS_PBSIZE 256
30 /* List of legal baudrate settings for this board */
31 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
35 #define CONFIG_CONS_SCIF4 1
37 /* Suppress display of console information at boot */
40 #define CONFIG_SYS_SDRAM_BASE (0x88000000)
41 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
42 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
44 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
45 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE)
46 /* Enable alternate, more extensive, memory test */
47 /* Scratch address used by the alternate memory test */
48 #undef CONFIG_SYS_MEMTEST_SCRATCH
50 /* Enable temporary baudrate change while serial download */
51 #undef CONFIG_SYS_LOADS_BAUD_CHANGE
54 #define CONFIG_FLASH_CFI_DRIVER 1
55 #define CONFIG_SYS_FLASH_CFI
56 #undef CONFIG_SYS_FLASH_QUIET_TEST
57 #define CONFIG_SYS_FLASH_EMPTY_INFO
58 #define CONFIG_SYS_FLASH_BASE (0xA0000000)
59 #define CONFIG_SYS_MAX_FLASH_SECT 512
61 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */
62 #define CONFIG_SYS_MAX_FLASH_BANKS 1
63 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
65 /* Timeout for Flash erase operations (in ms) */
66 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
67 /* Timeout for Flash write operations (in ms) */
68 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
69 /* Timeout for Flash set sector lock bit operations (in ms) */
70 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
71 /* Timeout for Flash clear lock bit operations (in ms) */
72 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
75 * Use hardware flash sectors protection instead
76 * of U-Boot software protection
78 #undef CONFIG_SYS_FLASH_PROTECTION
79 #undef CONFIG_SYS_DIRECT_FLASH_TFTP
81 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
82 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
84 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
85 /* Size of DRAM reserved for malloc() use */
86 #define CONFIG_SYS_MALLOC_LEN (256 * 1024)
87 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
90 #define CONFIG_ENV_OVERWRITE 1
91 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
92 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
93 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
94 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
95 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
96 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
99 #if defined(CONFIG_400MHZ_MODE)
100 #define CONFIG_SYS_CLK_FREQ 50000000
102 #define CONFIG_SYS_CLK_FREQ 44444444
104 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
105 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
106 #define CONFIG_SYS_TMU_CLK_DIV 4
108 #endif /* __AP_SH4A_4A_H */