2 * Configuation settings for the Alpha Project AP-SH4A-4A board
4 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
6 * SPDX-License-Identifier: GPL-2.0+
10 #define __AP_SH4A_4A_H
12 #define CONFIG_CPU_SH7734 1
13 #define CONFIG_AP_SH4A_4A 1
14 #define CONFIG_400MHZ_MODE 1
15 /* #define CONFIG_533MHZ_MODE 1 */
17 #define CONFIG_SYS_TEXT_BASE 0x8BFC0000
19 #define CONFIG_DISPLAY_BOARDINFO
20 #undef CONFIG_SHOW_BOOT_PROGRESS
23 #define CONFIG_SH_ETHER 1
24 #define CONFIG_SH_ETHER_USE_PORT (0)
25 #define CONFIG_SH_ETHER_PHY_ADDR (0x0)
26 #define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII)
27 #define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */
28 #define CONFIG_BITBANGMII
29 #define CONFIG_BITBANGMII_MULTI
31 /* undef to save memory */
32 #define CONFIG_SYS_LONGHELP
33 /* Monitor Command Prompt */
34 /* Buffer size for Console output */
35 #define CONFIG_SYS_PBSIZE 256
36 /* List of legal baudrate settings for this board */
37 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
41 #define CONFIG_CONS_SCIF4 1
43 /* Suppress display of console information at boot */
46 #define CONFIG_SYS_SDRAM_BASE (0x88000000)
47 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
48 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
50 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
51 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE)
52 /* Enable alternate, more extensive, memory test */
53 #undef CONFIG_SYS_ALT_MEMTEST
54 /* Scratch address used by the alternate memory test */
55 #undef CONFIG_SYS_MEMTEST_SCRATCH
57 /* Enable temporary baudrate change while serial download */
58 #undef CONFIG_SYS_LOADS_BAUD_CHANGE
61 #define CONFIG_FLASH_CFI_DRIVER 1
62 #define CONFIG_SYS_FLASH_CFI
63 #undef CONFIG_SYS_FLASH_QUIET_TEST
64 #define CONFIG_SYS_FLASH_EMPTY_INFO
65 #define CONFIG_SYS_FLASH_BASE (0xA0000000)
66 #define CONFIG_SYS_MAX_FLASH_SECT 512
68 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */
69 #define CONFIG_SYS_MAX_FLASH_BANKS 1
70 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
72 /* Timeout for Flash erase operations (in ms) */
73 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
74 /* Timeout for Flash write operations (in ms) */
75 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
76 /* Timeout for Flash set sector lock bit operations (in ms) */
77 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
78 /* Timeout for Flash clear lock bit operations (in ms) */
79 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
82 * Use hardware flash sectors protection instead
83 * of U-Boot software protection
85 #undef CONFIG_SYS_FLASH_PROTECTION
86 #undef CONFIG_SYS_DIRECT_FLASH_TFTP
88 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
89 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
91 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
92 /* Size of DRAM reserved for malloc() use */
93 #define CONFIG_SYS_MALLOC_LEN (256 * 1024)
94 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
97 #define CONFIG_ENV_OVERWRITE 1
98 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
99 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
100 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
101 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
102 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
103 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
106 #if defined(CONFIG_400MHZ_MODE)
107 #define CONFIG_SYS_CLK_FREQ 50000000
109 #define CONFIG_SYS_CLK_FREQ 44444444
111 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
112 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
113 #define CONFIG_SYS_TMU_CLK_DIV 4
115 #endif /* __AP_SH4A_4A_H */