3 * Configuration settings for the Armadeus Project motherboard APF27
5 * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org>
7 * SPDX-License-Identifier: GPL-2.0+
13 #define CONFIG_ENV_VERSION 10
14 #define CONFIG_BOARD_NAME apf27
19 #define CONFIG_MX27 /* This is a Freescale i.MX27 Chip */
20 #define CONFIG_MACH_TYPE 1698 /* APF27 */
23 * Enable the call to miscellaneous platform dependent initialization.
29 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
30 #define CONFIG_SPL_MAX_SIZE 2048
31 #define CONFIG_SPL_TEXT_BASE 0xA0000000
33 /* NAND boot config */
34 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
35 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800
36 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
37 #define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN - 0x800
42 #define CONFIG_BOOTP_SUBNETMASK
43 #define CONFIG_BOOTP_GATEWAY
44 #define CONFIG_BOOTP_HOSTNAME
45 #define CONFIG_BOOTP_BOOTPATH
46 #define CONFIG_BOOTP_BOOTFILESIZE
47 #define CONFIG_BOOTP_DNS
48 #define CONFIG_BOOTP_DNS2
50 #define CONFIG_HOSTNAME CONFIG_BOARD_NAME
51 #define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
54 * Memory configurations
56 #define CONFIG_NR_DRAM_POPULATED 1
57 #define CONFIG_NR_DRAM_BANKS 2
59 #define ACFG_SDRAM_MBYTE_SYZE 64
61 #define PHYS_SDRAM_1 0xA0000000
62 #define PHYS_SDRAM_2 0xB0000000
63 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
64 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512<<10))
65 #define CONFIG_SYS_MEMTEST_START 0xA0000000 /* memtest test area */
66 #define CONFIG_SYS_MEMTEST_END 0xA0300000 /* 3 MiB RAM test */
68 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE \
69 + PHYS_SDRAM_1_SIZE - 0x0100000)
71 #define CONFIG_SYS_TEXT_BASE 0xA0000800
76 #define ACFG_MONITOR_OFFSET 0x00000000
77 #define CONFIG_SYS_MONITOR_LEN 0x00100000 /* 1MiB */
78 #define CONFIG_ENV_OVERWRITE
79 #define CONFIG_ENV_OFFSET 0x00100000 /* NAND offset */
80 #define CONFIG_ENV_SIZE 0x00020000 /* 128kB */
81 #define CONFIG_ENV_RANGE 0X00080000 /* 512kB */
82 #define CONFIG_ENV_OFFSET_REDUND \
83 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) /* +512kB */
84 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE /* 512kB */
85 #define CONFIG_FIRMWARE_OFFSET 0x00200000
86 #define CONFIG_FIRMWARE_SIZE 0x00080000 /* 512kB */
87 #define CONFIG_KERNEL_OFFSET 0x00300000
88 #define CONFIG_ROOTFS_OFFSET 0x00800000
90 #define CONFIG_MTDMAP "mxc_nand.0"
91 #define MTDIDS_DEFAULT "nand0=" CONFIG_MTDMAP
92 #define MTDPARTS_DEFAULT "mtdparts=" CONFIG_MTDMAP \
102 * U-Boot general configurations
104 #define CONFIG_SYS_LONGHELP
105 #define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */
106 #define CONFIG_SYS_MAXARGS 16 /* max command args */
107 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
108 /* Boot argument buffer size */
109 #define CONFIG_AUTO_COMPLETE
110 #define CONFIG_CMDLINE_EDITING
111 #define CONFIG_ENV_VARS_UBOOT_CONFIG
112 #define CONFIG_PREBOOT "run check_flash check_env;"
117 #define CONFIG_CMDLINE_TAG /* send commandline to Kernel */
118 #define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
119 #define CONFIG_INITRD_TAG /* send initrd params */
121 #define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin"
123 #define ACFG_CONSOLE_DEV ttySMX0
124 #define CONFIG_BOOTCOMMAND "run ubifsboot"
125 #define CONFIG_SYS_AUTOLOAD "no"
127 * Default load address for user programs and kernel
129 #define CONFIG_LOADADDR 0xA0000000
130 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
135 #define CONFIG_EXTRA_ENV_SETTINGS \
136 "env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \
137 "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \
138 "mtdparts=" MTDPARTS_DEFAULT "\0" \
139 "partition=nand0,6\0" \
140 "u-boot_addr=" __stringify(ACFG_MONITOR_OFFSET) "\0" \
141 "env_addr=" __stringify(CONFIG_ENV_OFFSET) "\0" \
142 "firmware_addr=" __stringify(CONFIG_FIRMWARE_OFFSET) "\0" \
143 "firmware_size=" __stringify(CONFIG_FIRMWARE_SIZE) "\0" \
144 "kernel_addr=" __stringify(CONFIG_KERNEL_OFFSET) "\0" \
145 "rootfs_addr=" __stringify(CONFIG_ROOTFS_OFFSET) "\0" \
146 "board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \
147 "kernel_addr_r=A0000000\0" \
148 "check_env=if test -n ${flash_env_version}; " \
149 "then env default env_version; " \
150 "else env set flash_env_version ${env_version}; env save; "\
152 "if itest ${flash_env_version} < ${env_version}; then " \
153 "echo \"*** Warning - Environment version" \
154 " change suggests: run flash_reset_env; reset\"; "\
155 "env default flash_reset_env; "\
157 "check_flash=nand lock; nand unlock ${env_addr}; \0" \
158 "flash_reset_env=env default -f -a; saveenv; run update_env;" \
159 "echo Flash environment variables erased!\0" \
160 "download_uboot=tftpboot ${loadaddr} ${board_name}" \
161 "-u-boot-with-spl.bin\0" \
162 "flash_uboot=nand unlock ${u-boot_addr} ;" \
163 "nand erase.part u-boot;" \
164 "if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\
165 "then nand lock; nand unlock ${env_addr};" \
166 "echo Flashing of uboot succeed;" \
167 "else echo Flashing of uboot failed;" \
169 "update_uboot=run download_uboot flash_uboot\0" \
170 "download_env=tftpboot ${loadaddr} ${board_name}" \
171 "-u-boot-env.txt\0" \
172 "flash_env=env import -t ${loadaddr}; env save; \0" \
173 "update_env=run download_env flash_env\0" \
174 "update_all=run update_env update_uboot\0" \
175 "unlock_regs=mw 10000008 0; mw 10020008 0\0" \
180 #define CONFIG_MXC_UART
181 #define CONFIG_CONS_INDEX 1
182 #define CONFIG_MXC_UART_BASE UART1_BASE
187 #define CONFIG_MXC_GPIO
196 #define CONFIG_NAND_MXC
198 #define CONFIG_MXC_NAND_REGS_BASE 0xD8000000
199 #define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE
200 #define CONFIG_SYS_MAX_NAND_DEVICE 1
202 #define CONFIG_MXC_NAND_HWECC
203 #define CONFIG_SYS_NAND_LARGEPAGE
204 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
205 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
206 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
207 #define CONFIG_SYS_NAND_PAGE_COUNT CONFIG_SYS_NAND_BLOCK_SIZE / \
208 CONFIG_SYS_NAND_PAGE_SIZE
209 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
210 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 11
211 #define NAND_MAX_CHIPS 1
213 #define CONFIG_FLASH_SHOW_PROGRESS 45
214 #define CONFIG_SYS_NAND_QUIET 1
217 * Partitions & Filsystems
219 #define CONFIG_MTD_DEVICE
220 #define CONFIG_MTD_PARTITIONS
221 #define CONFIG_SUPPORT_VFAT
224 * Ethernet (on SOC imx FEC)
226 #define CONFIG_FEC_MXC
227 #define CONFIG_FEC_MXC_PHYADDR 0x1f
228 #define CONFIG_MII /* MII PHY management */
233 #ifndef CONFIG_SPL_BUILD
236 #define CONFIG_FPGA_COUNT 1
237 #define CONFIG_FPGA_XILINX
238 #define CONFIG_FPGA_SPARTAN3
239 #define CONFIG_SYS_FPGA_WAIT 250 /* 250 ms */
240 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
241 #define CONFIG_SYS_FPGA_CHECK_CTRLC
242 #define CONFIG_SYS_FPGA_CHECK_ERROR
247 #ifdef CONFIG_CMD_IMX_FUSE
248 #define IIM_MAC_BANK 0
249 #define IIM_MAC_ROW 5
250 #define IIM0_SCC_KEY 11
258 #ifdef CONFIG_CMD_I2C
259 #define CONFIG_SYS_I2C
260 #define CONFIG_SYS_I2C_MXC
261 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
262 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
263 #define CONFIG_SYS_MXC_I2C1_SPEED 100000 /* 100 kHz */
264 #define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F
265 #define CONFIG_SYS_MXC_I2C2_SPEED 100000 /* 100 kHz */
266 #define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F
267 #define CONFIG_SYS_I2C_NOPROBES { }
269 #ifdef CONFIG_CMD_EEPROM
270 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24LC02 */
271 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
272 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
273 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* msec */
274 #endif /* CONFIG_CMD_EEPROM */
275 #endif /* CONFIG_CMD_I2C */
280 #ifdef CONFIG_CMD_MMC
281 #define CONFIG_MXC_MCI_REGS_BASE 0x10014000
287 #ifdef CONFIG_CMD_DATE
288 #define CONFIG_RTC_DS1374
289 #define CONFIG_SYS_RTC_BUS_NUM 0
290 #endif /* CONFIG_CMD_DATE */
295 * 31 | x |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
296 * |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------|
298 #define CONFIG_MX27_CLK32 32768 /* 32768 or 32000 Hz crystal */
300 #if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */
302 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
303 #define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */
306 #if (ACFG_SDRAM_MBYTE_SYZE == 128)
308 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
309 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
312 #if (ACFG_SDRAM_MBYTE_SYZE == 256)
314 #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
315 #define PHYS_SDRAM_2_SIZE 0x10000000 /* 256 MB */
318 #endif /* __CONFIG_H */