3 * Configuration settings for the Armadeus Project motherboard APF27
5 * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org>
7 * SPDX-License-Identifier: GPL-2.0+
13 #define CONFIG_VERSION_VARIABLE
14 #define CONFIG_ENV_VERSION 10
15 #define CONFIG_IDENT_STRING " apf27 patch 3.10"
16 #define CONFIG_BOARD_NAME apf27
21 #define CONFIG_MX27 /* This is a Freescale i.MX27 Chip */
22 #define CONFIG_MACH_TYPE 1698 /* APF27 */
23 #define CONFIG_SYS_GENERIC_BOARD
26 * Enable the call to miscellaneous platform dependent initialization.
28 #define CONFIG_SYS_NO_FLASH /* to be define before <config_cmd_default.h> */
31 * Board display option
33 #define CONFIG_DISPLAY_BOARDINFO
34 #define CONFIG_DISPLAY_CPUINFO
39 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
40 #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
41 #define CONFIG_SPL_MAX_SIZE 2048
42 #define CONFIG_SPL_TEXT_BASE 0xA0000000
44 /* NAND boot config */
45 #define CONFIG_SPL_NAND_SUPPORT
46 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
47 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800
48 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
49 #define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN - 0x800
54 #define CONFIG_BOOTP_SUBNETMASK
55 #define CONFIG_BOOTP_GATEWAY
56 #define CONFIG_BOOTP_HOSTNAME
57 #define CONFIG_BOOTP_BOOTPATH
58 #define CONFIG_BOOTP_BOOTFILESIZE
59 #define CONFIG_BOOTP_DNS
60 #define CONFIG_BOOTP_DNS2
62 #define CONFIG_HOSTNAME CONFIG_BOARD_NAME
63 #define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
68 #include <config_cmd_default.h>
70 #define CONFIG_CMD_ASKENV /* ask for env variable */
71 #define CONFIG_CMD_BSP /* Board Specific functions */
72 #define CONFIG_CMD_CACHE /* icache, dcache */
73 #define CONFIG_CMD_DATE
74 #define CONFIG_CMD_DHCP /* DHCP Support */
75 #define CONFIG_CMD_DNS
76 #define CONFIG_CMD_EEPROM
77 #define CONFIG_CMD_EXT2
78 #define CONFIG_CMD_FAT /* FAT support */
79 #define CONFIG_CMD_IMX_FUSE /* imx iim fuse */
80 #define CONFIG_CMD_I2C
81 #define CONFIG_CMD_MII /* MII support */
82 #define CONFIG_CMD_MMC
83 #define CONFIG_CMD_MTDPARTS /* MTD partition support */
84 #define CONFIG_CMD_NAND /* NAND support */
85 #define CONFIG_CMD_NAND_LOCK_UNLOCK
86 #define CONFIG_CMD_NAND_TRIMFFS
87 #define CONFIG_CMD_NFS /* NFS support */
88 #define CONFIG_CMD_PING /* ping support */
89 #define CONFIG_CMD_UBI
90 #define CONFIG_CMD_UBIFS
93 * Memory configurations
95 #define CONFIG_NR_DRAM_POPULATED 1
96 #define CONFIG_NR_DRAM_BANKS 2
98 #define ACFG_SDRAM_MBYTE_SYZE 64
100 #define PHYS_SDRAM_1 0xA0000000
101 #define PHYS_SDRAM_2 0xB0000000
102 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
103 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512<<10))
104 #define CONFIG_SYS_MEMTEST_START 0xA0000000 /* memtest test area */
105 #define CONFIG_SYS_MEMTEST_END 0xA0300000 /* 3 MiB RAM test */
107 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE \
108 + PHYS_SDRAM_1_SIZE - 0x0100000)
110 #define CONFIG_SYS_TEXT_BASE 0xA0000800
115 #define ACFG_MONITOR_OFFSET 0x00000000
116 #define CONFIG_SYS_MONITOR_LEN 0x00100000 /* 1MiB */
117 #define CONFIG_ENV_IS_IN_NAND
118 #define CONFIG_ENV_OVERWRITE
119 #define CONFIG_ENV_OFFSET 0x00100000 /* NAND offset */
120 #define CONFIG_ENV_SIZE 0x00020000 /* 128kB */
121 #define CONFIG_ENV_RANGE 0X00080000 /* 512kB */
122 #define CONFIG_ENV_OFFSET_REDUND \
123 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) /* +512kB */
124 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE /* 512kB */
125 #define CONFIG_FIRMWARE_OFFSET 0x00200000
126 #define CONFIG_FIRMWARE_SIZE 0x00080000 /* 512kB */
127 #define CONFIG_KERNEL_OFFSET 0x00300000
128 #define CONFIG_ROOTFS_OFFSET 0x00800000
130 #define CONFIG_MTDMAP "mxc_nand.0"
131 #define MTDIDS_DEFAULT "nand0=" CONFIG_MTDMAP
132 #define MTDPARTS_DEFAULT "mtdparts=" CONFIG_MTDMAP \
142 * U-Boot general configurations
144 #define CONFIG_SYS_LONGHELP
145 #define CONFIG_SYS_PROMPT "BIOS> " /* prompt string */
146 #define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */
147 #define CONFIG_SYS_PBSIZE \
148 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
149 /* Print buffer size */
150 #define CONFIG_SYS_MAXARGS 16 /* max command args */
151 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
152 /* Boot argument buffer size */
153 #define CONFIG_AUTO_COMPLETE
154 #define CONFIG_CMDLINE_EDITING
155 #define CONFIG_SYS_HUSH_PARSER /* enable the "hush" shell */
156 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /* secondary prompt string */
157 #define CONFIG_ENV_VARS_UBOOT_CONFIG
158 #define CONFIG_PREBOOT "run check_flash check_env;"
164 #define CONFIG_CMDLINE_TAG /* send commandline to Kernel */
165 #define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
166 #define CONFIG_INITRD_TAG /* send initrd params */
168 #define CONFIG_OF_LIBFDT
170 #define CONFIG_BOOTDELAY 5
171 #define CONFIG_ZERO_BOOTDELAY_CHECK
172 #define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin"
173 #define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," \
174 __stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \
175 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "
177 #define ACFG_CONSOLE_DEV ttySMX0
178 #define CONFIG_BOOTCOMMAND "run ubifsboot"
179 #define CONFIG_SYS_AUTOLOAD "no"
181 * Default load address for user programs and kernel
183 #define CONFIG_LOADADDR 0xA0000000
184 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
189 #define CONFIG_EXTRA_ENV_SETTINGS \
190 "env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \
191 "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \
192 "mtdparts=" MTDPARTS_DEFAULT "\0" \
193 "partition=nand0,6\0" \
194 "u-boot_addr=" __stringify(ACFG_MONITOR_OFFSET) "\0" \
195 "env_addr=" __stringify(CONFIG_ENV_OFFSET) "\0" \
196 "firmware_addr=" __stringify(CONFIG_FIRMWARE_OFFSET) "\0" \
197 "firmware_size=" __stringify(CONFIG_FIRMWARE_SIZE) "\0" \
198 "kernel_addr=" __stringify(CONFIG_KERNEL_OFFSET) "\0" \
199 "rootfs_addr=" __stringify(CONFIG_ROOTFS_OFFSET) "\0" \
200 "board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \
201 "kernel_addr_r=A0000000\0" \
202 "check_env=if test -n ${flash_env_version}; " \
203 "then env default env_version; " \
204 "else env set flash_env_version ${env_version}; env save; "\
206 "if itest ${flash_env_version} < ${env_version}; then " \
207 "echo \"*** Warning - Environment version" \
208 " change suggests: run flash_reset_env; reset\"; "\
209 "env default flash_reset_env; "\
211 "check_flash=nand lock; nand unlock ${env_addr}; \0" \
212 "flash_reset_env=env default -f -a; saveenv; run update_env;" \
213 "echo Flash environment variables erased!\0" \
214 "download_uboot=tftpboot ${loadaddr} ${board_name}" \
215 "-u-boot-with-spl.bin\0" \
216 "flash_uboot=nand unlock ${u-boot_addr} ;" \
217 "nand erase.part u-boot;" \
218 "if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\
219 "then nand lock; nand unlock ${env_addr};" \
220 "echo Flashing of uboot succeed;" \
221 "else echo Flashing of uboot failed;" \
223 "update_uboot=run download_uboot flash_uboot\0" \
224 "download_env=tftpboot ${loadaddr} ${board_name}" \
225 "-u-boot-env.txt\0" \
226 "flash_env=env import -t ${loadaddr}; env save; \0" \
227 "update_env=run download_env flash_env\0" \
228 "update_all=run update_env update_uboot\0" \
229 "unlock_regs=mw 10000008 0; mw 10020008 0\0" \
234 #define CONFIG_MXC_UART
235 #define CONFIG_CONS_INDEX 1
236 #define CONFIG_BAUDRATE 115200
237 #define CONFIG_MXC_UART_BASE UART1_BASE
242 #define CONFIG_MXC_GPIO
251 #define CONFIG_NAND_MXC
253 #define CONFIG_MXC_NAND_REGS_BASE 0xD8000000
254 #define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE
255 #define CONFIG_SYS_MAX_NAND_DEVICE 1
257 #define CONFIG_MXC_NAND_HWECC
258 #define CONFIG_SYS_NAND_LARGEPAGE
259 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
260 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
261 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
262 #define CONFIG_SYS_NAND_PAGE_COUNT CONFIG_SYS_NAND_BLOCK_SIZE / \
263 CONFIG_SYS_NAND_PAGE_SIZE
264 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
265 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 11
266 #define NAND_MAX_CHIPS 1
268 #define CONFIG_FLASH_SHOW_PROGRESS 45
269 #define CONFIG_SYS_NAND_QUIET 1
272 * Partitions & Filsystems
274 #define CONFIG_MTD_DEVICE
275 #define CONFIG_MTD_PARTITIONS
276 #define CONFIG_DOS_PARTITION
277 #define CONFIG_SUPPORT_VFAT
282 #define CONFIG_RBTREE
286 * Ethernet (on SOC imx FEC)
288 #define CONFIG_FEC_MXC
289 #define CONFIG_FEC_MXC_PHYADDR 0x1f
290 #define CONFIG_MII /* MII PHY management */
295 #ifndef CONFIG_SPL_BUILD
298 #define CONFIG_FPGA_COUNT 1
299 #define CONFIG_FPGA_XILINX
300 #define CONFIG_FPGA_SPARTAN3
301 #define CONFIG_SYS_FPGA_WAIT 250 /* 250 ms */
302 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
303 #define CONFIG_SYS_FPGA_CHECK_CTRLC
304 #define CONFIG_SYS_FPGA_CHECK_ERROR
309 #ifdef CONFIG_CMD_IMX_FUSE
310 #define IIM_MAC_BANK 0
311 #define IIM_MAC_ROW 5
312 #define IIM0_SCC_KEY 11
320 #ifdef CONFIG_CMD_I2C
321 #define CONFIG_SYS_I2C
322 #define CONFIG_SYS_I2C_MXC
323 #define CONFIG_SYS_MXC_I2C1_SPEED 100000 /* 100 kHz */
324 #define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F
325 #define CONFIG_SYS_MXC_I2C2_SPEED 100000 /* 100 kHz */
326 #define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F
327 #define CONFIG_SYS_I2C_NOPROBES { }
329 #ifdef CONFIG_CMD_EEPROM
330 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24LC02 */
331 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
332 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
333 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* msec */
334 #endif /* CONFIG_CMD_EEPROM */
335 #endif /* CONFIG_CMD_I2C */
340 #ifdef CONFIG_CMD_MMC
342 #define CONFIG_GENERIC_MMC
343 #define CONFIG_MXC_MMC
344 #define CONFIG_MXC_MCI_REGS_BASE 0x10014000
350 #ifdef CONFIG_CMD_DATE
351 #define CONFIG_RTC_DS1374
352 #define CONFIG_SYS_RTC_BUS_NUM 0
353 #endif /* CONFIG_CMD_DATE */
358 * 31 | x |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
359 * |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------|
361 #define CONFIG_MX27_CLK32 32768 /* 32768 or 32000 Hz crystal */
363 #if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */
365 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
366 #define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */
369 #if (ACFG_SDRAM_MBYTE_SYZE == 128)
371 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
372 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
375 #if (ACFG_SDRAM_MBYTE_SYZE == 256)
377 #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
378 #define PHYS_SDRAM_2_SIZE 0x10000000 /* 256 MB */
381 #endif /* __CONFIG_H */