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   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * (C) Copyright 2015
   4  * (C) Copyright 2014
   5  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
   6  *
   7  * Based on:
   8  * Copyright (C) 2012 Freescale Semiconductor, Inc.
   9  *
  10  * Configuration settings for the Freescale i.MX6Q SabreSD board.
  11  */
  12 #ifndef __ARISTAINETOS_COMMON_CONFIG_H
  13 #define __ARISTAINETOS_COMMON_CONFIG_H
  14
  15 #include "mx6_common.h"
  16
  17 #define CONFIG_MACH_TYPE        4501
  18 #define CONFIG_MMCROOT          "/dev/mmcblk0p1"
  19
  20 /* Size of malloc() pool */
  21 #define CONFIG_SYS_MALLOC_LEN           (64 * SZ_1M)
  22
  23 #define CONFIG_MXC_UART
  24
  25 /* MMC Configs */
  26 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
  27
  28 #define CONFIG_FEC_MXC
  29 #define CONFIG_MII
  30 #define IMX_FEC_BASE                    ENET_BASE_ADDR
  31 #define CONFIG_ETHPRIME                 "FEC"
  32 #define CONFIG_FEC_MXC_PHYADDR          0
  33
  34 #define CONFIG_SPI_FLASH_MTD
  35 #define CONFIG_SF_DEFAULT_SPEED         20000000
  36 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
  37 #define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
  38
  39 #define CONFIG_EXTRA_ENV_SETTINGS \
  40         "script=u-boot.scr\0" \
  41         "fit_file=/boot/system.itb\0" \
  42         "loadaddr=0x12000000\0" \
  43         "fit_addr_r=0x14000000\0" \
  44         "uboot=/boot/u-boot.imx\0" \
  45         "uboot_sz=d0000\0" \
  46         "rescue_sys_addr=f0000\0" \
  47         "rescue_sys_length=f10000\0" \
  48         "panel=lb07wv8\0" \
  49         "splashpos=m,m\0" \
  50         "console=" CONSOLE_DEV "\0" \
  51         "fdt_high=0xffffffff\0"   \
  52         "initrd_high=0xffffffff\0" \
  53         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
  54         "set_fit_default=fdt addr ${fit_addr_r};fdt set /configurations " \
  55                 "default ${board_type}\0" \
  56         "get_env=mw ${loadaddr} 0 0x20000;" \
  57                 "mmc rescan;" \
  58                 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} env.txt;" \
  59                 "env import -t ${loadaddr}\0" \
  60         "default_env=mw ${loadaddr} 0 0x20000;" \
  61                 "env export -t ${loadaddr} serial# ethaddr eth1addr " \
  62                 "board_type panel;" \
  63                 "env default -a;" \
  64                 "env import -t ${loadaddr}\0" \
  65         "loadbootscript=" \
  66                 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  67         "bootscript=echo Running bootscript from mmc ...; " \
  68                 "source\0" \
  69         "mmcpart=1\0" \
  70         "mmcdev=0\0" \
  71         "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  72         "mmcargs=setenv bootargs console=${console},${baudrate} " \
  73                 "root=${mmcroot}\0" \
  74         "mmcboot=echo Booting from mmc ...; " \
  75                 "run mmcargs addmtd addmisc set_fit_default;" \
  76                 "bootm ${fit_addr_r}\0" \
  77         "mmc_load_fit=ext2load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
  78                 "${fit_file}\0" \
  79         "mmc_load_uboot=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
  80                 "${uboot}\0" \
  81         "mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \
  82                 "setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \
  83                 "setexpr uboot_maxsize ${uboot_sz} - 400;" \
  84                 "mw.b ${cmp_buf} 0x00 ${uboot_sz};" \
  85                 "run mmc_load_uboot;sf probe;sf erase 0 ${uboot_sz};" \
  86                 "sf write ${loadaddr} 400 ${filesize};" \
  87                 "sf read ${cmp_buf} 400 ${uboot_sz};" \
  88                 "cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \
  89         "ubiboot=echo Booting from ubi ...; " \
  90                 "run ubiargs addmtd addmisc set_fit_default;" \
  91                 "bootm ${fit_addr_r}\0" \
  92         "rescueargs=setenv bootargs console=${console},${baudrate} " \
  93                 "root=/dev/ram rw\0 " \
  94         "rescueboot=echo Booting rescue system from NOR ...; " \
  95                 "run rescueargs addmtd addmisc set_fit_default;" \
  96                 "bootm ${fit_addr_r}\0" \
  97         "rescue_load_fit=sf probe;sf read ${fit_addr_r} ${rescue_sys_addr} " \
  98                 "${rescue_sys_length}; imi ${fit_addr_r}\0" \
  99         CONFIG_EXTRA_ENV_BOARD_SETTINGS
 100
 101 #define CONFIG_BOOTCOMMAND \
 102         "mmc dev ${mmcdev};" \
 103         "if mmc rescan; then " \
 104                 "if run loadbootscript; then " \
 105                         "run bootscript; " \
 106                 "else " \
 107                         "if run mmc_load_fit; then " \
 108                                 "run mmcboot; " \
 109                         "else " \
 110                                 "if run ubifs_load_fit; then " \
 111                                         "run ubiboot; " \
 112                                 "else " \
 113                                         "if run rescue_load_fit; then " \
 114                                                 "run rescueboot; " \
 115                                         "else " \
 116                                                 "echo RESCUE SYSTEM BOOT " \
 117                                                         "FAILURE;" \
 118                                         "fi; " \
 119                                 "fi; " \
 120                         "fi; " \
 121                 "fi; " \
 122         "else " \
 123                 "if run ubifs_load_fit; then " \
 124                         "run ubiboot; " \
 125                 "else " \
 126                         "if run rescue_load_fit; then " \
 127                                 "run rescueboot; " \
 128                         "else " \
 129                                 "echo RESCUE SYSTEM BOOT FAILURE;" \
 130                         "fi; " \
 131                 "fi; " \
 132         "fi"
 133
 134 #define CONFIG_ARP_TIMEOUT              200UL
 135
 136 #define CONFIG_SYS_MEMTEST_START        PHYS_SDRAM
 137 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + 0x100000)
 138 #define CONFIG_SYS_MEMTEST_SCRATCH      0x10800000
 139
 140 /* Physical Memory Map */
 141 #define CONFIG_NR_DRAM_BANKS            1
 142 #define PHYS_SDRAM                      MMDC0_ARB_BASE_ADDR
 143
 144 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
 145 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 146 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
 147
 148 #define CONFIG_SYS_INIT_SP_OFFSET \
 149         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 150 #define CONFIG_SYS_INIT_SP_ADDR \
 151         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 152
 153 /* Environment organization */
 154 #define CONFIG_ENV_SIZE                 (12 * 1024)
 155 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
 156 #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
 157 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
 158 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
 159 #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
 160 #define CONFIG_ENV_SECT_SIZE            (0x010000)
 161 #define CONFIG_ENV_OFFSET               (0x0d0000)
 162 #define CONFIG_ENV_OFFSET_REDUND        (0x0e0000)
 163
 164 #define CONFIG_SYS_FSL_USDHC_NUM        2
 165
 166 /* I2C */
 167 #define CONFIG_SYS_I2C
 168 #define CONFIG_SYS_I2C_MXC
 169 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
 170 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
 171 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
 172 #define CONFIG_SYS_I2C_SPEED            100000
 173 #define CONFIG_SYS_I2C_SLAVE            0x7f
 174 #define CONFIG_SYS_I2C_NOPROBES         { {0, 0x00} }
 175
 176 /* NAND stuff */
 177 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 178 #define CONFIG_SYS_NAND_BASE            0x40000000
 179 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 180 #define CONFIG_SYS_NAND_ONFI_DETECTION
 181
 182 /* DMA stuff, needed for GPMI/MXS NAND support */
 183
 184 /* RTC */
 185 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
 186 #define CONFIG_SYS_RTC_BUS_NUM  2
 187 #define CONFIG_RTC_M41T11
 188
 189 /* USB Configs */
 190 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
 191 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET        /* For OTG port */
 192 #define CONFIG_MXC_USB_PORTSC   (PORT_PTS_UTMI | PORT_PTS_PTW)
 193 #define CONFIG_MXC_USB_FLAGS    0
 194
 195 /* UBI support */
 196 #define CONFIG_MTD_PARTITIONS
 197 #define CONFIG_MTD_DEVICE
 198
 199 #define CONFIG_HW_WATCHDOG
 200 #define CONFIG_IMX_WATCHDOG
 201
 202 /* Framebuffer */
 203 #define CONFIG_VIDEO_IPUV3
 204 /* check this console not needed, after test remove it */
 205 #define CONFIG_VIDEO_BMP_RLE8
 206 #define CONFIG_SPLASH_SCREEN
 207 #define CONFIG_SPLASH_SCREEN_ALIGN
 208 #define CONFIG_BMP_16BPP
 209 #define CONFIG_VIDEO_LOGO
 210 #define CONFIG_VIDEO_BMP_LOGO
 211 #define CONFIG_IMX_VIDEO_SKIP
 212
 213 #define CONFIG_PWM_IMX
 214 #define CONFIG_IMX6_PWM_PER_CLK 66000000
 215
 216 #endif /* __ARISTAINETOS_COMMON_CONFIG_H */