2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian@popies.net>
4 * Lead Tech Design <www.leadtechdesign.com>
6 * Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES).
8 * SPDX-License-Identifier: GPL-2.0+
14 #include <asm/hardware.h>
16 #define CONFIG_SYS_TEXT_BASE 0x73f00000
18 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
20 /* ARM asynchronous clock */
21 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
22 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
24 #define CONFIG_AT91SAM9M10G45EK
26 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
27 #define CONFIG_SETUP_MEMORY_TAGS
28 #define CONFIG_INITRD_TAG
29 #define CONFIG_SKIP_LOWLEVEL_INIT
31 /* general purpose I/O */
32 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
35 #define LCD_BPP LCD_COLOR8
36 #define CONFIG_LCD_LOGO
37 #undef LCD_TEST_PATTERN
38 #define CONFIG_LCD_INFO
39 #define CONFIG_LCD_INFO_BELOW_LOGO
40 #define CONFIG_ATMEL_LCD
41 #define CONFIG_ATMEL_LCD_RGB565
42 /* board specific(not enough SRAM) */
43 #define CONFIG_AT91SAM9G45_LCD_BASE 0x73E00000
48 #define CONFIG_BOOTP_BOOTFILESIZE
49 #define CONFIG_BOOTP_BOOTPATH
50 #define CONFIG_BOOTP_GATEWAY
51 #define CONFIG_BOOTP_HOSTNAME
54 * Command line configuration.
57 #define CONFIG_CMD_NAND
60 #define CONFIG_NR_DRAM_BANKS 1
61 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
62 #define CONFIG_SYS_SDRAM_SIZE 0x08000000
64 #define CONFIG_SYS_INIT_SP_ADDR \
65 (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
68 #ifdef CONFIG_CMD_NAND
69 #define CONFIG_NAND_ATMEL
70 #define CONFIG_SYS_MAX_NAND_DEVICE 1
71 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
72 #define CONFIG_SYS_NAND_DBW_8
74 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
76 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
77 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
78 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
83 #define CONFIG_RESET_PHY_R
84 #define CONFIG_AT91_WANTS_COMMON_PHY
86 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
88 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
89 #define CONFIG_SYS_MEMTEST_END 0x23e00000
91 #ifdef CONFIG_SYS_USE_NANDFLASH
92 /* bootstrap + u-boot + env in nandflash */
93 #define CONFIG_ENV_OFFSET 0x120000
94 #define CONFIG_ENV_OFFSET_REDUND 0x100000
95 #define CONFIG_ENV_SIZE 0x20000
97 #define CONFIG_BOOTCOMMAND \
98 "nand read 0x70000000 0x200000 0x300000;" \
100 #define CONFIG_BOOTARGS \
101 "console=ttyS0,115200 earlyprintk " \
102 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
103 "256k(env),256k(env_redundant),256k(spare)," \
104 "512k(dtb),6M(kernel)ro,-(rootfs) " \
105 "root=/dev/mtdblock7 rw rootfstype=jffs2"
106 #elif CONFIG_SYS_USE_MMC
107 /* bootstrap + u-boot + env + linux in mmc */
108 #define FAT_ENV_INTERFACE "mmc"
110 * We don't specify the part number, if device 0 has partition table, it means
111 * the first partition; it no partition table, then take whole device as a
114 #define FAT_ENV_DEVICE_AND_PART "0"
115 #define FAT_ENV_FILE "uboot.env"
116 #define CONFIG_ENV_SIZE 0x4000
118 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
119 "mtdparts=atmel_nand:" \
120 "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
121 "root=/dev/mmcblk0p2 rw rootwait"
122 #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x71000000 dtb; " \
123 "fatload mmc 0:1 0x72000000 zImage; " \
124 "bootz 0x72000000 - 0x71000000"
127 #define CONFIG_SYS_CBSIZE 256
128 #define CONFIG_SYS_MAXARGS 16
129 #define CONFIG_SYS_LONGHELP
130 #define CONFIG_CMDLINE_EDITING
131 #define CONFIG_AUTO_COMPLETE
134 * Size of malloc() pool
136 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
138 /* Defines for SPL */
139 #define CONFIG_SPL_FRAMEWORK
140 #define CONFIG_SPL_TEXT_BASE 0x300000
141 #define CONFIG_SPL_MAX_SIZE 0x010000
142 #define CONFIG_SPL_STACK 0x310000
144 #define CONFIG_SYS_MONITOR_LEN 0x80000
146 #ifdef CONFIG_SYS_USE_MMC
148 #define CONFIG_SPL_BSS_START_ADDR 0x70000000
149 #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000
150 #define CONFIG_SYS_SPL_MALLOC_START 0x70080000
151 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000
153 #define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
154 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
155 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
157 #elif CONFIG_SYS_USE_NANDFLASH
158 #define CONFIG_SPL_NAND_DRIVERS
159 #define CONFIG_SPL_NAND_BASE
160 #define CONFIG_SPL_NAND_ECC
161 #define CONFIG_SPL_NAND_SOFTECC
162 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
163 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
164 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
166 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800
167 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
168 #define CONFIG_SYS_NAND_PAGE_COUNT 64
169 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
170 #define CONFIG_SYS_NAND_ECCSIZE 256
171 #define CONFIG_SYS_NAND_ECCBYTES 3
172 #define CONFIG_SYS_NAND_OOBSIZE 64
173 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
174 48, 49, 50, 51, 52, 53, 54, 55, \
175 56, 57, 58, 59, 60, 61, 62, 63, }
178 #define CONFIG_SPL_ATMEL_SIZE
179 #define CONFIG_SYS_MASTER_CLOCK 132096000
180 #define CONFIG_SYS_AT91_PLLA 0x20c73f03
181 #define CONFIG_SYS_MCKR 0x1301
182 #define CONFIG_SYS_MCKR_CSS 0x1302