2 * (C) Copyright 2013 Atmel Corporation.
3 * Josh Wu <josh.wu@atmel.com>
5 * Configuation settings for the AT91SAM9N12-EK boards.
7 * SPDX-License-Identifier: GPL-2.0+
10 #ifndef __AT91SAM9N12_CONFIG_H_
11 #define __AT91SAM9N12_CONFIG_H_
14 * SoC must be defined first, before hardware.h is included.
15 * In this case SoC is defined in boards.cfg.
17 #include <asm/hardware.h>
19 #define CONFIG_SYS_TEXT_BASE 0x26f00000
21 /* ARM asynchronous clock */
22 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
23 #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
25 /* Misc CPU related */
26 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
27 #define CONFIG_SETUP_MEMORY_TAGS
28 #define CONFIG_INITRD_TAG
29 #define CONFIG_SKIP_LOWLEVEL_INIT
30 #define CONFIG_BOARD_EARLY_INIT_F
31 #define CONFIG_DISPLAY_CPUINFO
33 #define CONFIG_OF_LIBFDT
34 #define CONFIG_SYS_GENERIC_BOARD
36 /* general purpose I/O */
37 #define CONFIG_AT91_GPIO
40 #define CONFIG_ATMEL_USART
41 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
42 #define CONFIG_USART_ID ATMEL_ID_SYS
43 #define CONFIG_BAUDRATE 115200
47 #define LCD_BPP LCD_COLOR16
48 #define LCD_OUTPUT_BPP 24
49 #define CONFIG_LCD_LOGO
50 #define CONFIG_LCD_INFO
51 #define CONFIG_LCD_INFO_BELOW_LOGO
52 #define CONFIG_SYS_WHITE_ON_BLACK
53 #define CONFIG_ATMEL_HLCD
54 #define CONFIG_ATMEL_LCD_RGB565
55 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
57 #define CONFIG_BOOTDELAY 3
62 #define CONFIG_BOOTP_BOOTFILESIZE
63 #define CONFIG_BOOTP_BOOTPATH
64 #define CONFIG_BOOTP_GATEWAY
65 #define CONFIG_BOOTP_HOSTNAME
67 /* NOR flash - no real flash on this board */
68 #define CONFIG_SYS_NO_FLASH
71 * Command line configuration.
73 #include <config_cmd_default.h>
74 #undef CONFIG_CMD_FPGA
76 #define CONFIG_CMD_BOOTZ
77 #define CONFIG_CMD_PING
78 #define CONFIG_CMD_DHCP
79 #define CONFIG_CMD_NAND
81 #define CONFIG_CMD_MMC
82 #define CONFIG_CMD_FAT
83 #define CONFIG_CMD_USB
85 #define CONFIG_NR_DRAM_BANKS 1
86 #define CONFIG_SYS_SDRAM_BASE 0x20000000
87 #define CONFIG_SYS_SDRAM_SIZE 0x08000000
90 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
91 * leaving the correct space for initial global data structure above
92 * that address while providing maximum stack area below.
94 # define CONFIG_SYS_INIT_SP_ADDR \
95 (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
99 #define CONFIG_ATMEL_SPI
100 #define CONFIG_SPI_FLASH_ATMEL
101 #define CONFIG_SF_DEFAULT_SPEED 30000000
102 #define CONFIG_ENV_SPI_MODE SPI_MODE_3
103 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
107 #ifdef CONFIG_CMD_NAND
108 #define CONFIG_NAND_ATMEL
109 #define CONFIG_SYS_MAX_NAND_DEVICE 1
110 #define CONFIG_SYS_NAND_BASE 0x40000000
111 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
112 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
113 #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4)
114 #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)
116 /* PMECC & PMERRLOC */
117 #define CONFIG_ATMEL_NAND_HWECC
118 #define CONFIG_ATMEL_NAND_HW_PMECC
119 #define CONFIG_PMECC_CAP 2
120 #define CONFIG_PMECC_SECTOR_SIZE 512
121 #define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
123 #define CONFIG_CMD_NAND_TRIMFFS
127 #define CONFIG_MTD_PARTITIONS
128 #define CONFIG_MTD_DEVICE
129 #define CONFIG_CMD_MTDPARTS
130 #define MTDIDS_DEFAULT "nand0=atmel_nand"
131 #define MTDPARTS_DEFAULT \
132 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
133 "256k(env),256k(env_redundant),256k(spare)," \
134 "512k(dtb),6M(kernel)ro,-(rootfs)"
136 #define CONFIG_EXTRA_ENV_SETTINGS \
137 "console=console=ttyS0,115200\0" \
138 "mtdparts="MTDPARTS_DEFAULT"\0" \
139 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
140 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
143 #ifdef CONFIG_CMD_MMC
145 #define CONFIG_GENERIC_MMC
146 #define CONFIG_GENERIC_ATMEL_MCI
150 #ifdef CONFIG_CMD_FAT
151 #define CONFIG_DOS_PARTITION
155 #define CONFIG_KS8851_MLL
156 #define CONFIG_KS8851_MLL_BASEADDR 0x30000000 /* use NCS2 */
158 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
160 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
161 #define CONFIG_SYS_MEMTEST_END 0x26e00000
164 #ifdef CONFIG_CMD_USB
165 #define CONFIG_USB_ATMEL
166 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
167 #define CONFIG_USB_OHCI_NEW
168 #define CONFIG_SYS_USB_OHCI_CPU_INIT
169 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
170 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12"
171 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
172 #define CONFIG_USB_STORAGE
175 #ifdef CONFIG_SYS_USE_SPIFLASH
177 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
178 #define CONFIG_ENV_IS_IN_SPI_FLASH
179 #define CONFIG_ENV_OFFSET 0x5000
180 #define CONFIG_ENV_SIZE 0x3000
181 #define CONFIG_ENV_SECT_SIZE 0x1000
182 #define CONFIG_BOOTCOMMAND \
183 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
184 "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \
187 #elif defined(CONFIG_SYS_USE_NANDFLASH)
189 /* bootstrap + u-boot + env + linux in nandflash */
190 #define CONFIG_ENV_IS_IN_NAND
191 #define CONFIG_ENV_OFFSET 0xc0000
192 #define CONFIG_ENV_OFFSET_REDUND 0x100000
193 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
194 #define CONFIG_BOOTCOMMAND \
195 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
196 "nand read 0x21000000 0x180000 0x080000;" \
197 "nand read 0x22000000 0x200000 0x400000;" \
198 "bootm 0x22000000 - 0x21000000"
200 #else /* CONFIG_SYS_USE_MMC */
202 /* bootstrap + u-boot + env + linux in mmc */
204 #ifdef CONFIG_ENV_IS_IN_MMC
205 /* Use raw reserved sectors to save environment */
206 #define CONFIG_ENV_OFFSET 0x2000
207 #define CONFIG_ENV_SIZE 0x1000
208 #define CONFIG_SYS_MMC_ENV_DEV 0
210 /* Use file in FAT file to save environment */
211 #define CONFIG_ENV_IS_IN_FAT
212 #define CONFIG_FAT_WRITE
213 #define FAT_ENV_INTERFACE "mmc"
214 #define FAT_ENV_FILE "uboot.env"
215 #define FAT_ENV_DEVICE_AND_PART "0"
216 #define CONFIG_ENV_SIZE 0x4000
219 #define CONFIG_BOOTCOMMAND \
220 "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \
221 "fatload mmc 0:1 0x21000000 dtb;" \
222 "fatload mmc 0:1 0x22000000 uImage;" \
223 "bootm 0x22000000 - 0x21000000"
227 #define CONFIG_SYS_PROMPT "U-Boot> "
228 #define CONFIG_SYS_CBSIZE 256
229 #define CONFIG_SYS_MAXARGS 16
230 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) \
232 #define CONFIG_SYS_LONGHELP
233 #define CONFIG_CMDLINE_EDITING
234 #define CONFIG_AUTO_COMPLETE
235 #define CONFIG_SYS_HUSH_PARSER
238 * Size of malloc() pool
240 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
243 #define CONFIG_SPL_FRAMEWORK
244 #define CONFIG_SPL_TEXT_BASE 0x300000
245 #define CONFIG_SPL_MAX_SIZE 0x6000
246 #define CONFIG_SPL_STACK 0x308000
248 #define CONFIG_SPL_BSS_START_ADDR 0x20000000
249 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
250 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000
251 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
253 #define CONFIG_SPL_LIBCOMMON_SUPPORT
254 #define CONFIG_SPL_LIBGENERIC_SUPPORT
255 #define CONFIG_SPL_GPIO_SUPPORT
256 #define CONFIG_SPL_SERIAL_SUPPORT
258 #define CONFIG_SPL_BOARD_INIT
259 #define CONFIG_SYS_MONITOR_LEN (512 << 10)
261 #define CONFIG_SYS_MASTER_CLOCK 132096000
262 #define CONFIG_SYS_AT91_PLLA 0x20953f03
263 #define CONFIG_SYS_MCKR 0x1301
264 #define CONFIG_SYS_MCKR_CSS 0x1302
266 #define ATMEL_BASE_MPDDRC ATMEL_BASE_DDRSDRC
268 #ifdef CONFIG_SYS_USE_MMC
269 #define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
270 #define CONFIG_SPL_MMC_SUPPORT
271 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
272 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
273 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
274 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
275 #define CONFIG_SPL_FAT_SUPPORT
276 #define CONFIG_SPL_LIBDISK_SUPPORT
278 #elif CONFIG_SYS_USE_NANDFLASH
279 #define CONFIG_SPL_NAND_SUPPORT
280 #define CONFIG_SPL_NAND_DRIVERS
281 #define CONFIG_SPL_NAND_BASE
282 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
283 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
284 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800
285 #define CONFIG_SYS_NAND_PAGE_COUNT 64
286 #define CONFIG_SYS_NAND_OOBSIZE 64
287 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
288 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
289 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
291 #elif CONFIG_SYS_USE_SPIFLASH
292 #define CONFIG_SPL_SPI_SUPPORT
293 #define CONFIG_SPL_SPI_FLASH_SUPPORT
294 #define CONFIG_SPL_SPI_LOAD
295 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400