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Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value
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1 /*
2  * Balloon3 configuration file
3  *
4  * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation; either version 2 of
9  * the License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19  * MA 02111-1307 USA
20  */
21
22 #ifndef __CONFIG_H
23 #define __CONFIG_H
24
25 /*
26  * High Level Board Configuration Options
27  */
28 #define CONFIG_PXA27X           1       /* Marvell PXA270 CPU */
29 #define CONFIG_BALLOON3         1       /* Balloon3 board */
30
31 /*
32  * Environment settings
33  */
34 #define CONFIG_ENV_OVERWRITE
35 #define CONFIG_SYS_MALLOC_LEN           (128*1024)
36 #define CONFIG_ARCH_CPU_INIT
37 #define CONFIG_BOOTCOMMAND                                              \
38         "fpga load 0x0 0x50000 0x62638; "                               \
39         "if usb reset && fatload usb 0 0xa4000000 uImage; then "        \
40                 "bootm 0xa4000000; "                                    \
41         "fi; "                                                          \
42         "bootm 0xd0000;"
43 #define CONFIG_BOOTARGS                 "console=tty0 console=ttyS2,115200"
44 #define CONFIG_TIMESTAMP
45 #define CONFIG_BOOTDELAY                2       /* Autoboot delay */
46 #define CONFIG_CMDLINE_TAG
47 #define CONFIG_SETUP_MEMORY_TAGS
48 #define CONFIG_SYS_TEXT_BASE            0x0
49 #define CONFIG_LZMA                     /* LZMA compression support */
50
51 /*
52  * Serial Console Configuration
53  */
54 #define CONFIG_PXA_SERIAL
55 #define CONFIG_STUART                   1
56 #define CONFIG_BAUDRATE                 115200
57 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
58
59 /*
60  * Bootloader Components Configuration
61  */
62 #include <config_cmd_default.h>
63
64 #undef  CONFIG_CMD_NET
65 #undef  CONFIG_CMD_ENV
66 #undef  CONFIG_CMD_IMLS
67 #define CONFIG_CMD_USB
68 #define CONFIG_CMD_FPGA
69 #undef  CONFIG_LCD
70
71 /*
72  * KGDB
73  */
74 #ifdef  CONFIG_CMD_KGDB
75 #define CONFIG_KGDB_BAUDRATE            230400  /* kgdb serial port speed */
76 #define CONFIG_KGDB_SER_INDEX           2       /* which serial port to use */
77 #endif
78
79 /*
80  * HUSH Shell Configuration
81  */
82 #define CONFIG_SYS_HUSH_PARSER          1
83 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
84
85 #define CONFIG_SYS_LONGHELP
86 #ifdef  CONFIG_SYS_HUSH_PARSER
87 #define CONFIG_SYS_PROMPT               "$ "
88 #else
89 #define CONFIG_SYS_PROMPT               "=> "
90 #endif
91 #define CONFIG_SYS_CBSIZE               256
92 #define CONFIG_SYS_PBSIZE               \
93         (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
94 #define CONFIG_SYS_MAXARGS              16
95 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
96 #define CONFIG_SYS_DEVICE_NULLDEV       1
97
98 /*
99  * Clock Configuration
100  */
101 #undef  CONFIG_SYS_CLKS_IN_HZ
102 #define CONFIG_SYS_HZ                   3250000         /* Timer @ 3250000 Hz */
103 #define CONFIG_SYS_CPUSPEED             0x290           /* 520MHz */
104
105 /*
106  * Stack sizes
107  */
108 #define CONFIG_STACKSIZE                (128*1024)      /* regular stack */
109 #ifdef  CONFIG_USE_IRQ
110 #define CONFIG_STACKSIZE_IRQ            (4*1024)        /* IRQ stack */
111 #define CONFIG_STACKSIZE_FIQ            (4*1024)        /* FIQ stack */
112 #endif
113
114 /*
115  * DRAM Map
116  */
117 #define CONFIG_NR_DRAM_BANKS            3               /* 2 banks of DRAM */
118 #define PHYS_SDRAM_1                    0xa0000000      /* SDRAM Bank #1 */
119 #define PHYS_SDRAM_1_SIZE               0x08000000      /* 128 MB */
120 #define PHYS_SDRAM_2                    0xb0000000      /* SDRAM Bank #2 */
121 #define PHYS_SDRAM_2_SIZE               0x08000000      /* 128 MB */
122 #define PHYS_SDRAM_3                    0x80000000      /* SDRAM Bank #2 */
123 #define PHYS_SDRAM_3_SIZE               0x08000000      /* 128 MB */
124
125 #define CONFIG_SYS_DRAM_BASE            0xa0000000      /* CS0 */
126 #define CONFIG_SYS_DRAM_SIZE            0x18000000      /* 384 MB DRAM */
127
128 #define CONFIG_SYS_MEMTEST_START        0xa0400000      /* memtest works on */
129 #define CONFIG_SYS_MEMTEST_END          0xa0800000      /* 4 ... 8 MB in DRAM */
130
131 #define CONFIG_SYS_LOAD_ADDR            0xa1000000
132
133 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
134 #define CONFIG_SYS_INIT_SP_ADDR         \
135         (PHYS_SDRAM_1 + GENERATED_GBL_DATA_SIZE + 2048)
136
137 /*
138  * NOR FLASH
139  */
140 #ifdef  CONFIG_CMD_FLASH
141 #define PHYS_FLASH_1                    0x00000000      /* Flash Bank #1 */
142 #define PHYS_FLASH_SIZE                 0x00800000      /* 8 MB */
143 #define CONFIG_SYS_FLASH_BASE           PHYS_FLASH_1
144
145 #define CONFIG_SYS_FLASH_CFI
146 #define CONFIG_FLASH_CFI_DRIVER         1
147 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_16BIT
148
149 #define CONFIG_SYS_MAX_FLASH_BANKS      1
150 #define CONFIG_SYS_MAX_FLASH_SECT       256
151
152 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE       1
153
154 #define CONFIG_SYS_FLASH_ERASE_TOUT     (2*CONFIG_SYS_HZ)
155 #define CONFIG_SYS_FLASH_WRITE_TOUT     (2*CONFIG_SYS_HZ)
156 #define CONFIG_SYS_FLASH_LOCK_TOUT      (2*CONFIG_SYS_HZ)
157 #define CONFIG_SYS_FLASH_UNLOCK_TOUT    (2*CONFIG_SYS_HZ)
158 #define CONFIG_SYS_FLASH_PROTECTION
159 #define CONFIG_ENV_IS_IN_FLASH
160 #else
161 #define CONFIG_SYS_NO_FLASH
162 #define CONFIG_SYS_ENV_IS_NOWHERE
163 #endif
164
165 #define CONFIG_SYS_MONITOR_BASE         0x000000
166 #define CONFIG_SYS_MONITOR_LEN          0x40000
167
168 #define CONFIG_ENV_SIZE                 0x2000
169 #define CONFIG_ENV_ADDR                 0x40000
170 #define CONFIG_ENV_SECT_SIZE            0x10000
171
172 /*
173  * GPIO settings
174  */
175 #define CONFIG_SYS_GPSR0_VAL    0x307dc7fd
176 #define CONFIG_SYS_GPSR1_VAL    0x03cffa4e
177 #define CONFIG_SYS_GPSR2_VAL    0x7131c000
178 #define CONFIG_SYS_GPSR3_VAL    0x01e1f3ff
179
180 #define CONFIG_SYS_GPCR0_VAL    0x0
181 #define CONFIG_SYS_GPCR1_VAL    0x0
182 #define CONFIG_SYS_GPCR2_VAL    0x0
183 #define CONFIG_SYS_GPCR3_VAL    0x0
184
185 #define CONFIG_SYS_GPDR0_VAL    0xc0f98e02
186 #define CONFIG_SYS_GPDR1_VAL    0xfcffa8b7
187 #define CONFIG_SYS_GPDR2_VAL    0x22e3ffff
188 #define CONFIG_SYS_GPDR3_VAL    0x000201fe
189
190 #define CONFIG_SYS_GAFR0_L_VAL  0x96c00000
191 #define CONFIG_SYS_GAFR0_U_VAL  0xa5e5459b
192 #define CONFIG_SYS_GAFR1_L_VAL  0x699b759a
193 #define CONFIG_SYS_GAFR1_U_VAL  0xaaa5a5aa
194 #define CONFIG_SYS_GAFR2_L_VAL  0xaaaaaaaa
195 #define CONFIG_SYS_GAFR2_U_VAL  0x01f9a6aa
196 #define CONFIG_SYS_GAFR3_L_VAL  0x54510003
197 #define CONFIG_SYS_GAFR3_U_VAL  0x00001599
198
199 #define CONFIG_SYS_PSSR_VAL     0x30
200
201 /*
202  * Clock settings
203  */
204 #define CONFIG_SYS_CKEN         0xffffffff
205 #define CONFIG_SYS_CCCR         0x00000290
206
207 /*
208  * Memory settings
209  */
210 #define CONFIG_SYS_MSC0_VAL     0x7ff07ff8
211 #define CONFIG_SYS_MSC1_VAL     0x7ff07ff0
212 #define CONFIG_SYS_MSC2_VAL     0x74a42491
213 #define CONFIG_SYS_MDCNFG_VAL   0x89d309d3
214 #define CONFIG_SYS_MDREFR_VAL   0x001d8018
215 #define CONFIG_SYS_MDMRS_VAL    0x00220022
216 #define CONFIG_SYS_FLYCNFG_VAL  0x00000000
217 #define CONFIG_SYS_SXCNFG_VAL   0x00000000
218 #define CONFIG_SYS_MEM_BUF_IMP  0x0f
219
220 /*
221  * PCMCIA and CF Interfaces
222  */
223 #define CONFIG_SYS_MECR_VAL     0x00000000
224 #define CONFIG_SYS_MCMEM0_VAL   0x00014307
225 #define CONFIG_SYS_MCMEM1_VAL   0x00014307
226 #define CONFIG_SYS_MCATT0_VAL   0x0001c787
227 #define CONFIG_SYS_MCATT1_VAL   0x0001c787
228 #define CONFIG_SYS_MCIO0_VAL    0x0001430f
229 #define CONFIG_SYS_MCIO1_VAL    0x0001430f
230
231 /*
232  * LCD
233  */
234 #ifdef  CONFIG_LCD
235 #define CONFIG_BALLOON3LCD
236 #define CONFIG_VIDEO_LOGO
237 #define CONFIG_CMD_BMP
238 #define CONFIG_SPLASH_SCREEN
239 #define CONFIG_SPLASH_SCREEN_ALIGN
240 #define CONFIG_VIDEO_BMP_GZIP
241 #define CONFIG_VIDEO_BMP_RLE8
242 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE  (2 << 20)
243 #endif
244
245 /*
246  * USB
247  */
248 #ifdef  CONFIG_CMD_USB
249 #define CONFIG_USB_OHCI_NEW
250 #define CONFIG_SYS_USB_OHCI_CPU_INIT
251 #define CONFIG_SYS_USB_OHCI_BOARD_INIT
252 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      2
253 #define CONFIG_SYS_USB_OHCI_REGS_BASE   0x4C000000
254 #define CONFIG_SYS_USB_OHCI_SLOT_NAME   "balloon3"
255 #define CONFIG_USB_STORAGE
256 #define CONFIG_DOS_PARTITION
257 #define CONFIG_CMD_FAT
258 #define CONFIG_CMD_EXT2
259 #endif
260
261 /*
262  * FPGA
263  */
264 #ifdef  CONFIG_CMD_FPGA
265 #define CONFIG_FPGA
266 #define CONFIG_FPGA_XILINX
267 #define CONFIG_FPGA_SPARTAN3
268 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
269 #define CONFIG_SYS_FPGA_WAIT    1000
270 #define CONFIG_MAX_FPGA_DEVICES 1
271 #endif
272
273 #endif  /* __CONFIG_H */