3 * Congatec Conga-QEVAl board configuration file.
5 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
6 * Based on Freescale i.MX6Q Sabre Lite board configuration file.
7 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
8 * Leo Sartre, <lsartre@adeneo-embedded.com>
10 * SPDX-License-Identifier: GPL-2.0+
13 #ifndef __CONFIG_CGTQMX6EVAL_H
14 #define __CONFIG_CGTQMX6EVAL_H
16 #include "mx6_common.h"
18 #define CONFIG_MACH_TYPE 4122
20 /* Size of malloc() pool */
21 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
23 #define CONFIG_BOARD_EARLY_INIT_F
24 #define CONFIG_MISC_INIT_R
26 #define CONFIG_MXC_UART
27 #define CONFIG_MXC_UART_BASE UART2_BASE
30 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
32 /* Miscellaneous commands */
33 #define CONFIG_CMD_BMODE
36 #define CONFIG_IMX_THERMAL
39 #define CONFIG_CMD_I2C
40 #define CONFIG_SYS_I2C
41 #define CONFIG_SYS_I2C_MXC
42 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
43 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
44 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
45 #define CONFIG_SYS_I2C_SPEED 100000
49 #define CONFIG_POWER_I2C
50 #define CONFIG_POWER_PFUZE100
51 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
54 #define CONFIG_CMD_USB
55 #define CONFIG_CMD_FAT
56 #define CONFIG_USB_EHCI
57 #define CONFIG_USB_EHCI_MX6
58 #define CONFIG_USB_STORAGE
59 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
60 #define CONFIG_USB_HOST_ETHER
61 #define CONFIG_USB_ETHER_ASIX
62 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
63 #define CONFIG_MXC_USB_FLAGS 0
64 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
65 #define CONFIG_USB_KEYBOARD
66 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
69 #define CONFIG_USBD_HS
70 #define CONFIG_USB_GADGET_DUALSPEED
72 #define CONFIG_USB_GADGET
73 #define CONFIG_CMD_USB_MASS_STORAGE
74 #define CONFIG_USB_FUNCTION_MASS_STORAGE
75 #define CONFIG_USB_GADGET_DOWNLOAD
76 #define CONFIG_USB_GADGET_VBUS_DRAW 2
78 #define CONFIG_G_DNL_VENDOR_NUM 0x0525
79 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
80 #define CONFIG_G_DNL_MANUFACTURER "Congatec"
84 #define CONFIG_VIDEO_IPUV3
85 #define CONFIG_CFB_CONSOLE
86 #define CONFIG_VGA_AS_SINGLE_DEVICE
87 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
88 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
89 #define CONFIG_VIDEO_BMP_RLE8
90 #define CONFIG_SPLASH_SCREEN
91 #define CONFIG_SPLASH_SCREEN_ALIGN
92 #define CONFIG_BMP_16BPP
93 #define CONFIG_VIDEO_LOGO
94 #define CONFIG_VIDEO_BMP_LOGO
96 #define CONFIG_IPUV3_CLK 198000000
98 #define CONFIG_IPUV3_CLK 264000000
100 #define CONFIG_IMX_HDMI
103 #define CONFIG_CMD_SATA
104 #define CONFIG_DWC_AHSATA
105 #define CONFIG_SYS_SATA_MAX_DEVICE 1
106 #define CONFIG_DWC_AHSATA_PORT_ID 0
107 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
109 #define CONFIG_LIBATA
112 #define CONFIG_CMD_PING
113 #define CONFIG_CMD_DHCP
114 #define CONFIG_CMD_MII
115 #define CONFIG_FEC_MXC
117 #define IMX_FEC_BASE ENET_BASE_ADDR
118 #define CONFIG_FEC_XCV_TYPE RGMII
119 #define CONFIG_ETHPRIME "FEC"
120 #define CONFIG_FEC_MXC_PHYADDR 6
121 #define CONFIG_PHYLIB
122 #define CONFIG_PHY_ATHEROS
124 /* Command definition */
126 #define CONFIG_MXC_UART_BASE UART2_BASE
127 #define CONFIG_CONSOLE_DEV "ttymxc1"
128 #define CONFIG_MMCROOT "/dev/mmcblk0p2"
129 #define CONFIG_SYS_MMC_ENV_DEV 0
131 #define CONFIG_EXTRA_ENV_SETTINGS \
132 "script=boot.scr\0" \
134 "fdtfile=imx6q-qmx6.dtb\0" \
135 "fdt_addr_r=0x18000000\0" \
138 "console=" CONFIG_CONSOLE_DEV "\0" \
139 "bootm_size=0x10000000\0" \
140 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
142 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
143 "update_sd_firmware=" \
144 "if test ${ip_dyn} = yes; then " \
145 "setenv get_cmd dhcp; " \
147 "setenv get_cmd tftp; " \
149 "if mmc dev ${mmcdev}; then " \
150 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
151 "setexpr fw_sz ${filesize} / 0x200; " \
152 "setexpr fw_sz ${fw_sz} + 1; " \
153 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
156 "mmcargs=setenv bootargs console=${console},${baudrate} " \
157 "root=${mmcroot}\0" \
159 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
160 "bootscript=echo Running bootscript from mmc ...; " \
162 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
163 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \
164 "mmcboot=echo Booting from mmc ...; " \
166 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
167 "if run loadfdt; then " \
168 "bootz ${loadaddr} - ${fdt_addr_r}; " \
170 "if test ${boot_fdt} = try; then " \
173 "echo WARN: Cannot load the DT; " \
179 "netargs=setenv bootargs console=${console},${baudrate} " \
181 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
182 "netboot=echo Booting from net ...; " \
184 "if test ${ip_dyn} = yes; then " \
185 "setenv get_cmd dhcp; " \
187 "setenv get_cmd tftp; " \
189 "${get_cmd} ${image}; " \
190 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
191 "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \
192 "bootz ${loadaddr} - ${fdt_addr_r}; " \
194 "if test ${boot_fdt} = try; then " \
197 "echo WARN: Cannot load the DT; " \
204 #define CONFIG_BOOTCOMMAND \
205 "mmc dev ${mmcdev};" \
206 "if mmc rescan; then " \
207 "if run loadbootscript; then " \
210 "if run loadimage; then " \
212 "else run netboot; " \
215 "else run netboot; fi"
217 #define CONFIG_SYS_MEMTEST_START 0x10000000
218 #define CONFIG_SYS_MEMTEST_END 0x10010000
219 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
221 /* Physical Memory Map */
222 #define CONFIG_NR_DRAM_BANKS 1
223 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
224 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
226 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
227 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
228 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
230 #define CONFIG_SYS_INIT_SP_OFFSET \
231 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
232 #define CONFIG_SYS_INIT_SP_ADDR \
233 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
235 /* Environment organization */
236 #define CONFIG_ENV_SIZE (8 * 1024)
238 #define CONFIG_ENV_IS_IN_MMC
240 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
241 #define CONFIG_SYS_MMC_ENV_DEV 0
243 #endif /* __CONFIG_CGTQMX6EVAL_H */