]> git.sur5r.net Git - u-boot/blob - include/configs/chromebook_link.h
x86: chromebook_link: Enable GPIO support
[u-boot] / include / configs / chromebook_link.h
1 /*
2  * Copyright (c) 2011 The Chromium OS Authors.
3  * (C) Copyright 2008
4  * Graeme Russ, graeme.russ@gmail.com.
5  *
6  * SPDX-License-Identifier:     GPL-2.0+
7  */
8
9 /*
10  * board/config.h - configuration options, board specific
11  */
12
13 #ifndef __CONFIG_H
14 #define __CONFIG_H
15
16 #include <configs/x86-common.h>
17
18 #define CONFIG_SYS_CAR_ADDR                     0xff7e0000
19 #define CONFIG_SYS_CAR_SIZE                     (128 * 1024)
20 #define CONFIG_SYS_MONITOR_LEN                  (1 << 20)
21 #define CONFIG_SYS_X86_START16                  0xfffff800
22 #define CONFIG_BOARD_EARLY_INIT_F
23 #define CONFIG_BOARD_EARLY_INIT_R
24
25 #define CONFIG_X86_RESET_VECTOR
26 #define CONFIG_NR_DRAM_BANKS                    8
27
28 #define CONFIG_COREBOOT_SERIAL
29
30 #define CONFIG_SCSI_DEV_LIST            {PCI_VENDOR_ID_INTEL, \
31                         PCI_DEVICE_ID_INTEL_NM10_AHCI},       \
32         {PCI_VENDOR_ID_INTEL,           \
33                         PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
34         {PCI_VENDOR_ID_INTEL, \
35                         PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
36         {PCI_VENDOR_ID_INTEL,           \
37                         PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
38
39 /*
40  * These common x86 features are not yet supported, but are added in
41  * follow-on patches in this series. Add undefs here to avoid every patch
42  * having to put things back into x86-common.h
43  */
44 #undef CONFIG_VIDEO
45 #undef CONFIG_CFB_CONSOLE
46 #undef CONFIG_ICH_SPI
47 #undef CONFIG_SPI
48 #undef CONFIG_CMD_SPI
49 #undef CONFIG_CMD_SF
50 #undef CONFIG_USB_EHCI
51 #undef CONFIG_CMD_USB
52 #undef CONFIG_CMD_SCSI
53
54 #define CONFIG_PCI_MEM_BUS      0xe0000000
55 #define CONFIG_PCI_MEM_PHYS     CONFIG_PCI_MEM_BUS
56 #define CONFIG_PCI_MEM_SIZE     0x10000000
57
58 #define CONFIG_PCI_PREF_BUS     0xd0000000
59 #define CONFIG_PCI_PREF_PHYS    CONFIG_PCI_PREF_BUS
60 #define CONFIG_PCI_PREF_SIZE    0x10000000
61
62 #define CONFIG_PCI_IO_BUS       0x1000
63 #define CONFIG_PCI_IO_PHYS      CONFIG_PCI_IO_BUS
64 #define CONFIG_PCI_IO_SIZE      0xefff
65
66 #define CONFIG_STD_DEVICES_SETTINGS     "stdin=usbkbd,vga,serial\0" \
67                                         "stdout=vga,serial\0" \
68                                         "stderr=vga,serial\0"
69
70 #endif  /* __CONFIG_H */