1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Config file for Compulab CM-FX6 board
5 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
7 * Author: Nikita Kiryanov <nikita@compulab.co.il>
10 #ifndef __CONFIG_CM_FX6_H
11 #define __CONFIG_CM_FX6_H
13 #include "mx6_common.h"
16 #define CONFIG_SYS_LITTLE_ENDIAN
17 #define CONFIG_MACH_TYPE 4273
20 #define CONFIG_SYS_FSL_USDHC_NUM 3
21 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
24 #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR
25 #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR
26 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
27 #define CONFIG_NR_DRAM_BANKS 2
28 #define CONFIG_SYS_MEMTEST_START 0x10000000
29 #define CONFIG_SYS_MEMTEST_END 0x10010000
30 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
31 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
32 #define CONFIG_SYS_INIT_SP_OFFSET \
33 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
34 #define CONFIG_SYS_INIT_SP_ADDR \
35 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
38 #define CONFIG_MXC_UART
39 #define CONFIG_MXC_UART_BASE UART4_BASE
40 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
43 #define CONFIG_SF_DEFAULT_BUS 0
44 #define CONFIG_SF_DEFAULT_CS 0
45 #define CONFIG_SF_DEFAULT_SPEED 25000000
46 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
49 #ifndef CONFIG_SPL_BUILD
50 #define CONFIG_MTD_DEVICE
51 #define CONFIG_MTD_PARTITIONS
52 #define CONFIG_SPI_FLASH_MTD
56 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
57 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
58 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
59 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
60 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
61 #define CONFIG_ENV_SIZE (8 * 1024)
62 #define CONFIG_ENV_OFFSET (768 * 1024)
64 #ifndef CONFIG_SPL_BUILD
65 #define CONFIG_EXTRA_ENV_SETTINGS \
66 "fdt_high=0xffffffff\0" \
67 "initrd_high=0xffffffff\0" \
68 "fdt_addr_r=0x18000000\0" \
69 "ramdisk_addr_r=0x13000000\0" \
70 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
71 "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
72 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
73 "fdtfile=undefined\0" \
74 "stdin=serial,usbkbd\0" \
75 "stdout=serial,vga\0" \
76 "stderr=serial,vga\0" \
79 "uImage=uImage-cm-fx6\0" \
80 "zImage=zImage-cm-fx6\0" \
81 "kernel=uImage-cm-fx6\0" \
83 "console=ttymxc3,115200\0" \
85 "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
86 "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
87 "doboot=bootm ${kernel_addr_r}\0" \
89 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
90 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
91 "setboottypez=setenv kernel ${zImage};" \
92 "setenv doboot bootz ${kernel_addr_r} - ${fdt_addr_r};" \
93 "setenv doloadfdt true;\0" \
94 "setboottypem=setenv kernel ${uImage};" \
95 "setenv doboot bootm ${kernel_addr_r};" \
96 "setenv doloadfdt false;\0"\
97 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
98 "sataroot=/dev/sda2 rw rootwait\0" \
99 "nandroot=/dev/mtdblock4 rw\0" \
100 "nandrootfstype=ubifs\0" \
101 "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \
102 "${video} ${extrabootargs}\0" \
103 "sataargs=setenv bootargs console=${console} root=${sataroot} " \
104 "${video} ${extrabootargs}\0" \
105 "nandargs=setenv bootargs console=${console} " \
106 "root=${nandroot} " \
107 "rootfstype=${nandrootfstype} " \
108 "${video} ${extrabootargs}\0" \
109 "nandboot=if run nandloadkernel; then " \
111 "run setboottypem;" \
112 "run storagebootcmd;" \
113 "run setboottypez;" \
114 "run storagebootcmd;" \
116 "run_eboot=echo Starting EBOOT ...; "\
118 "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
119 "loadkernel=load ${storagetype} ${storagedev} ${kernel_addr_r} ${kernel};\0"\
120 "loadfdt=load ${storagetype} ${storagedev} ${fdt_addr_r} ${dtb};\0" \
121 "nandloadkernel=nand read ${kernel_addr_r} 0 780000;\0" \
122 "nandloadfdt=nand read ${fdt_addr_r} 780000 80000;\0" \
123 "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \
124 "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \
125 "setupnandboot=setenv storagetype nand;\0" \
126 "storagebootcmd=echo Booting from ${storagetype} ...;" \
127 "run ${storagetype}args; run doboot;\0" \
128 "trybootk=if run loadkernel; then " \
129 "if ${doloadfdt}; then " \
132 "run storagebootcmd;" \
135 "run setboottypem;" \
137 "run setboottypez;" \
140 "run setupmmcboot;" \
141 "mmc dev ${storagedev};" \
142 "if mmc rescan; then " \
145 "run setupsataboot;" \
146 "if sata init; then " \
149 "run setupnandboot;" \
152 "if test $board_name = Utilite && test $board_rev = MX6Q ; then " \
153 "setenv fdtfile imx6q-utilite-pro.dtb; fi; " \
154 "if test $fdtfile = undefined; then " \
155 "echo WARNING: Could not determine dtb to use; fi; \0" \
158 #define CONFIG_PREBOOT "usb start;sf probe"
160 #define BOOT_TARGET_DEVICES(func) \
165 #include <config_distro_bootcmd.h>
167 #define CONFIG_EXTRA_ENV_SETTINGS
171 #ifndef CONFIG_SPL_BUILD
172 #define CONFIG_SYS_NAND_BASE 0x40000000
173 #define CONFIG_SYS_NAND_MAX_CHIPS 1
174 #define CONFIG_SYS_MAX_NAND_DEVICE 1
175 #define CONFIG_SYS_NAND_ONFI_DETECTION
176 /* APBH DMA is required for NAND support */
180 #define CONFIG_FEC_MXC
181 #define CONFIG_FEC_MXC_PHYADDR 0
182 #define CONFIG_FEC_XCV_TYPE RGMII
183 #define IMX_FEC_BASE ENET_BASE_ADDR
184 #define CONFIG_PHY_ATHEROS
186 #define CONFIG_ETHPRIME "FEC0"
187 #define CONFIG_ARP_TIMEOUT 200UL
188 #define CONFIG_NET_RETRY_COUNT 5
191 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
192 #define CONFIG_MXC_USB_FLAGS 0
193 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
194 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
197 #define CONFIG_SYS_I2C
198 #define CONFIG_SYS_I2C_MXC
199 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
200 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
201 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
202 #define CONFIG_SYS_I2C_SPEED 100000
203 #define CONFIG_SYS_MXC_I2C3_SPEED 400000
205 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
206 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
207 #define CONFIG_SYS_I2C_EEPROM_BUS 2
210 #define CONFIG_SYS_SATA_MAX_DEVICE 1
212 #define CONFIG_DWC_AHSATA_PORT_ID 0
213 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
216 #define CONFIG_SYS_BOOTMAPSZ (8 << 20)
217 #define CONFIG_SERIAL_TAG
220 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
221 #define CONFIG_MISC_INIT_R
224 #include "imx6_spl.h"
225 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
228 #define CONFIG_VIDEO_IPUV3
229 #define CONFIG_IMX_HDMI
231 #define CONFIG_SPLASH_SCREEN
232 #define CONFIG_SPLASH_SOURCE
233 #define CONFIG_VIDEO_BMP_RLE8
235 #define CONFIG_VIDEO_LOGO
236 #define CONFIG_VIDEO_BMP_LOGO
239 #define CONFIG_ENV_EEPROM_IS_ON_I2C
240 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
241 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
242 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
243 #define CONFIG_SYS_EEPROM_SIZE 256
245 #endif /* __CONFIG_CM_FX6_H */